| platform_bare.c (209908) | platform_bare.c (212054) |
|---|---|
| 1/*- 2 * Copyright (c) 2008-2009 Semihalf, Rafal Jaworowski 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * --- 11 unchanged lines hidden (view full) --- 20 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 21 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 22 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 23 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 24 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 25 */ 26 27#include <sys/cdefs.h> | 1/*- 2 * Copyright (c) 2008-2009 Semihalf, Rafal Jaworowski 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * --- 11 unchanged lines hidden (view full) --- 20 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 21 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 22 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 23 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 24 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 25 */ 26 27#include <sys/cdefs.h> |
| 28__FBSDID("$FreeBSD: head/sys/powerpc/booke/platform_bare.c 209908 2010-07-11 21:08:29Z raj $"); | 28__FBSDID("$FreeBSD: head/sys/powerpc/booke/platform_bare.c 212054 2010-08-31 15:27:46Z nwhitehorn $"); |
| 29 30#include <sys/param.h> 31#include <sys/systm.h> 32#include <sys/kernel.h> 33#include <sys/bus.h> 34#include <sys/pcpu.h> 35#include <sys/proc.h> 36#include <sys/smp.h> --- 28 unchanged lines hidden (view full) --- 65static void bare_mem_regions(platform_t, struct mem_region **phys, int *physsz, 66 struct mem_region **avail, int *availsz); 67static u_long bare_timebase_freq(platform_t, struct cpuref *cpuref); 68static int bare_smp_first_cpu(platform_t, struct cpuref *cpuref); 69static int bare_smp_next_cpu(platform_t, struct cpuref *cpuref); 70static int bare_smp_get_bsp(platform_t, struct cpuref *cpuref); 71static int bare_smp_start_cpu(platform_t, struct pcpu *cpu); 72 | 29 30#include <sys/param.h> 31#include <sys/systm.h> 32#include <sys/kernel.h> 33#include <sys/bus.h> 34#include <sys/pcpu.h> 35#include <sys/proc.h> 36#include <sys/smp.h> --- 28 unchanged lines hidden (view full) --- 65static void bare_mem_regions(platform_t, struct mem_region **phys, int *physsz, 66 struct mem_region **avail, int *availsz); 67static u_long bare_timebase_freq(platform_t, struct cpuref *cpuref); 68static int bare_smp_first_cpu(platform_t, struct cpuref *cpuref); 69static int bare_smp_next_cpu(platform_t, struct cpuref *cpuref); 70static int bare_smp_get_bsp(platform_t, struct cpuref *cpuref); 71static int bare_smp_start_cpu(platform_t, struct pcpu *cpu); 72 |
| 73static void e500_reset(platform_t); 74 |
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| 73static platform_method_t bare_methods[] = { 74 PLATFORMMETHOD(platform_probe, bare_probe), 75 PLATFORMMETHOD(platform_mem_regions, bare_mem_regions), 76 PLATFORMMETHOD(platform_timebase_freq, bare_timebase_freq), 77 78 PLATFORMMETHOD(platform_smp_first_cpu, bare_smp_first_cpu), 79 PLATFORMMETHOD(platform_smp_next_cpu, bare_smp_next_cpu), 80 PLATFORMMETHOD(platform_smp_get_bsp, bare_smp_get_bsp), 81 PLATFORMMETHOD(platform_smp_start_cpu, bare_smp_start_cpu), 82 | 75static platform_method_t bare_methods[] = { 76 PLATFORMMETHOD(platform_probe, bare_probe), 77 PLATFORMMETHOD(platform_mem_regions, bare_mem_regions), 78 PLATFORMMETHOD(platform_timebase_freq, bare_timebase_freq), 79 80 PLATFORMMETHOD(platform_smp_first_cpu, bare_smp_first_cpu), 81 PLATFORMMETHOD(platform_smp_next_cpu, bare_smp_next_cpu), 82 PLATFORMMETHOD(platform_smp_get_bsp, bare_smp_get_bsp), 83 PLATFORMMETHOD(platform_smp_start_cpu, bare_smp_start_cpu), 84 |
| 85 PLATFORMMETHOD(platform_reset, e500_reset); 86 |
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| 83 { 0, 0 } 84}; 85 86static platform_def_t bare_platform = { 87 "bare metal", 88 bare_methods, 89 0 90}; --- 164 unchanged lines hidden (view full) --- 255 DELAY(1000); /* wait 1ms */ 256 257 return ((pc->pc_awake) ? 0 : EBUSY); 258#else 259 /* No SMP support */ 260 return (ENXIO); 261#endif 262} | 87 { 0, 0 } 88}; 89 90static platform_def_t bare_platform = { 91 "bare metal", 92 bare_methods, 93 0 94}; --- 164 unchanged lines hidden (view full) --- 259 DELAY(1000); /* wait 1ms */ 260 261 return ((pc->pc_awake) ? 0 : EBUSY); 262#else 263 /* No SMP support */ 264 return (ENXIO); 265#endif 266} |
| 267 268static void 269e500_reset(platform_t plat) 270{ 271 uint32_t ver = SVR_VER(mfspr(SPR_SVR)); 272 273 if (ver == SVR_MPC8572E || ver == SVR_MPC8572 || 274 ver == SVR_MPC8548E || ver == SVR_MPC8548) 275 /* Systems with dedicated reset register */ 276 ccsr_write4(OCP85XX_RSTCR, 2); 277 else { 278 /* Clear DBCR0, disables debug interrupts and events. */ 279 mtspr(SPR_DBCR0, 0); 280 __asm __volatile("isync"); 281 282 /* Enable Debug Interrupts in MSR. */ 283 mtmsr(mfmsr() | PSL_DE); 284 285 /* Enable debug interrupts and issue reset. */ 286 mtspr(SPR_DBCR0, mfspr(SPR_DBCR0) | DBCR0_IDM | 287 DBCR0_RST_SYSTEM); 288 } 289 290 printf("Reset failed...\n"); 291 while (1); 292} 293 |
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