1/*-
2 * Copyright (c) 2008-2009 Semihalf, Rafal Jaworowski
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 *

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20 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
21 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
22 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
23 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
24 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
25 */
26
27#include <sys/cdefs.h>
28__FBSDID("$FreeBSD: head/sys/powerpc/booke/platform_bare.c 193492 2009-06-05 09:46:00Z raj $");
29
30#include <sys/param.h>
31#include <sys/systm.h>
32#include <sys/kernel.h>
33#include <sys/bus.h>
34#include <sys/pcpu.h>
35#include <sys/proc.h>
36#include <sys/smp.h>
37
38#include <machine/bootinfo.h>
39#include <machine/bus.h>
40#include <machine/cpu.h>
41#include <machine/hid.h>
42#include <machine/platform.h>
43#include <machine/platformvar.h>
44#include <machine/smp.h>
45#include <machine/spr.h>
46#include <machine/vmparam.h>
47
48#include <powerpc/mpc85xx/mpc85xx.h>
49#include <powerpc/mpc85xx/ocpbus.h>
50
51#include "platform_if.h"
52
53#ifdef SMP
54extern void *ap_pcpu;
55extern uint8_t __boot_page[]; /* Boot page body */
56extern uint32_t kernload; /* Kernel physical load address */
57#endif

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86 0
87};
88
89PLATFORM_DEF(bare_platform);
90
91static int
92bare_probe(platform_t plat)
93{
94 uint32_t ver;
95
96 ver = SVR_VER(mfspr(SPR_SVR));
97 if (ver == SVR_MPC8572E || ver == SVR_MPC8572)
98 maxcpu = 2;
99 else
100 maxcpu = 1;
101
102 return (BUS_PROBE_GENERIC);
103}
104
105#define MEM_REGIONS 8
106static struct mem_region avail_regions[MEM_REGIONS];
107
108void
109bare_mem_regions(platform_t plat, struct mem_region **phys, int *physsz,
110 struct mem_region **avail, int *availsz)
111{
112 struct bi_mem_region *mr;
113 int i;
114
115 /* Initialize memory regions table */
116 mr = bootinfo_mr();
117 for (i = 0; i < bootinfo->bi_mem_reg_no; i++, mr++) {
118 if (i == MEM_REGIONS)
119 break;
120 if (mr->mem_base < 1048576) {
121 avail_regions[i].mr_start = 1048576;
122 avail_regions[i].mr_size = mr->mem_size -
123 (1048576 - mr->mem_base);
124 } else {
125 avail_regions[i].mr_start = mr->mem_base;
126 avail_regions[i].mr_size = mr->mem_size;
127 }
128 }
129 *availsz = i;
130 *avail = avail_regions;
131
132 /* On the bare metal platform phys == avail memory */
133 *physsz = *availsz;
134 *phys = *avail;
135}
136
137static u_long
138bare_timebase_freq(platform_t plat, struct cpuref *cpuref)
139{
140 u_long ticks = -1;
141
142 /*
143 * Time Base and Decrementer are updated every 8 CCB bus clocks.
144 * HID0[SEL_TBCLK] = 0
145 */
146 ticks = bootinfo->bi_bus_clk / 8;
147 if (ticks <= 0)
148 panic("Unable to determine timebase frequency!");
149
150 return (ticks);
151}
152
153static int
154bare_smp_first_cpu(platform_t plat, struct cpuref *cpuref)

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