1/*- 2 * Copyright (c) 2011-2012 Semihalf. 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright --- 11 unchanged lines hidden (view full) --- 20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 24 * SUCH DAMAGE. 25 */ 26 27#include <sys/cdefs.h> |
28__FBSDID("$FreeBSD: head/sys/powerpc/booke/machdep_e500.c 292903 2015-12-30 03:43:25Z jhibbits $"); |
29 |
30#include <sys/cdefs.h> |
31#include <sys/types.h> |
32#include <sys/param.h> 33#include <sys/proc.h> |
34#include <sys/reboot.h> 35 |
36#include <vm/vm.h> 37#include <vm/pmap.h> 38 |
39#include <machine/machdep.h> 40 41#include <dev/fdt/fdt_common.h> 42 43#include <powerpc/mpc85xx/mpc85xx.h> 44 45extern void dcache_enable(void); 46extern void dcache_inval(void); 47extern void icache_enable(void); 48extern void icache_inval(void); 49extern void l2cache_enable(void); 50extern void l2cache_inval(void); |
51extern void bpred_enable(void); |
52 53void 54booke_init_tlb(vm_paddr_t fdt_immr_pa) 55{ 56 57} 58 59void --- 21 unchanged lines hidden (view full) --- 81 } 82 83 csr = mfspr(SPR_L1CSR1); 84 if ((boothowto & RB_VERBOSE) != 0 || (csr & L1CSR1_ICE) == 0) 85 printf("L1 I-cache %sabled\n", 86 (csr & L1CSR1_ICE) ? "en" : "dis"); 87} 88 |
89void 90booke_enable_l2_cache(void) 91{ 92 uint32_t csr; 93 94 /* Enable L2 cache on E500mc */ 95 if ((((mfpvr() >> 16) & 0xFFFF) == FSL_E500mc) || 96 (((mfpvr() >> 16) & 0xFFFF) == FSL_E5500)) { --- 6 unchanged lines hidden (view full) --- 103 csr = mfspr(SPR_L2CSR0); 104 if ((boothowto & RB_VERBOSE) != 0 || (csr & L2CSR0_L2E) == 0) 105 printf("L2 cache %sabled\n", 106 (csr & L2CSR0_L2E) ? "en" : "dis"); 107 } 108} 109 110void |
111booke_enable_bpred(void) |
112{ |
113 uint32_t csr; |
114 |
115 bpred_enable(); 116 csr = mfspr(SPR_BUCSR); 117 if ((boothowto & RB_VERBOSE) != 0 || (csr & BUCSR_BPEN) == 0) 118 printf("Branch Predictor %sabled\n", 119 (csr & BUCSR_BPEN) ? "en" : "dis"); |
120} 121 122void 123booke_disable_l2_cache(void) 124{ 125} |