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< __FBSDID("$FreeBSD: head/sys/powerpc/booke/machdep_e500.c 257178 2013-10-26 18:18:14Z nwhitehorn $");
---
> __FBSDID("$FreeBSD: head/sys/powerpc/booke/machdep_e500.c 292903 2015-12-30 03:43:25Z jhibbits $");
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> #include <sys/cdefs.h>
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> #include <sys/param.h>
> #include <sys/proc.h>
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> #include <vm/vm.h>
> #include <vm/pmap.h>
>
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> extern void bpred_enable(void);
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< #if 0
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< booke_enable_l3_cache(void)
---
> booke_enable_bpred(void)
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< uint32_t csr, size, ver;
---
> uint32_t csr;
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< /* Enable L3 CoreNet Platform Cache (CPC) */
< ver = SVR_VER(mfspr(SPR_SVR));
< if (ver == SVR_P2041 || ver == SVR_P2041E || ver == SVR_P3041 ||
< ver == SVR_P3041E || ver == SVR_P5020 || ver == SVR_P5020E) {
< csr = ccsr_read4(OCP85XX_CPC_CSR0);
< if ((csr & OCP85XX_CPC_CSR0_CE) == 0) {
< l3cache_inval();
< l3cache_enable();
< }
<
< csr = ccsr_read4(OCP85XX_CPC_CSR0);
< if ((boothowto & RB_VERBOSE) != 0 ||
< (csr & OCP85XX_CPC_CSR0_CE) == 0) {
< size = OCP85XX_CPC_CFG0_SZ_K(ccsr_read4(OCP85XX_CPC_CFG0));
< printf("L3 Corenet Platform Cache: %d KB %sabled\n",
< size, (csr & OCP85XX_CPC_CSR0_CE) == 0 ?
< "dis" : "en");
< }
< }
---
> bpred_enable();
> csr = mfspr(SPR_BUCSR);
> if ((boothowto & RB_VERBOSE) != 0 || (csr & BUCSR_BPEN) == 0)
> printf("Branch Predictor %sabled\n",
> (csr & BUCSR_BPEN) ? "en" : "dis");
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<
< static void
< l3cache_inval(void)
< {
<
< /* Flash invalidate the CPC and clear all the locks */
< ccsr_write4(OCP85XX_CPC_CSR0, OCP85XX_CPC_CSR0_FI |
< OCP85XX_CPC_CSR0_LFC);
< while (ccsr_read4(OCP85XX_CPC_CSR0) & (OCP85XX_CPC_CSR0_FI |
< OCP85XX_CPC_CSR0_LFC))
< ;
< }
<
< static void
< l3cache_enable(void)
< {
<
< ccsr_write4(OCP85XX_CPC_CSR0, OCP85XX_CPC_CSR0_CE |
< OCP85XX_CPC_CSR0_PE);
< /* Read back to sync write */
< ccsr_read4(OCP85XX_CPC_CSR0);
< }
< #endif