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locore.S (279623) locore.S (279750)
1/*-
2 * Copyright (C) 2007-2009 Semihalf, Rafal Jaworowski <raj@semihalf.com>
3 * Copyright (C) 2006 Semihalf, Marian Balakowicz <m8@semihalf.com>
4 * All rights reserved.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions
8 * are met:

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18 * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
19 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
20 * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
21 * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
22 * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
23 * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
24 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
25 *
1/*-
2 * Copyright (C) 2007-2009 Semihalf, Rafal Jaworowski <raj@semihalf.com>
3 * Copyright (C) 2006 Semihalf, Marian Balakowicz <m8@semihalf.com>
4 * All rights reserved.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions
8 * are met:

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18 * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
19 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
20 * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
21 * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
22 * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
23 * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
24 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
25 *
26 * $FreeBSD: head/sys/powerpc/booke/locore.S 279623 2015-03-05 05:53:08Z nwhitehorn $
26 * $FreeBSD: head/sys/powerpc/booke/locore.S 279750 2015-03-07 20:14:46Z nwhitehorn $
27 */
28
29#include "assym.s"
30
31#include <machine/asm.h>
32#include <machine/hid.h>
33#include <machine/param.h>
34#include <machine/spr.h>

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200 mr %r3, %r28
201 bl tlb1_inval_entry
202
203done_mapping:
204
205/*
206 * Setup a temporary stack
207 */
27 */
28
29#include "assym.s"
30
31#include <machine/asm.h>
32#include <machine/hid.h>
33#include <machine/param.h>
34#include <machine/spr.h>

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200 mr %r3, %r28
201 bl tlb1_inval_entry
202
203done_mapping:
204
205/*
206 * Setup a temporary stack
207 */
208 lis %r1, tmpstack@ha
209 addi %r1, %r1, tmpstack@l
208 bl 1f
209 .long tmpstack-.
2101: mflr %r1
211 lwz %r2,0(%r1)
212 add %r1,%r1,%r2
210 addi %r1, %r1, (TMPSTACKSZ - 16)
211
212/*
213 addi %r1, %r1, (TMPSTACKSZ - 16)
214
215/*
216 * Relocate kernel
217 */
218 bl 1f
219 .long _DYNAMIC-.
220 .long _GLOBAL_OFFSET_TABLE_-.
2211: mflr %r5
222 lwz %r3,0(%r5) /* _DYNAMIC in %r3 */
223 add %r3,%r3,%r5
224 lwz %r4,4(%r5) /* GOT pointer */
225 add %r4,%r4,%r5
226 lwz %r4,4(%r4) /* got[0] is _DYNAMIC link addr */
227 subf %r4,%r4,%r3 /* subtract to calculate relocbase */
228 bl elf_reloc_self
229
230/*
213 * Initialise exception vector offsets
214 */
215 bl ivor_setup
216
217/*
218 * Set up arguments and jump to system initialization code
219 */
220 mr %r3, %r30

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333 isync
334 msync
335 addi %r5, %r5, 12
336 addi %r4, %r4, 1
337 cmpw %r4, %r6
338 blt 4b
339
340 /* Switch to the final mapping */
231 * Initialise exception vector offsets
232 */
233 bl ivor_setup
234
235/*
236 * Set up arguments and jump to system initialization code
237 */
238 mr %r3, %r30

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351 isync
352 msync
353 addi %r5, %r5, 12
354 addi %r4, %r4, 1
355 cmpw %r4, %r6
356 blt 4b
357
358 /* Switch to the final mapping */
341 lis %r5, __boot_page@ha
342 ori %r5, %r5, __boot_page@l
343 bl 5f
359 bl 5f
3445: mflr %r3
360 .long __boot_page-.
3615: mflr %r5
362 lwz %r3,0(%r3)
363 add %r5,%r5,%r3 /* __boot_page in r5 */
364 bl 6f
3656: mflr %r3
345 rlwinm %r3, %r3, 0, 0xfff /* Offset from boot page start */
346 add %r3, %r3, %r5 /* Make this virtual address */
347 addi %r3, %r3, 32
348 li %r4, 0 /* Note AS=0 */
349 mtspr SPR_SRR0, %r3
350 mtspr SPR_SRR1, %r4
351 rfi
352

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360 * Invalidate temp mapping
361 */
362 mr %r3, %r28
363 bl tlb1_inval_entry
364
365/*
366 * Setup a temporary stack
367 */
366 rlwinm %r3, %r3, 0, 0xfff /* Offset from boot page start */
367 add %r3, %r3, %r5 /* Make this virtual address */
368 addi %r3, %r3, 32
369 li %r4, 0 /* Note AS=0 */
370 mtspr SPR_SRR0, %r3
371 mtspr SPR_SRR1, %r4
372 rfi
373

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381 * Invalidate temp mapping
382 */
383 mr %r3, %r28
384 bl tlb1_inval_entry
385
386/*
387 * Setup a temporary stack
388 */
368 lis %r1, tmpstack@ha
369 addi %r1, %r1, tmpstack@l
389 bl 1f
390 .long tmpstack-.
3911: mflr %r1
392 lwz %r2,0(%r1)
393 add %r1,%r1,%r2
370 addi %r1, %r1, (TMPSTACKSZ - 16)
371
372/*
373 * Initialise exception vector offsets
374 */
375 bl ivor_setup
376
377 /*
378 * Assign our pcpu instance
379 */
394 addi %r1, %r1, (TMPSTACKSZ - 16)
395
396/*
397 * Initialise exception vector offsets
398 */
399 bl ivor_setup
400
401 /*
402 * Assign our pcpu instance
403 */
380 lis %r3, ap_pcpu@h
381 ori %r3, %r3, ap_pcpu@l
404 bl 1f
405 .long ap_pcpu-.
4061: mflr %r4
407 lwz %r3, 0(%r4)
408 add %r3, %r3, %r4
382 lwz %r3, 0(%r3)
383 mtsprg0 %r3
384
385 bl pmap_bootstrap_ap
386
387 bl cpudep_ap_bootstrap
388 /* Switch to the idle thread's kstack */
389 mr %r1, %r3

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538
539/*
540 * void tid_flush(tlbtid_t tid);
541 *
542 * Invalidate all TLB0 entries which match the given TID. Note this is
543 * dedicated for cases when invalidation(s) should NOT be propagated to other
544 * CPUs.
545 *
409 lwz %r3, 0(%r3)
410 mtsprg0 %r3
411
412 bl pmap_bootstrap_ap
413
414 bl cpudep_ap_bootstrap
415 /* Switch to the idle thread's kstack */
416 mr %r1, %r3

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565
566/*
567 * void tid_flush(tlbtid_t tid);
568 *
569 * Invalidate all TLB0 entries which match the given TID. Note this is
570 * dedicated for cases when invalidation(s) should NOT be propagated to other
571 * CPUs.
572 *
546 * Global vars tlb0_ways, tlb0_entries_per_way are assumed to have been set up
547 * correctly (by tlb0_get_tlbconf()).
573 * void tid_flush(tlbtid_t tid, int tlb0_ways, int tlb0_entries_per_way);
548 *
574 *
575 * XXX: why isn't this in C?
549 */
550ENTRY(tid_flush)
551 cmpwi %r3, TID_KERNEL
552 beq tid_flush_end /* don't evict kernel translations */
553
576 */
577ENTRY(tid_flush)
578 cmpwi %r3, TID_KERNEL
579 beq tid_flush_end /* don't evict kernel translations */
580
554 /* Number of TLB0 ways */
555 lis %r4, tlb0_ways@h
556 ori %r4, %r4, tlb0_ways@l
557 lwz %r4, 0(%r4)
558
559 /* Number of entries / way */
560 lis %r5, tlb0_entries_per_way@h
561 ori %r5, %r5, tlb0_entries_per_way@l
562 lwz %r5, 0(%r5)
563
564 /* Disable interrupts */
565 mfmsr %r10
566 wrteei 0
567
568 li %r6, 0 /* ways counter */
569loop_ways:
570 li %r7, 0 /* entries [per way] counter */
571loop_entries:

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713 stmw %r10, 12(%r3) /* store CR, CTR, XER, [r13 .. r31] */
714 li %r3, 0 /* return FALSE */
715 blr
716
717/************************************************************************/
718/* Data section */
719/************************************************************************/
720 .data
581 /* Disable interrupts */
582 mfmsr %r10
583 wrteei 0
584
585 li %r6, 0 /* ways counter */
586loop_ways:
587 li %r7, 0 /* entries [per way] counter */
588loop_entries:

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730 stmw %r10, 12(%r3) /* store CR, CTR, XER, [r13 .. r31] */
731 li %r3, 0 /* return FALSE */
732 blr
733
734/************************************************************************/
735/* Data section */
736/************************************************************************/
737 .data
738 .align 3
739GLOBAL(__startkernel)
740 .long begin
741GLOBAL(__endkernel)
742 .long end
721 .align 4
722tmpstack:
723 .space TMPSTACKSZ
724tmpstackbound:
725 .space 10240 /* XXX: this really should not be necessary */
726
727/*
728 * Compiled KERNBASE locations
729 */
730 .globl kernbase
731 .set kernbase, KERNBASE
732
733#include <powerpc/booke/trap_subr.S>
743 .align 4
744tmpstack:
745 .space TMPSTACKSZ
746tmpstackbound:
747 .space 10240 /* XXX: this really should not be necessary */
748
749/*
750 * Compiled KERNBASE locations
751 */
752 .globl kernbase
753 .set kernbase, KERNBASE
754
755#include <powerpc/booke/trap_subr.S>