1/*-
2 * Copyright (C) 2007-2009 Semihalf, Rafal Jaworowski <raj@semihalf.com>
3 * Copyright (C) 2006 Semihalf, Marian Balakowicz <m8@semihalf.com>
4 * All rights reserved.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions
8 * are met:

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18 * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
19 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
20 * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
21 * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
22 * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
23 * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
24 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
25 *
26 * $FreeBSD: head/sys/powerpc/booke/locore.S 292900 2015-12-30 02:23:14Z jhibbits $
27 */
28
29#include "assym.s"
30
31#include "opt_hwpmc_hooks.h"
32
33#include <machine/asm.h>
34#include <machine/hid.h>

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296 bl 1f
297
298 .globl bp_ntlb1s
299bp_ntlb1s:
300 .long 0
301
302 .globl bp_tlb1
303bp_tlb1:
304 .space 4 * 3 * 16
305
306 .globl bp_tlb1_end
307bp_tlb1_end:
308
309/*
310 * Initial configuration
311 */
3121: mflr %r31 /* r31 hold the address of bp_ntlb1s */

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726 oris %r3, %r3, (L1CSR1_ICPE | L1CSR1_ICE)@h
727 ori %r3, %r3, (L1CSR1_ICPE | L1CSR1_ICE)@l
728 isync
729 mtspr SPR_L1CSR1, %r3
730 isync
731 blr
732
733/*
734 * int setfault()
735 *
736 * Similar to setjmp to setup for handling faults on accesses to user memory.
737 * Any routine using this may only call bcopy, either the form below,
738 * or the (currently used) C code optimized, so it doesn't use any non-volatile
739 * registers.
740 */
741 .globl setfault

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