| aim_machdep.c (190750) | aim_machdep.c (190953) |
|---|---|
| 1/*- 2 * Copyright (C) 1995, 1996 Wolfgang Solfrank. 3 * Copyright (C) 1995, 1996 TooLs GmbH. 4 * All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: --- 41 unchanged lines hidden (view full) --- 50 * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, 51 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR 52 * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF 53 * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 54 * $NetBSD: machdep.c,v 1.74.2.1 2000/11/01 16:13:48 tv Exp $ 55 */ 56 57#include <sys/cdefs.h> | 1/*- 2 * Copyright (C) 1995, 1996 Wolfgang Solfrank. 3 * Copyright (C) 1995, 1996 TooLs GmbH. 4 * All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: --- 41 unchanged lines hidden (view full) --- 50 * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, 51 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR 52 * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF 53 * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 54 * $NetBSD: machdep.c,v 1.74.2.1 2000/11/01 16:13:48 tv Exp $ 55 */ 56 57#include <sys/cdefs.h> |
| 58__FBSDID("$FreeBSD: head/sys/powerpc/aim/machdep.c 190750 2009-04-05 21:52:13Z nwhitehorn $"); | 58__FBSDID("$FreeBSD: head/sys/powerpc/aim/machdep.c 190953 2009-04-12 03:03:55Z nwhitehorn $"); |
| 59 60#include "opt_compat.h" 61#include "opt_ddb.h" 62#include "opt_kstack_pages.h" 63#include "opt_msgbuf.h" 64 65#include <sys/param.h> 66#include <sys/proc.h> --- 45 unchanged lines hidden (view full) --- 112#include <machine/kdb.h> 113#include <machine/md_var.h> 114#include <machine/metadata.h> 115#include <machine/mmuvar.h> 116#include <machine/pcb.h> 117#include <machine/powerpc.h> 118#include <machine/reg.h> 119#include <machine/sigframe.h> | 59 60#include "opt_compat.h" 61#include "opt_ddb.h" 62#include "opt_kstack_pages.h" 63#include "opt_msgbuf.h" 64 65#include <sys/param.h> 66#include <sys/proc.h> --- 45 unchanged lines hidden (view full) --- 112#include <machine/kdb.h> 113#include <machine/md_var.h> 114#include <machine/metadata.h> 115#include <machine/mmuvar.h> 116#include <machine/pcb.h> 117#include <machine/powerpc.h> 118#include <machine/reg.h> 119#include <machine/sigframe.h> |
| 120#include <machine/spr.h> |
|
| 120#include <machine/trap.h> 121#include <machine/vmparam.h> 122 123#include <ddb/ddb.h> 124 125#include <dev/ofw/openfirm.h> 126 127#ifdef DDB --- 121 unchanged lines hidden (view full) --- 249powerpc_init(u_int startkernel, u_int endkernel, u_int basekernel, void *mdp) 250{ 251 struct pcpu *pc; 252 vm_offset_t end; 253 void *generictrap; 254 size_t trap_offset; 255 void *kmdp; 256 char *env; | 121#include <machine/trap.h> 122#include <machine/vmparam.h> 123 124#include <ddb/ddb.h> 125 126#include <dev/ofw/openfirm.h> 127 128#ifdef DDB --- 121 unchanged lines hidden (view full) --- 250powerpc_init(u_int startkernel, u_int endkernel, u_int basekernel, void *mdp) 251{ 252 struct pcpu *pc; 253 vm_offset_t end; 254 void *generictrap; 255 size_t trap_offset; 256 void *kmdp; 257 char *env; |
| 257 int vers; | |
| 258 uint32_t msr, scratch; | 258 uint32_t msr, scratch; |
| 259 uint8_t *cache_check; |
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| 259 260 end = 0; 261 kmdp = NULL; 262 trap_offset = 0; 263 264 /* 265 * Parse metadata if present and fetch parameters. Must be done 266 * before console is inited so cninit gets the right value of --- 54 unchanged lines hidden (view full) --- 321 /* 322 * Complain if there is no metadata. 323 */ 324 if (mdp == NULL || kmdp == NULL) { 325 printf("powerpc_init: no loader metadata.\n"); 326 } 327 328 /* | 260 261 end = 0; 262 kmdp = NULL; 263 trap_offset = 0; 264 265 /* 266 * Parse metadata if present and fetch parameters. Must be done 267 * before console is inited so cninit gets the right value of --- 54 unchanged lines hidden (view full) --- 322 /* 323 * Complain if there is no metadata. 324 */ 325 if (mdp == NULL || kmdp == NULL) { 326 printf("powerpc_init: no loader metadata.\n"); 327 } 328 329 /* |
| 329 * Set cacheline_size based on the CPU model. | 330 * Init KDB |
| 330 */ 331 | 331 */ 332 |
| 332 vers = mfpvr() >> 16; 333 switch (vers) { | 333 kdb_init(); 334 335 /* 336 * PowerPC 970 CPUs have a misfeature requested by Apple that makes 337 * them pretend they have a 32-byte cacheline. Turn this off 338 * before we measure the cacheline size. 339 */ 340 341 switch (mfpvr() >> 16) { |
| 334 case IBM970: 335 case IBM970FX: 336 case IBM970MP: 337 case IBM970GX: | 342 case IBM970: 343 case IBM970FX: 344 case IBM970MP: 345 case IBM970GX: |
| 338 cacheline_size = 128; | 346 scratch = mfspr64upper(SPR_HID5,msr); 347 scratch &= ~HID5_970_DCBZ_SIZE_HI; 348 mtspr64(SPR_HID5, scratch, mfspr(SPR_HID5), msr); |
| 339 break; | 349 break; |
| 340 default: 341 cacheline_size = 32; | |
| 342 } 343 344 /* | 350 } 351 352 /* |
| 345 * Init KDB | 353 * Initialize the interrupt tables and figure out our cache line 354 * size and whether or not we need the 64-bit bridge code. |
| 346 */ 347 | 355 */ 356 |
| 348 kdb_init(); 349 | |
| 350 /* | 357 /* |
| 351 * XXX: Initialize the interrupt tables. 352 * Disable translation in case the vector area 353 * hasn't been mapped (G5) | 358 * Disable translation in case the vector area hasn't been 359 * mapped (G5). |
| 354 */ | 360 */ |
| 361 |
|
| 355 msr = mfmsr(); 356 mtmsr(msr & ~(PSL_IR | PSL_DR)); 357 isync(); 358 359 /* | 362 msr = mfmsr(); 363 mtmsr(msr & ~(PSL_IR | PSL_DR)); 364 isync(); 365 366 /* |
| 367 * Measure the cacheline size using dcbz 368 * 369 * Use EXC_PGM as a playground. We are about to overwrite it 370 * anyway, we know it exists, and we know it is cache-aligned. 371 */ 372 373 cache_check = (void *)EXC_PGM; 374 375 for (cacheline_size = 0; cacheline_size < 0x100; cacheline_size++) 376 cache_check[cacheline_size] = 0xff; 377 378 __asm __volatile("dcbz %0,0":: "r" (cache_check) : "memory"); 379 380 /* Find the first byte dcbz did not zero to get the cache line size */ 381 for (cacheline_size = 0; cacheline_size < 0x100 && 382 cache_check[cacheline_size] == 0; cacheline_size++); 383 384 /* |
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| 360 * Figure out whether we need to use the 64 bit PMAP. This works by 361 * executing an instruction that is only legal on 64-bit PPC (mtmsrd), 362 * and setting ppc64 = 0 if that causes a trap. 363 */ 364 365 ppc64 = 1; 366 367 bcopy(&testppc64, (void *)EXC_PGM, (size_t)&testppc64size); --- 772 unchanged lines hidden --- | 385 * Figure out whether we need to use the 64 bit PMAP. This works by 386 * executing an instruction that is only legal on 64-bit PPC (mtmsrd), 387 * and setting ppc64 = 0 if that causes a trap. 388 */ 389 390 ppc64 = 1; 391 392 bcopy(&testppc64, (void *)EXC_PGM, (size_t)&testppc64size); --- 772 unchanged lines hidden --- |