| sb_scd.h (203697) | sb_scd.h (205364) |
|---|---|
| 1/*- 2 * Copyright (c) 2009 Neelkanth Natu 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright --- 9 unchanged lines hidden (view full) --- 18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 24 * SUCH DAMAGE. 25 * | 1/*- 2 * Copyright (c) 2009 Neelkanth Natu 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright --- 9 unchanged lines hidden (view full) --- 18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 24 * SUCH DAMAGE. 25 * |
| 26 * $FreeBSD: head/sys/mips/sibyte/sb_scd.h 203697 2010-02-09 06:24:43Z neel $ | 26 * $FreeBSD: head/sys/mips/sibyte/sb_scd.h 205364 2010-03-20 05:49:06Z neel $ |
| 27 */ 28 29#ifndef _SB_SCD_H_ 30#define _SB_SCD_H_ 31 32#define NUM_INTSRC 64 /* total number of interrupt sources */ 33 | 27 */ 28 29#ifndef _SB_SCD_H_ 30#define _SB_SCD_H_ 31 32#define NUM_INTSRC 64 /* total number of interrupt sources */ 33 |
| 34uint64_t sb_zbbus_cycle_count(void); |
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| 34uint64_t sb_cpu_speed(void); 35void sb_system_reset(void); 36 37int sb_route_intsrc(int src); 38void sb_enable_intsrc(int cpu, int src); 39void sb_disable_intsrc(int cpu, int src); 40uint64_t sb_read_intsrc_mask(int cpu); 41void sb_write_intsrc_mask(int cpu, uint64_t mask); 42void sb_write_intmap(int cpu, int intsrc, int intrnum); 43int sb_read_intmap(int cpu, int intsrc); 44 45#ifdef SMP 46#define INTSRC_MAILBOX3 29 47void sb_set_mailbox(int cpuid, uint64_t val); 48void sb_clear_mailbox(int cpuid, uint64_t val); 49#endif 50 51#endif /* _SB_SCD_H_ */ | 35uint64_t sb_cpu_speed(void); 36void sb_system_reset(void); 37 38int sb_route_intsrc(int src); 39void sb_enable_intsrc(int cpu, int src); 40void sb_disable_intsrc(int cpu, int src); 41uint64_t sb_read_intsrc_mask(int cpu); 42void sb_write_intsrc_mask(int cpu, uint64_t mask); 43void sb_write_intmap(int cpu, int intsrc, int intrnum); 44int sb_read_intmap(int cpu, int intsrc); 45 46#ifdef SMP 47#define INTSRC_MAILBOX3 29 48void sb_set_mailbox(int cpuid, uint64_t val); 49void sb_clear_mailbox(int cpuid, uint64_t val); 50#endif 51 52#endif /* _SB_SCD_H_ */ |