30c30
< * $FreeBSD: head/sys/mips/rmi/rmi_mips_exts.h 212366 2010-09-09 17:45:48Z jchandra $
---
> * $FreeBSD: head/sys/mips/rmi/rmi_mips_exts.h 212758 2010-09-16 19:13:55Z jchandra $
351c351
< static __inline__ int
---
> static __inline int
370c370
< return (oldval == 0 ? 1 /* success */ : 0 /* failure */ );
---
> return (oldval == 0 ? 1 /* success */ : 0 /* failure */);
373c373
< static __inline__ uint32_t
---
> static __inline uint32_t
388c388
< static __inline__ void
---
> static __inline void
398a399,419
> /*
> * Atomic increment a unsigned int
> */
> static __inline unsigned int
> xlr_ldaddwu(unsigned int value, unsigned int *addr)
> {
> __asm__ __volatile__(
> ".set push\n"
> ".set noreorder\n"
> "move $8, %2\n"
> "move $9, %3\n"
> ".word 0x71280011\n" /* ldaddwu $8, $9 */
> "move %0, $8\n"
> ".set pop\n"
> : "=&r"(value), "+m"(*addr)
> : "0"(value), "r" ((unsigned long)addr)
> : "$8", "$9");
>
> return (value);
> }
>
400,401c421,422
< static __inline__ uint32_t
< xlr_paddr_lw(uint64_t paddr)
---
> static __inline uint64_t
> xlr_paddr_ld(uint64_t paddr)
405c426
< return (*(uint32_t *)(uintptr_t)paddr);
---
> return (*(uint64_t *)(uintptr_t)paddr);
409,410c430,431
< static __inline__ uint32_t
< xlr_paddr_lw(uint64_t paddr)
---
> static __inline uint64_t
> xlr_paddr_ld(uint64_t paddr)
412c433
< uint32_t val;
---
> uint64_t val;
418c439
< "lw %0, 0(%1) \n\t"
---
> "ld %0, 0(%1) \n\t"
426,427c447,448
< static __inline__ uint32_t
< xlr_paddr_lw(uint64_t paddr)
---
> static __inline uint32_t
> xlr_paddr_ld(uint64_t paddr)
429c450,451
< uint32_t high, low, tmp;
---
> uint32_t addrh, addrl;
> uint32_t valh, vall;
431,432c453,454
< high = 0x98000000 | (paddr >> 32);
< low = paddr & 0xffffffff;
---
> addrh = 0x98000000 | (paddr >> 32);
> addrl = paddr & 0xffffffff;
437,441c459,464
< "dsll32 %1, %1, 0 \n\t"
< "dsll32 %2, %2, 0 \n\t" /* get rid of the */
< "dsrl32 %2, %2, 0 \n\t" /* sign extend */
< "or %1, %1, %2 \n\t"
< "lw %0, 0(%1) \n\t"
---
> "dsll32 %2, %2, 0 \n\t"
> "dsll32 %3, %3, 0 \n\t" /* get rid of the */
> "dsrl32 %3, %3, 0 \n\t" /* sign extend */
> "or %2, %2, %3 \n\t"
> "lw %0, 0(%2) \n\t"
> "lw %1, 4(%2) \n\t"
443,444c466,467
< : "=r"(tmp)
< : "r"(high), "r"(low));
---
> : "=&r"(valh), "=r"(vall)
> : "r"(addrh), "r"(addrl));
446c469
< return tmp;
---
> return (((uint64_t)valh << 32) | vall);
449a473,505
> /*
> * XXX: Not really needed in n32 or n64, retain for now
> */
> #if defined(__mips_n64) || defined(__mips_n32)
> static __inline uint32_t
> xlr_enable_kx(void)
> {
>
> return (0);
> }
>
> static __inline void
> xlr_restore_kx(uint32_t sr)
> {
> }
> #else
> static __inline uint32_t
> xlr_enable_kx(void)
> {
> uint32_t sr = mips_rd_status();
>
> mips_wr_status((sr & ~MIPS_SR_INT_IE) | MIPS_SR_KX);
> return (sr);
> }
>
> static __inline void
> xlr_restore_kx(uint32_t sr)
> {
>
> mips_wr_status(sr);
> }
> #endif
>
< * $FreeBSD: head/sys/mips/rmi/rmi_mips_exts.h 212366 2010-09-09 17:45:48Z jchandra $
---
> * $FreeBSD: head/sys/mips/rmi/rmi_mips_exts.h 212758 2010-09-16 19:13:55Z jchandra $
351c351
< static __inline__ int
---
> static __inline int
370c370
< return (oldval == 0 ? 1 /* success */ : 0 /* failure */ );
---
> return (oldval == 0 ? 1 /* success */ : 0 /* failure */);
373c373
< static __inline__ uint32_t
---
> static __inline uint32_t
388c388
< static __inline__ void
---
> static __inline void
398a399,419
> /*
> * Atomic increment a unsigned int
> */
> static __inline unsigned int
> xlr_ldaddwu(unsigned int value, unsigned int *addr)
> {
> __asm__ __volatile__(
> ".set push\n"
> ".set noreorder\n"
> "move $8, %2\n"
> "move $9, %3\n"
> ".word 0x71280011\n" /* ldaddwu $8, $9 */
> "move %0, $8\n"
> ".set pop\n"
> : "=&r"(value), "+m"(*addr)
> : "0"(value), "r" ((unsigned long)addr)
> : "$8", "$9");
>
> return (value);
> }
>
400,401c421,422
< static __inline__ uint32_t
< xlr_paddr_lw(uint64_t paddr)
---
> static __inline uint64_t
> xlr_paddr_ld(uint64_t paddr)
405c426
< return (*(uint32_t *)(uintptr_t)paddr);
---
> return (*(uint64_t *)(uintptr_t)paddr);
409,410c430,431
< static __inline__ uint32_t
< xlr_paddr_lw(uint64_t paddr)
---
> static __inline uint64_t
> xlr_paddr_ld(uint64_t paddr)
412c433
< uint32_t val;
---
> uint64_t val;
418c439
< "lw %0, 0(%1) \n\t"
---
> "ld %0, 0(%1) \n\t"
426,427c447,448
< static __inline__ uint32_t
< xlr_paddr_lw(uint64_t paddr)
---
> static __inline uint32_t
> xlr_paddr_ld(uint64_t paddr)
429c450,451
< uint32_t high, low, tmp;
---
> uint32_t addrh, addrl;
> uint32_t valh, vall;
431,432c453,454
< high = 0x98000000 | (paddr >> 32);
< low = paddr & 0xffffffff;
---
> addrh = 0x98000000 | (paddr >> 32);
> addrl = paddr & 0xffffffff;
437,441c459,464
< "dsll32 %1, %1, 0 \n\t"
< "dsll32 %2, %2, 0 \n\t" /* get rid of the */
< "dsrl32 %2, %2, 0 \n\t" /* sign extend */
< "or %1, %1, %2 \n\t"
< "lw %0, 0(%1) \n\t"
---
> "dsll32 %2, %2, 0 \n\t"
> "dsll32 %3, %3, 0 \n\t" /* get rid of the */
> "dsrl32 %3, %3, 0 \n\t" /* sign extend */
> "or %2, %2, %3 \n\t"
> "lw %0, 0(%2) \n\t"
> "lw %1, 4(%2) \n\t"
443,444c466,467
< : "=r"(tmp)
< : "r"(high), "r"(low));
---
> : "=&r"(valh), "=r"(vall)
> : "r"(addrh), "r"(addrl));
446c469
< return tmp;
---
> return (((uint64_t)valh << 32) | vall);
449a473,505
> /*
> * XXX: Not really needed in n32 or n64, retain for now
> */
> #if defined(__mips_n64) || defined(__mips_n32)
> static __inline uint32_t
> xlr_enable_kx(void)
> {
>
> return (0);
> }
>
> static __inline void
> xlr_restore_kx(uint32_t sr)
> {
> }
> #else
> static __inline uint32_t
> xlr_enable_kx(void)
> {
> uint32_t sr = mips_rd_status();
>
> mips_wr_status((sr & ~MIPS_SR_INT_IE) | MIPS_SR_KX);
> return (sr);
> }
>
> static __inline void
> xlr_restore_kx(uint32_t sr)
> {
>
> mips_wr_status(sr);
> }
> #endif
>