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nlm_hal.c (227783) nlm_hal.c (233533)
1/*-
2 * Copyright 2003-2011 Netlogic Microsystems (Netlogic). All rights
3 * reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met:
8 *

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23 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
24 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
25 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
26 * THE POSSIBILITY OF SUCH DAMAGE.
27 *
28 * NETLOGIC_BSD */
29
30#include <sys/cdefs.h>
1/*-
2 * Copyright 2003-2011 Netlogic Microsystems (Netlogic). All rights
3 * reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met:
8 *

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23 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
24 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
25 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
26 * THE POSSIBILITY OF SUCH DAMAGE.
27 *
28 * NETLOGIC_BSD */
29
30#include <sys/cdefs.h>
31__FBSDID("$FreeBSD: head/sys/mips/nlm/hal/nlm_hal.c 227783 2011-11-21 08:12:36Z jchandra $");
31__FBSDID("$FreeBSD: head/sys/mips/nlm/hal/nlm_hal.c 233533 2012-03-27 07:39:05Z jchandra $");
32#include <sys/param.h>
33#include <sys/types.h>
34#include <sys/systm.h>
35
36#include <mips/nlm/hal/mips-extns.h>
37#include <mips/nlm/hal/haldefs.h>
38#include <mips/nlm/hal/iomap.h>
39#include <mips/nlm/hal/sys.h>

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50int pic_irt_uart0;
51int pic_irt_uart1;
52int pic_irt_pcie_lnk0;
53int pic_irt_pcie_lnk1;
54int pic_irt_pcie_lnk2;
55int pic_irt_pcie_lnk3;
56
57uint32_t
32#include <sys/param.h>
33#include <sys/types.h>
34#include <sys/systm.h>
35
36#include <mips/nlm/hal/mips-extns.h>
37#include <mips/nlm/hal/haldefs.h>
38#include <mips/nlm/hal/iomap.h>
39#include <mips/nlm/hal/sys.h>

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50int pic_irt_uart0;
51int pic_irt_uart1;
52int pic_irt_pcie_lnk0;
53int pic_irt_pcie_lnk1;
54int pic_irt_pcie_lnk2;
55int pic_irt_pcie_lnk3;
56
57uint32_t
58xlp_get_cpu_frequency(int core)
58xlp_get_cpu_frequency(int node, int core)
59{
59{
60 uint64_t sysbase = nlm_get_sys_regbase(nlm_nodeid());
61 uint64_t num;
60 uint64_t sysbase = nlm_get_sys_regbase(node);
62 unsigned int pll_divf, pll_divr, dfs_div, ext_div;
61 unsigned int pll_divf, pll_divr, dfs_div, ext_div;
63 unsigned int rstval, dfsval, denom;
62 unsigned int rstval, dfsval;
64
65 rstval = nlm_read_sys_reg(sysbase, SYS_POWER_ON_RESET_CFG);
66 dfsval = nlm_read_sys_reg(sysbase, SYS_CORE_DFS_DIV_VALUE);
67 pll_divf = ((rstval >> 10) & 0x7f) + 1;
68 pll_divr = ((rstval >> 8) & 0x3) + 1;
63
64 rstval = nlm_read_sys_reg(sysbase, SYS_POWER_ON_RESET_CFG);
65 dfsval = nlm_read_sys_reg(sysbase, SYS_CORE_DFS_DIV_VALUE);
66 pll_divf = ((rstval >> 10) & 0x7f) + 1;
67 pll_divr = ((rstval >> 8) & 0x3) + 1;
69 ext_div = ((rstval >> 30) & 0x3) + 1;
70 dfs_div = ((dfsval >> (core * 4)) & 0xf) + 1;
68 if (!nlm_is_xlp8xx_ax())
69 ext_div = ((rstval >> 30) & 0x3) + 1;
70 else
71 ext_div = 1;
72 dfs_div = ((dfsval >> (core << 2)) & 0xf) + 1;
71
73
72 num = 800000000ULL * pll_divf;
73 denom = 3 * pll_divr * ext_div * dfs_div;
74 num = num/denom;
75 return (num);
74 return ((800000000ULL * pll_divf)/(3 * pll_divr * ext_div * dfs_div));
76}
77
75}
76
77static u_int
78nlm_get_device_frequency(uint64_t sysbase, int devtype)
79{
80 uint32_t pllctrl, dfsdiv, spf, spr, div_val;
81 int extra_div;
82
83 pllctrl = nlm_read_sys_reg(sysbase, SYS_PLL_CTRL);
84 if (devtype <= 7)
85 div_val = nlm_read_sys_reg(sysbase, SYS_DFS_DIV_VALUE0);
86 else {
87 devtype -= 8;
88 div_val = nlm_read_sys_reg(sysbase, SYS_DFS_DIV_VALUE1);
89 }
90 dfsdiv = ((div_val >> (devtype << 2)) & 0xf) + 1;
91 spf = (pllctrl >> 3 & 0x7f) + 1;
92 spr = (pllctrl >> 1 & 0x03) + 1;
93 extra_div = nlm_is_xlp8xx_ax() ? 1 : 2;
94
95 return ((400 * spf) / (3 * extra_div * spr * dfsdiv));
96}
97
98int
99nlm_set_device_frequency(int node, int devtype, int frequency)
100{
101 uint64_t sysbase;
102 u_int cur_freq;
103 int dec_div;
104
105 sysbase = nlm_get_sys_regbase(node);
106 cur_freq = nlm_get_device_frequency(sysbase, devtype);
107 if (cur_freq < (frequency - 5))
108 dec_div = 1;
109 else
110 dec_div = 0;
111
112 for(;;) {
113 if ((cur_freq >= (frequency - 5)) && (cur_freq <= frequency))
114 break;
115 if (dec_div)
116 nlm_write_sys_reg(sysbase, SYS_DFS_DIV_DEC_CTRL,
117 (1 << devtype));
118 else
119 nlm_write_sys_reg(sysbase, SYS_DFS_DIV_INC_CTRL,
120 (1 << devtype));
121 cur_freq = nlm_get_device_frequency(sysbase, devtype);
122 }
123 return (nlm_get_device_frequency(sysbase, devtype));
124}
125
78void
126void
79nlm_pic_irt_init(void)
127nlm_pic_irt_init(int node)
80{
128{
81 pic_irt_ehci0 = nlm_irtstart(nlm_get_usb_pcibase(nlm_nodeid(), 0));
82 pic_irt_ehci1 = nlm_irtstart(nlm_get_usb_pcibase(nlm_nodeid(), 3));
83 pic_irt_uart0 = nlm_irtstart(nlm_get_uart_pcibase(nlm_nodeid(), 0));
84 pic_irt_uart1 = nlm_irtstart(nlm_get_uart_pcibase(nlm_nodeid(), 1));
129 pic_irt_ehci0 = nlm_irtstart(nlm_get_usb_pcibase(node, 0));
130 pic_irt_ehci1 = nlm_irtstart(nlm_get_usb_pcibase(node, 3));
131 pic_irt_uart0 = nlm_irtstart(nlm_get_uart_pcibase(node, 0));
132 pic_irt_uart1 = nlm_irtstart(nlm_get_uart_pcibase(node, 1));
85
86 /* Hardcoding the PCIE IRT information as PIC doesn't
87 understand any value other than 78,79,80,81 for PCIE0/1/2/3 */
88 pic_irt_pcie_lnk0 = 78;
89 pic_irt_pcie_lnk1 = 79;
90 pic_irt_pcie_lnk2 = 80;
91 pic_irt_pcie_lnk3 = 81;
92}

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102
103 return (pic_irt_pcie_lnk0 + link);
104}
105
106int
107xlp_irt_to_irq(int irt)
108{
109 if (irt == pic_irt_ehci0)
133
134 /* Hardcoding the PCIE IRT information as PIC doesn't
135 understand any value other than 78,79,80,81 for PCIE0/1/2/3 */
136 pic_irt_pcie_lnk0 = 78;
137 pic_irt_pcie_lnk1 = 79;
138 pic_irt_pcie_lnk2 = 80;
139 pic_irt_pcie_lnk3 = 81;
140}

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150
151 return (pic_irt_pcie_lnk0 + link);
152}
153
154int
155xlp_irt_to_irq(int irt)
156{
157 if (irt == pic_irt_ehci0)
110 return PIC_EHCI_0_IRQ;
158 return PIC_EHCI_0_IRQ;
111 else if (irt == pic_irt_ehci1)
159 else if (irt == pic_irt_ehci1)
112 return PIC_EHCI_1_IRQ;
160 return PIC_EHCI_1_IRQ;
113 else if (irt == pic_irt_uart0)
161 else if (irt == pic_irt_uart0)
114 return PIC_UART_0_IRQ;
162 return PIC_UART_0_IRQ;
115 else if (irt == pic_irt_uart1)
163 else if (irt == pic_irt_uart1)
116 return PIC_UART_1_IRQ;
164 return PIC_UART_1_IRQ;
117 else if (irt == pic_irt_pcie_lnk0)
165 else if (irt == pic_irt_pcie_lnk0)
118 return PIC_PCIE_0_IRQ;
166 return PIC_PCIE_0_IRQ;
119 else if (irt == pic_irt_pcie_lnk1)
167 else if (irt == pic_irt_pcie_lnk1)
120 return PIC_PCIE_1_IRQ;
168 return PIC_PCIE_1_IRQ;
121 else if (irt == pic_irt_pcie_lnk2)
169 else if (irt == pic_irt_pcie_lnk2)
122 return PIC_PCIE_2_IRQ;
170 return PIC_PCIE_2_IRQ;
123 else if (irt == pic_irt_pcie_lnk3)
171 else if (irt == pic_irt_pcie_lnk3)
124 return PIC_PCIE_3_IRQ;
172 return PIC_PCIE_3_IRQ;
125 else {
173 else {
126 printf("Cannot find irq for IRT %d\n", irt);
127 return 0;
174 if (bootverbose)
175 printf("Cannot find irq for IRT %d\n", irt);
176 return 0;
128 }
129}
130
131int
132xlp_irq_to_irt(int irq)
133{
134 switch (irq) {
135 case PIC_EHCI_0_IRQ :

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151 default: panic("Bad IRQ %d\n", irq);
152 }
153}
154
155int
156xlp_irq_is_picintr(int irq)
157{
158 switch (irq) {
177 }
178}
179
180int
181xlp_irq_to_irt(int irq)
182{
183 switch (irq) {
184 case PIC_EHCI_0_IRQ :

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200 default: panic("Bad IRQ %d\n", irq);
201 }
202}
203
204int
205xlp_irq_is_picintr(int irq)
206{
207 switch (irq) {
159 case PIC_MMC_IRQ : return 1;
160 case PIC_EHCI_0_IRQ : return 1;
161 case PIC_EHCI_1_IRQ : return 1;
162 case PIC_UART_0_IRQ : return 1;
163 case PIC_UART_1_IRQ : return 1;
164 case PIC_PCIE_0_IRQ : return 1;
165 case PIC_PCIE_1_IRQ : return 1;
166 case PIC_PCIE_2_IRQ : return 1;
167 case PIC_PCIE_3_IRQ : return 1;
168 default: return 0;
208 case PIC_EHCI_0_IRQ :
209 case PIC_EHCI_1_IRQ :
210 case PIC_UART_0_IRQ :
211 case PIC_UART_1_IRQ :
212 case PIC_PCIE_0_IRQ :
213 case PIC_PCIE_1_IRQ :
214 case PIC_PCIE_2_IRQ :
215 case PIC_PCIE_3_IRQ :
216 return (1);
217 default: return (0);
169 }
170}
218 }
219}