| octeon_gpiovar.h (277971) | octeon_gpiovar.h (277996) |
|---|---|
| 1/*- 2 * Copyright (c) 2011, Oleksandr Tymoshenko <gonzo@FreeBSD.org> 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright --- 10 unchanged lines hidden (view full) --- 19 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 20 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 21 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 23 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 25 * SUCH DAMAGE. 26 * | 1/*- 2 * Copyright (c) 2011, Oleksandr Tymoshenko <gonzo@FreeBSD.org> 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright --- 10 unchanged lines hidden (view full) --- 19 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 20 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 21 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 23 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 25 * SUCH DAMAGE. 26 * |
| 27 * $FreeBSD: head/sys/mips/cavium/octeon_gpiovar.h 277971 2015-01-31 12:43:30Z loos $ | 27 * $FreeBSD: head/sys/mips/cavium/octeon_gpiovar.h 277996 2015-01-31 19:32:14Z loos $ |
| 28 * 29 */ 30 31#ifndef __OCTEON_GPIOVAR_H__ 32#define __OCTEON_GPIOVAR_H__ 33 34#define GPIO_LOCK(_sc) mtx_lock(&(_sc)->gpio_mtx) 35#define GPIO_UNLOCK(_sc) mtx_unlock(&(_sc)->gpio_mtx) 36#define GPIO_LOCK_ASSERT(_sc) mtx_assert(&(_sc)->gpio_mtx, MA_OWNED) 37 38#define OCTEON_GPIO_IRQ_LEVEL 0 39#define OCTEON_GPIO_IRQ_EDGE 1 40 41#define OCTEON_GPIO_PINS 24 42#define OCTEON_GPIO_IRQS 16 43 44struct octeon_gpio_softc { 45 device_t dev; | 28 * 29 */ 30 31#ifndef __OCTEON_GPIOVAR_H__ 32#define __OCTEON_GPIOVAR_H__ 33 34#define GPIO_LOCK(_sc) mtx_lock(&(_sc)->gpio_mtx) 35#define GPIO_UNLOCK(_sc) mtx_unlock(&(_sc)->gpio_mtx) 36#define GPIO_LOCK_ASSERT(_sc) mtx_assert(&(_sc)->gpio_mtx, MA_OWNED) 37 38#define OCTEON_GPIO_IRQ_LEVEL 0 39#define OCTEON_GPIO_IRQ_EDGE 1 40 41#define OCTEON_GPIO_PINS 24 42#define OCTEON_GPIO_IRQS 16 43 44struct octeon_gpio_softc { 45 device_t dev; |
| 46 device_t busdev; |
|
| 46 struct mtx gpio_mtx; 47 struct resource *gpio_irq_res[OCTEON_GPIO_IRQS]; 48 int gpio_irq_rid[OCTEON_GPIO_IRQS]; 49 void *gpio_ih[OCTEON_GPIO_IRQS]; 50 void *gpio_intr_cookies[OCTEON_GPIO_IRQS]; 51 int gpio_npins; 52 struct gpio_pin gpio_pins[OCTEON_GPIO_PINS]; 53}; 54 55#endif /* __OCTEON_GPIOVAR_H__ */ | 47 struct mtx gpio_mtx; 48 struct resource *gpio_irq_res[OCTEON_GPIO_IRQS]; 49 int gpio_irq_rid[OCTEON_GPIO_IRQS]; 50 void *gpio_ih[OCTEON_GPIO_IRQS]; 51 void *gpio_intr_cookies[OCTEON_GPIO_IRQS]; 52 int gpio_npins; 53 struct gpio_pin gpio_pins[OCTEON_GPIO_PINS]; 54}; 55 56#endif /* __OCTEON_GPIOVAR_H__ */ |