| if_argevar.h (278104) | if_argevar.h (289476) |
|---|---|
| 1/*- 2 * Copyright (c) 2009, Oleksandr Tymoshenko 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright --- 10 unchanged lines hidden (view full) --- 19 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 20 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 21 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 23 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 25 * SUCH DAMAGE. 26 * | 1/*- 2 * Copyright (c) 2009, Oleksandr Tymoshenko 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright --- 10 unchanged lines hidden (view full) --- 19 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 20 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 21 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 23 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 25 * SUCH DAMAGE. 26 * |
| 27 * $FreeBSD: head/sys/mips/atheros/if_argevar.h 278104 2015-02-02 17:33:00Z sbruno $ | 27 * $FreeBSD: head/sys/mips/atheros/if_argevar.h 289476 2015-10-18 00:59:28Z adrian $ |
| 28 */ 29 30#ifndef __IF_ARGEVAR_H__ 31#define __IF_ARGEVAR_H__ 32 33#define ARGE_NPHY 32 34#define ARGE_TX_RING_COUNT 128 35#define ARGE_RX_RING_COUNT 128 36#define ARGE_RX_DMA_SIZE ARGE_RX_RING_COUNT * sizeof(struct arge_desc) 37#define ARGE_TX_DMA_SIZE ARGE_TX_RING_COUNT * sizeof(struct arge_desc) 38#define ARGE_MAXFRAGS 8 39#define ARGE_RING_ALIGN sizeof(struct arge_desc) | 28 */ 29 30#ifndef __IF_ARGEVAR_H__ 31#define __IF_ARGEVAR_H__ 32 33#define ARGE_NPHY 32 34#define ARGE_TX_RING_COUNT 128 35#define ARGE_RX_RING_COUNT 128 36#define ARGE_RX_DMA_SIZE ARGE_RX_RING_COUNT * sizeof(struct arge_desc) 37#define ARGE_TX_DMA_SIZE ARGE_TX_RING_COUNT * sizeof(struct arge_desc) 38#define ARGE_MAXFRAGS 8 39#define ARGE_RING_ALIGN sizeof(struct arge_desc) |
| 40#define ARGE_RX_ALIGN sizeof(uint32_t) | 40#define ARGE_RX_ALIGN_4BYTE sizeof(uint32_t) 41#define ARGE_RX_ALIGN_1BYTE sizeof(char) 42#define ARGE_TX_ALIGN_4BYTE sizeof(uint32_t) 43#define ARGE_TX_ALIGN_1BYTE sizeof(char) |
| 41#define ARGE_MAXFRAGS 8 42#define ARGE_TX_RING_ADDR(sc, i) \ 43 ((sc)->arge_rdata.arge_tx_ring_paddr + sizeof(struct arge_desc) * (i)) 44#define ARGE_RX_RING_ADDR(sc, i) \ 45 ((sc)->arge_rdata.arge_rx_ring_paddr + sizeof(struct arge_desc) * (i)) 46#define ARGE_INC(x,y) (x) = (((x) + 1) % y) 47 48 --- 95 unchanged lines hidden (view full) --- 144 * Allow PLL values to be overridden. 145 */ 146struct arge_pll_data { 147 uint32_t pll_10; 148 uint32_t pll_100; 149 uint32_t pll_1000; 150}; 151 | 44#define ARGE_MAXFRAGS 8 45#define ARGE_TX_RING_ADDR(sc, i) \ 46 ((sc)->arge_rdata.arge_tx_ring_paddr + sizeof(struct arge_desc) * (i)) 47#define ARGE_RX_RING_ADDR(sc, i) \ 48 ((sc)->arge_rdata.arge_rx_ring_paddr + sizeof(struct arge_desc) * (i)) 49#define ARGE_INC(x,y) (x) = (((x) + 1) % y) 50 51 --- 95 unchanged lines hidden (view full) --- 147 * Allow PLL values to be overridden. 148 */ 149struct arge_pll_data { 150 uint32_t pll_10; 151 uint32_t pll_100; 152 uint32_t pll_1000; 153}; 154 |
| 155/* 156 * Hardware specific behaviours. 157 */ 158 159/* 160 * Older chips support 4 byte only transmit and receive 161 * addresses. 162 * 163 * Later chips support arbitrary TX and later later, 164 * arbitrary RX addresses. 165 */ 166#define ARGE_HW_FLG_TX_DESC_ALIGN_4BYTE 0x00000001 167#define ARGE_HW_FLG_RX_DESC_ALIGN_4BYTE 0x00000002 168#define ARGE_HW_FLG_TX_DESC_ALIGN_1BYTE 0x00000004 169#define ARGE_HW_FLG_RX_DESC_ALIGN_1BYTE 0x00000008 170 |
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| 152struct arge_softc { 153 struct ifnet *arge_ifp; /* interface info */ 154 device_t arge_dev; 155 struct ifmedia arge_ifmedia; 156 /* 157 * Media & duples settings for multiPHY MAC 158 */ 159 uint32_t arge_media_type; --- 15 unchanged lines hidden (view full) --- 175 struct task arge_link_task; 176 struct arge_chain_data arge_cdata; 177 struct arge_ring_data arge_rdata; 178 int arge_link_status; 179 int arge_detach; 180 uint32_t arge_intr_status; 181 int arge_mac_unit; 182 int arge_if_flags; | 171struct arge_softc { 172 struct ifnet *arge_ifp; /* interface info */ 173 device_t arge_dev; 174 struct ifmedia arge_ifmedia; 175 /* 176 * Media & duples settings for multiPHY MAC 177 */ 178 uint32_t arge_media_type; --- 15 unchanged lines hidden (view full) --- 194 struct task arge_link_task; 195 struct arge_chain_data arge_cdata; 196 struct arge_ring_data arge_rdata; 197 int arge_link_status; 198 int arge_detach; 199 uint32_t arge_intr_status; 200 int arge_mac_unit; 201 int arge_if_flags; |
| 202 uint32_t arge_hw_flags; |
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| 183 uint32_t arge_debug; 184 uint32_t arge_mdiofreq; 185 struct { 186 uint32_t tx_pkts_unaligned; | 203 uint32_t arge_debug; 204 uint32_t arge_mdiofreq; 205 struct { 206 uint32_t tx_pkts_unaligned; |
| 207 uint32_t tx_pkts_unaligned_start; 208 uint32_t tx_pkts_unaligned_len; 209 uint32_t tx_pkts_nosegs; |
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| 187 uint32_t tx_pkts_aligned; 188 uint32_t rx_overflow; 189 uint32_t tx_underflow; | 210 uint32_t tx_pkts_aligned; 211 uint32_t rx_overflow; 212 uint32_t tx_underflow; |
| 213 uint32_t intr_stray; 214 uint32_t intr_stray2; 215 uint32_t intr_ok; |
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| 190 } stats; 191}; 192 193#endif /* __IF_ARGEVAR_H__ */ | 216 } stats; 217}; 218 219#endif /* __IF_ARGEVAR_H__ */ |