ar724xreg.h (219591) | ar724xreg.h (220180) |
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1/*- 2 * Copyright (c) 2010 Adrian Chadd 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright --- 10 unchanged lines hidden (view full) --- 19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 24 * SUCH DAMAGE. 25 */ 26 | 1/*- 2 * Copyright (c) 2010 Adrian Chadd 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright --- 10 unchanged lines hidden (view full) --- 19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 24 * SUCH DAMAGE. 25 */ 26 |
27/* $FreeBSD: head/sys/mips/atheros/ar724xreg.h 219591 2011-03-13 08:36:57Z adrian $ */ | 27/* $FreeBSD: head/sys/mips/atheros/ar724xreg.h 220180 2011-03-31 02:36:22Z adrian $ */ |
28 29#ifndef __AR72XX_REG_H__ 30#define __AR72XX_REG_H__ 31 32#define AR724X_PLL_REG_CPU_CONFIG AR71XX_PLL_CPU_BASE + 0x00 33#define AR724X_PLL_REG_PCIE_CONFIG AR71XX_PLL_CPU_BASE + 0x18 34 35#define AR724X_PLL_DIV_SHIFT 0 --- 10 unchanged lines hidden (view full) --- 46#define AR724X_PLL_VAL_10 0x00991099 47 48#define AR724X_BASE_FREQ 5000000 49 50#define AR724X_DDR_REG_FLUSH_GE0 (AR71XX_DDR_CONFIG + 0x7c) 51#define AR724X_DDR_REG_FLUSH_GE1 (AR71XX_DDR_CONFIG + 0x80) 52 53#define AR724X_RESET_REG_RESET_MODULE AR71XX_RST_BLOCK_BASE + 0x1c | 28 29#ifndef __AR72XX_REG_H__ 30#define __AR72XX_REG_H__ 31 32#define AR724X_PLL_REG_CPU_CONFIG AR71XX_PLL_CPU_BASE + 0x00 33#define AR724X_PLL_REG_PCIE_CONFIG AR71XX_PLL_CPU_BASE + 0x18 34 35#define AR724X_PLL_DIV_SHIFT 0 --- 10 unchanged lines hidden (view full) --- 46#define AR724X_PLL_VAL_10 0x00991099 47 48#define AR724X_BASE_FREQ 5000000 49 50#define AR724X_DDR_REG_FLUSH_GE0 (AR71XX_DDR_CONFIG + 0x7c) 51#define AR724X_DDR_REG_FLUSH_GE1 (AR71XX_DDR_CONFIG + 0x80) 52 53#define AR724X_RESET_REG_RESET_MODULE AR71XX_RST_BLOCK_BASE + 0x1c |
54#define AR724X_RESET_USB_HOST (1 << 5) 55#define AR724X_RESET_USB_PHY (1 << 4) |
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54#define AR724X_RESET_MODULE_USB_OHCI_DLL (1 << 3) 55 56/* XXX so USB requires different init code? -adrian */ 57#define AR7240_OHCI_BASE 0x1b000000 58#define AR7240_OHCI_SIZE 0x01000000 59#define AR724X_DDR_REG_FLUSH_USB (AR71XX_DDR_CONFIG + 0x84) 60 61#define AR724X_PCI_CRP_BASE (AR71XX_APB_BASE + 0x000C0000) --- 26 unchanged lines hidden --- | 56#define AR724X_RESET_MODULE_USB_OHCI_DLL (1 << 3) 57 58/* XXX so USB requires different init code? -adrian */ 59#define AR7240_OHCI_BASE 0x1b000000 60#define AR7240_OHCI_SIZE 0x01000000 61#define AR724X_DDR_REG_FLUSH_USB (AR71XX_DDR_CONFIG + 0x84) 62 63#define AR724X_PCI_CRP_BASE (AR71XX_APB_BASE + 0x000C0000) --- 26 unchanged lines hidden --- |