ar71xx_setup.c (276685) | ar71xx_setup.c (290910) |
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1/*- 2 * Copyright (c) 2010 Adrian Chadd 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright --- 11 unchanged lines hidden (view full) --- 20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 24 * SUCH DAMAGE. 25 */ 26 27#include <sys/cdefs.h> | 1/*- 2 * Copyright (c) 2010 Adrian Chadd 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright --- 11 unchanged lines hidden (view full) --- 20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 24 * SUCH DAMAGE. 25 */ 26 27#include <sys/cdefs.h> |
28__FBSDID("$FreeBSD: head/sys/mips/atheros/ar71xx_setup.c 276685 2015-01-05 02:06:26Z adrian $"); | 28__FBSDID("$FreeBSD: head/sys/mips/atheros/ar71xx_setup.c 290910 2015-11-16 04:28:00Z adrian $"); |
29 30#include "opt_ddb.h" 31 32#include <sys/param.h> 33#include <sys/conf.h> 34#include <sys/kernel.h> 35#include <sys/systm.h> 36#include <sys/bus.h> --- 13 unchanged lines hidden (view full) --- 50#include <machine/md_var.h> 51#include <machine/trap.h> 52#include <machine/vmparam.h> 53 54#include <mips/atheros/ar71xxreg.h> 55#include <mips/atheros/ar933xreg.h> 56#include <mips/atheros/ar934xreg.h> 57#include <mips/atheros/qca955xreg.h> | 29 30#include "opt_ddb.h" 31 32#include <sys/param.h> 33#include <sys/conf.h> 34#include <sys/kernel.h> 35#include <sys/systm.h> 36#include <sys/bus.h> --- 13 unchanged lines hidden (view full) --- 50#include <machine/md_var.h> 51#include <machine/trap.h> 52#include <machine/vmparam.h> 53 54#include <mips/atheros/ar71xxreg.h> 55#include <mips/atheros/ar933xreg.h> 56#include <mips/atheros/ar934xreg.h> 57#include <mips/atheros/qca955xreg.h> |
58#include <mips/atheros/qca953xreg.h> |
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58 59#include <mips/atheros/ar71xx_setup.h> 60 61#include <mips/atheros/ar71xx_cpudef.h> 62 63#include <mips/atheros/ar71xx_chip.h> 64#include <mips/atheros/ar724x_chip.h> 65#include <mips/atheros/ar91xx_chip.h> 66#include <mips/atheros/ar933x_chip.h> 67#include <mips/atheros/ar934x_chip.h> | 59 60#include <mips/atheros/ar71xx_setup.h> 61 62#include <mips/atheros/ar71xx_cpudef.h> 63 64#include <mips/atheros/ar71xx_chip.h> 65#include <mips/atheros/ar724x_chip.h> 66#include <mips/atheros/ar91xx_chip.h> 67#include <mips/atheros/ar933x_chip.h> 68#include <mips/atheros/ar934x_chip.h> |
69#include <mips/atheros/qca953x_chip.h> |
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68#include <mips/atheros/qca955x_chip.h> 69 70#define AR71XX_SYS_TYPE_LEN 128 71 72static char ar71xx_sys_type[AR71XX_SYS_TYPE_LEN]; 73enum ar71xx_soc_type ar71xx_soc; 74struct ar71xx_cpu_def * ar71xx_cpu_ops = NULL; 75 --- 105 unchanged lines hidden (view full) --- 181 case REV_ID_MAJOR_AR9344: 182 minor = 0; 183 rev = (id & AR934X_REV_ID_REVISION_MASK); 184 chip = "9344"; 185 ar71xx_soc = AR71XX_SOC_AR9344; 186 ar71xx_cpu_ops = &ar934x_chip_def; 187 break; 188 | 70#include <mips/atheros/qca955x_chip.h> 71 72#define AR71XX_SYS_TYPE_LEN 128 73 74static char ar71xx_sys_type[AR71XX_SYS_TYPE_LEN]; 75enum ar71xx_soc_type ar71xx_soc; 76struct ar71xx_cpu_def * ar71xx_cpu_ops = NULL; 77 --- 105 unchanged lines hidden (view full) --- 183 case REV_ID_MAJOR_AR9344: 184 minor = 0; 185 rev = (id & AR934X_REV_ID_REVISION_MASK); 186 chip = "9344"; 187 ar71xx_soc = AR71XX_SOC_AR9344; 188 ar71xx_cpu_ops = &ar934x_chip_def; 189 break; 190 |
191 case REV_ID_MAJOR_QCA9533: 192 minor = 0; 193 rev = (id & QCA953X_REV_ID_REVISION_MASK); 194 chip = "9533"; 195 ar71xx_soc = AR71XX_SOC_QCA9533; 196 ar71xx_cpu_ops = &qca953x_chip_def; 197 break; 198 199 case REV_ID_MAJOR_QCA9533_V2: 200 minor = 0; 201 rev = (id & QCA953X_REV_ID_REVISION_MASK); 202 chip = "9533v2"; 203 ar71xx_soc = AR71XX_SOC_QCA9533_V2; 204 ar71xx_cpu_ops = &qca953x_chip_def; 205 break; 206 |
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189 case REV_ID_MAJOR_QCA9556: 190 minor = 0; 191 rev = (id & QCA955X_REV_ID_REVISION_MASK); 192 chip = "9556"; 193 ar71xx_soc = AR71XX_SOC_QCA9556; 194 ar71xx_cpu_ops = &qca955x_chip_def; 195 break; 196 --- 21 unchanged lines hidden --- | 207 case REV_ID_MAJOR_QCA9556: 208 minor = 0; 209 rev = (id & QCA955X_REV_ID_REVISION_MASK); 210 chip = "9556"; 211 ar71xx_soc = AR71XX_SOC_QCA9556; 212 ar71xx_cpu_ops = &qca955x_chip_def; 213 break; 214 --- 21 unchanged lines hidden --- |