ar71xx_setup.c (253511) | ar71xx_setup.c (276685) |
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1/*- 2 * Copyright (c) 2010 Adrian Chadd 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright --- 11 unchanged lines hidden (view full) --- 20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 24 * SUCH DAMAGE. 25 */ 26 27#include <sys/cdefs.h> | 1/*- 2 * Copyright (c) 2010 Adrian Chadd 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright --- 11 unchanged lines hidden (view full) --- 20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 24 * SUCH DAMAGE. 25 */ 26 27#include <sys/cdefs.h> |
28__FBSDID("$FreeBSD: head/sys/mips/atheros/ar71xx_setup.c 253511 2013-07-21 03:56:57Z adrian $"); | 28__FBSDID("$FreeBSD: head/sys/mips/atheros/ar71xx_setup.c 276685 2015-01-05 02:06:26Z adrian $"); |
29 30#include "opt_ddb.h" 31 32#include <sys/param.h> 33#include <sys/conf.h> 34#include <sys/kernel.h> 35#include <sys/systm.h> 36#include <sys/bus.h> --- 12 unchanged lines hidden (view full) --- 49#include <machine/hwfunc.h> 50#include <machine/md_var.h> 51#include <machine/trap.h> 52#include <machine/vmparam.h> 53 54#include <mips/atheros/ar71xxreg.h> 55#include <mips/atheros/ar933xreg.h> 56#include <mips/atheros/ar934xreg.h> | 29 30#include "opt_ddb.h" 31 32#include <sys/param.h> 33#include <sys/conf.h> 34#include <sys/kernel.h> 35#include <sys/systm.h> 36#include <sys/bus.h> --- 12 unchanged lines hidden (view full) --- 49#include <machine/hwfunc.h> 50#include <machine/md_var.h> 51#include <machine/trap.h> 52#include <machine/vmparam.h> 53 54#include <mips/atheros/ar71xxreg.h> 55#include <mips/atheros/ar933xreg.h> 56#include <mips/atheros/ar934xreg.h> |
57#include <mips/atheros/qca955xreg.h> |
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57 58#include <mips/atheros/ar71xx_setup.h> 59 60#include <mips/atheros/ar71xx_cpudef.h> 61 62#include <mips/atheros/ar71xx_chip.h> 63#include <mips/atheros/ar724x_chip.h> 64#include <mips/atheros/ar91xx_chip.h> 65#include <mips/atheros/ar933x_chip.h> 66#include <mips/atheros/ar934x_chip.h> | 58 59#include <mips/atheros/ar71xx_setup.h> 60 61#include <mips/atheros/ar71xx_cpudef.h> 62 63#include <mips/atheros/ar71xx_chip.h> 64#include <mips/atheros/ar724x_chip.h> 65#include <mips/atheros/ar91xx_chip.h> 66#include <mips/atheros/ar933x_chip.h> 67#include <mips/atheros/ar934x_chip.h> |
68#include <mips/atheros/qca955x_chip.h> |
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67 68#define AR71XX_SYS_TYPE_LEN 128 69 70static char ar71xx_sys_type[AR71XX_SYS_TYPE_LEN]; 71enum ar71xx_soc_type ar71xx_soc; 72struct ar71xx_cpu_def * ar71xx_cpu_ops = NULL; 73 74void --- 104 unchanged lines hidden (view full) --- 179 case REV_ID_MAJOR_AR9344: 180 minor = 0; 181 rev = (id & AR934X_REV_ID_REVISION_MASK); 182 chip = "9344"; 183 ar71xx_soc = AR71XX_SOC_AR9344; 184 ar71xx_cpu_ops = &ar934x_chip_def; 185 break; 186 | 69 70#define AR71XX_SYS_TYPE_LEN 128 71 72static char ar71xx_sys_type[AR71XX_SYS_TYPE_LEN]; 73enum ar71xx_soc_type ar71xx_soc; 74struct ar71xx_cpu_def * ar71xx_cpu_ops = NULL; 75 76void --- 104 unchanged lines hidden (view full) --- 181 case REV_ID_MAJOR_AR9344: 182 minor = 0; 183 rev = (id & AR934X_REV_ID_REVISION_MASK); 184 chip = "9344"; 185 ar71xx_soc = AR71XX_SOC_AR9344; 186 ar71xx_cpu_ops = &ar934x_chip_def; 187 break; 188 |
189 case REV_ID_MAJOR_QCA9556: 190 minor = 0; 191 rev = (id & QCA955X_REV_ID_REVISION_MASK); 192 chip = "9556"; 193 ar71xx_soc = AR71XX_SOC_QCA9556; 194 ar71xx_cpu_ops = &qca955x_chip_def; 195 break; 196 197 case REV_ID_MAJOR_QCA9558: 198 minor = 0; 199 rev = (id & QCA955X_REV_ID_REVISION_MASK); 200 chip = "9558"; 201 ar71xx_soc = AR71XX_SOC_QCA9558; 202 ar71xx_cpu_ops = &qca955x_chip_def; 203 break; 204 |
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187 default: 188 panic("ar71xx: unknown chip id:0x%08x\n", id); 189 } 190 191 sprintf(ar71xx_sys_type, "Atheros AR%s rev %u", chip, rev); 192} 193 194const char * 195ar71xx_get_system_type(void) 196{ 197 return ar71xx_sys_type; 198} 199 | 205 default: 206 panic("ar71xx: unknown chip id:0x%08x\n", id); 207 } 208 209 sprintf(ar71xx_sys_type, "Atheros AR%s rev %u", chip, rev); 210} 211 212const char * 213ar71xx_get_system_type(void) 214{ 215 return ar71xx_sys_type; 216} 217 |