1/*-
2 * Copyright (c) 2008 Sam Leffler. All rights reserved.
3 *
4 * Redistribution and use in source and binary forms, with or without
5 * modification, are permitted provided that the following conditions
6 * are met:
7 * 1. Redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer.
9 * 2. Redistributions in binary form must reproduce the above copyright
10 * notice, this list of conditions and the following disclaimer in the
11 * documentation and/or other materials provided with the distribution.
12 *
13 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
14 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
15 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
16 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
17 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
18 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
19 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
20 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
21 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
22 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
23 */
24
25/*
26 * AR71XX attachment driver for the USB Enhanced Host Controller.
27 */
28
29#include <sys/cdefs.h>
| 1/*-
2 * Copyright (c) 2008 Sam Leffler. All rights reserved.
3 *
4 * Redistribution and use in source and binary forms, with or without
5 * modification, are permitted provided that the following conditions
6 * are met:
7 * 1. Redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer.
9 * 2. Redistributions in binary form must reproduce the above copyright
10 * notice, this list of conditions and the following disclaimer in the
11 * documentation and/or other materials provided with the distribution.
12 *
13 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
14 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
15 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
16 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
17 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
18 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
19 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
20 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
21 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
22 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
23 */
24
25/*
26 * AR71XX attachment driver for the USB Enhanced Host Controller.
27 */
28
29#include <sys/cdefs.h>
|
30__FBSDID("$FreeBSD: head/sys/mips/atheros/ar71xx_ehci.c 285121 2015-07-04 03:05:57Z adrian $");
| 30__FBSDID("$FreeBSD: head/sys/mips/atheros/ar71xx_ehci.c 290910 2015-11-16 04:28:00Z adrian $");
|
31
32#include "opt_bus.h"
33
34#include <sys/param.h>
35#include <sys/systm.h>
36#include <sys/bus.h>
37#include <sys/rman.h>
38#include <sys/condvar.h>
39#include <sys/kernel.h>
40#include <sys/module.h>
41
42#include <machine/bus.h>
43
44#include <dev/usb/usb.h>
45#include <dev/usb/usbdi.h>
46
47#include <dev/usb/usb_core.h>
48#include <dev/usb/usb_busdma.h>
49#include <dev/usb/usb_process.h>
50#include <dev/usb/usb_util.h>
51
52#include <dev/usb/usb_controller.h>
53#include <dev/usb/usb_bus.h>
54#include <dev/usb/controller/ehci.h>
55#include <dev/usb/controller/ehcireg.h>
56
57#include <mips/atheros/ar71xx_setup.h>
58#include <mips/atheros/ar71xxreg.h> /* for stuff in ar71xx_cpudef.h */
59#include <mips/atheros/ar71xx_cpudef.h>
60#include <mips/atheros/ar71xx_bus_space_reversed.h>
61
62#define EHCI_HC_DEVSTR "AR71XX Integrated USB 2.0 controller"
63
64struct ar71xx_ehci_softc {
65 ehci_softc_t base; /* storage for EHCI code */
66};
67
68static device_attach_t ar71xx_ehci_attach;
69static device_detach_t ar71xx_ehci_detach;
70
71bs_r_1_proto(reversed);
72bs_w_1_proto(reversed);
73
74static int
75ar71xx_ehci_probe(device_t self)
76{
77
78 device_set_desc(self, EHCI_HC_DEVSTR);
79
80 return (BUS_PROBE_NOWILDCARD);
81}
82
83static void
84ar71xx_ehci_intr(void *arg)
85{
86
87 /* XXX TODO: should really see if this was our interrupt.. */
88 ar71xx_device_flush_ddr(AR71XX_CPU_DDR_FLUSH_USB);
89 ehci_interrupt(arg);
90}
91
92static int
93ar71xx_ehci_attach(device_t self)
94{
95 struct ar71xx_ehci_softc *isc = device_get_softc(self);
96 ehci_softc_t *sc = &isc->base;
97 int err;
98 int rid;
99
100 /* initialise some bus fields */
101 sc->sc_bus.parent = self;
102 sc->sc_bus.devices = sc->sc_devices;
103 sc->sc_bus.devices_max = EHCI_MAX_DEVICES;
104 sc->sc_bus.dma_bits = 32;
105
106 /* get all DMA memory */
107 if (usb_bus_mem_alloc_all(&sc->sc_bus,
108 USB_GET_DMA_TAG(self), &ehci_iterate_hw_softc)) {
109 return (ENOMEM);
110 }
111
112 sc->sc_bus.usbrev = USB_REV_2_0;
113
114 /* NB: hints fix the memory location and irq */
115
116 rid = 0;
117 sc->sc_io_res = bus_alloc_resource_any(self, SYS_RES_MEMORY, &rid, RF_ACTIVE);
118 if (!sc->sc_io_res) {
119 device_printf(self, "Could not map memory\n");
120 goto error;
121 }
122
123 /*
124 * Craft special resource for bus space ops that handle
125 * byte-alignment of non-word addresses.
126 */
127 sc->sc_io_tag = ar71xx_bus_space_reversed;
128 sc->sc_io_hdl = rman_get_bushandle(sc->sc_io_res);
129 sc->sc_io_size = rman_get_size(sc->sc_io_res);
130
131 rid = 0;
132 sc->sc_irq_res = bus_alloc_resource_any(self, SYS_RES_IRQ, &rid,
133 RF_ACTIVE | RF_SHAREABLE);
134 if (sc->sc_irq_res == NULL) {
135 device_printf(self, "Could not allocate irq\n");
136 goto error;
137 }
138 sc->sc_bus.bdev = device_add_child(self, "usbus", -1);
139 if (!sc->sc_bus.bdev) {
140 device_printf(self, "Could not add USB device\n");
141 goto error;
142 }
143 device_set_ivars(sc->sc_bus.bdev, &sc->sc_bus);
144 device_set_desc(sc->sc_bus.bdev, EHCI_HC_DEVSTR);
145
146 sprintf(sc->sc_vendor, "Atheros");
147
148 err = bus_setup_intr(self, sc->sc_irq_res, INTR_TYPE_BIO | INTR_MPSAFE,
149 NULL, ar71xx_ehci_intr, sc, &sc->sc_intr_hdl);
150 if (err) {
151 device_printf(self, "Could not setup irq, %d\n", err);
152 sc->sc_intr_hdl = NULL;
153 goto error;
154 }
155
156 /*
157 * Arrange to force Host mode, select big-endian byte alignment,
158 * and arrange to not terminate reset operations (the adapter
159 * will ignore it if we do but might as well save a reg write).
160 * Also, the controller has an embedded Transaction Translator
161 * which means port speed must be read from the Port Status
162 * register following a port enable.
163 */
164 sc->sc_flags = EHCI_SCFLG_SETMODE;
165
166 switch (ar71xx_soc) {
167 case AR71XX_SOC_AR7241:
168 case AR71XX_SOC_AR7242:
169 case AR71XX_SOC_AR9130:
170 case AR71XX_SOC_AR9132:
171 case AR71XX_SOC_AR9330:
172 case AR71XX_SOC_AR9331:
173 case AR71XX_SOC_AR9341:
174 case AR71XX_SOC_AR9342:
175 case AR71XX_SOC_AR9344:
| 31
32#include "opt_bus.h"
33
34#include <sys/param.h>
35#include <sys/systm.h>
36#include <sys/bus.h>
37#include <sys/rman.h>
38#include <sys/condvar.h>
39#include <sys/kernel.h>
40#include <sys/module.h>
41
42#include <machine/bus.h>
43
44#include <dev/usb/usb.h>
45#include <dev/usb/usbdi.h>
46
47#include <dev/usb/usb_core.h>
48#include <dev/usb/usb_busdma.h>
49#include <dev/usb/usb_process.h>
50#include <dev/usb/usb_util.h>
51
52#include <dev/usb/usb_controller.h>
53#include <dev/usb/usb_bus.h>
54#include <dev/usb/controller/ehci.h>
55#include <dev/usb/controller/ehcireg.h>
56
57#include <mips/atheros/ar71xx_setup.h>
58#include <mips/atheros/ar71xxreg.h> /* for stuff in ar71xx_cpudef.h */
59#include <mips/atheros/ar71xx_cpudef.h>
60#include <mips/atheros/ar71xx_bus_space_reversed.h>
61
62#define EHCI_HC_DEVSTR "AR71XX Integrated USB 2.0 controller"
63
64struct ar71xx_ehci_softc {
65 ehci_softc_t base; /* storage for EHCI code */
66};
67
68static device_attach_t ar71xx_ehci_attach;
69static device_detach_t ar71xx_ehci_detach;
70
71bs_r_1_proto(reversed);
72bs_w_1_proto(reversed);
73
74static int
75ar71xx_ehci_probe(device_t self)
76{
77
78 device_set_desc(self, EHCI_HC_DEVSTR);
79
80 return (BUS_PROBE_NOWILDCARD);
81}
82
83static void
84ar71xx_ehci_intr(void *arg)
85{
86
87 /* XXX TODO: should really see if this was our interrupt.. */
88 ar71xx_device_flush_ddr(AR71XX_CPU_DDR_FLUSH_USB);
89 ehci_interrupt(arg);
90}
91
92static int
93ar71xx_ehci_attach(device_t self)
94{
95 struct ar71xx_ehci_softc *isc = device_get_softc(self);
96 ehci_softc_t *sc = &isc->base;
97 int err;
98 int rid;
99
100 /* initialise some bus fields */
101 sc->sc_bus.parent = self;
102 sc->sc_bus.devices = sc->sc_devices;
103 sc->sc_bus.devices_max = EHCI_MAX_DEVICES;
104 sc->sc_bus.dma_bits = 32;
105
106 /* get all DMA memory */
107 if (usb_bus_mem_alloc_all(&sc->sc_bus,
108 USB_GET_DMA_TAG(self), &ehci_iterate_hw_softc)) {
109 return (ENOMEM);
110 }
111
112 sc->sc_bus.usbrev = USB_REV_2_0;
113
114 /* NB: hints fix the memory location and irq */
115
116 rid = 0;
117 sc->sc_io_res = bus_alloc_resource_any(self, SYS_RES_MEMORY, &rid, RF_ACTIVE);
118 if (!sc->sc_io_res) {
119 device_printf(self, "Could not map memory\n");
120 goto error;
121 }
122
123 /*
124 * Craft special resource for bus space ops that handle
125 * byte-alignment of non-word addresses.
126 */
127 sc->sc_io_tag = ar71xx_bus_space_reversed;
128 sc->sc_io_hdl = rman_get_bushandle(sc->sc_io_res);
129 sc->sc_io_size = rman_get_size(sc->sc_io_res);
130
131 rid = 0;
132 sc->sc_irq_res = bus_alloc_resource_any(self, SYS_RES_IRQ, &rid,
133 RF_ACTIVE | RF_SHAREABLE);
134 if (sc->sc_irq_res == NULL) {
135 device_printf(self, "Could not allocate irq\n");
136 goto error;
137 }
138 sc->sc_bus.bdev = device_add_child(self, "usbus", -1);
139 if (!sc->sc_bus.bdev) {
140 device_printf(self, "Could not add USB device\n");
141 goto error;
142 }
143 device_set_ivars(sc->sc_bus.bdev, &sc->sc_bus);
144 device_set_desc(sc->sc_bus.bdev, EHCI_HC_DEVSTR);
145
146 sprintf(sc->sc_vendor, "Atheros");
147
148 err = bus_setup_intr(self, sc->sc_irq_res, INTR_TYPE_BIO | INTR_MPSAFE,
149 NULL, ar71xx_ehci_intr, sc, &sc->sc_intr_hdl);
150 if (err) {
151 device_printf(self, "Could not setup irq, %d\n", err);
152 sc->sc_intr_hdl = NULL;
153 goto error;
154 }
155
156 /*
157 * Arrange to force Host mode, select big-endian byte alignment,
158 * and arrange to not terminate reset operations (the adapter
159 * will ignore it if we do but might as well save a reg write).
160 * Also, the controller has an embedded Transaction Translator
161 * which means port speed must be read from the Port Status
162 * register following a port enable.
163 */
164 sc->sc_flags = EHCI_SCFLG_SETMODE;
165
166 switch (ar71xx_soc) {
167 case AR71XX_SOC_AR7241:
168 case AR71XX_SOC_AR7242:
169 case AR71XX_SOC_AR9130:
170 case AR71XX_SOC_AR9132:
171 case AR71XX_SOC_AR9330:
172 case AR71XX_SOC_AR9331:
173 case AR71XX_SOC_AR9341:
174 case AR71XX_SOC_AR9342:
175 case AR71XX_SOC_AR9344:
|
| 176 case AR71XX_SOC_QCA9533:
177 case AR71XX_SOC_QCA9533_V2:
|
176 case AR71XX_SOC_QCA9556:
177 case AR71XX_SOC_QCA9558:
178 sc->sc_flags |= EHCI_SCFLG_TT | EHCI_SCFLG_NORESTERM;
179 break;
180 default:
181 /* fallthrough */
182 break;
183 }
184
185 /*
186 * ehci_reset() needs the correct offset to access the host controller
187 * registers. The AR724x/AR913x offsets aren't 0.
188 */
189 sc->sc_offs = EHCI_CAPLENGTH(EREAD4(sc, EHCI_CAPLEN_HCIVERSION));
190
191 (void) ehci_reset(sc);
192
193 err = ehci_init(sc);
194 if (!err) {
195 err = device_probe_and_attach(sc->sc_bus.bdev);
196 }
197 if (err) {
198 device_printf(self, "USB init failed err=%d\n", err);
199 goto error;
200 }
201 return (0);
202
203error:
204 ar71xx_ehci_detach(self);
205 return (ENXIO);
206}
207
208static int
209ar71xx_ehci_detach(device_t self)
210{
211 struct ar71xx_ehci_softc *isc = device_get_softc(self);
212 ehci_softc_t *sc = &isc->base;
213 device_t bdev;
214 int err;
215
216 if (sc->sc_bus.bdev) {
217 bdev = sc->sc_bus.bdev;
218 device_detach(bdev);
219 device_delete_child(self, bdev);
220 }
221 /* during module unload there are lots of children leftover */
222 device_delete_children(self);
223
224 if (sc->sc_irq_res && sc->sc_intr_hdl) {
225 /*
226 * only call ehci_detach() after ehci_init()
227 */
228 ehci_detach(sc);
229
230 err = bus_teardown_intr(self, sc->sc_irq_res, sc->sc_intr_hdl);
231
232 if (err)
233 /* XXX or should we panic? */
234 device_printf(self, "Could not tear down irq, %d\n",
235 err);
236 sc->sc_intr_hdl = NULL;
237 }
238
239 if (sc->sc_irq_res) {
240 bus_release_resource(self, SYS_RES_IRQ, 0, sc->sc_irq_res);
241 sc->sc_irq_res = NULL;
242 }
243 if (sc->sc_io_res) {
244 bus_release_resource(self, SYS_RES_MEMORY, 0,
245 sc->sc_io_res);
246 sc->sc_io_res = NULL;
247 }
248 usb_bus_mem_free_all(&sc->sc_bus, &ehci_iterate_hw_softc);
249
250 return (0);
251}
252
253static device_method_t ehci_methods[] = {
254 /* Device interface */
255 DEVMETHOD(device_probe, ar71xx_ehci_probe),
256 DEVMETHOD(device_attach, ar71xx_ehci_attach),
257 DEVMETHOD(device_detach, ar71xx_ehci_detach),
258 DEVMETHOD(device_suspend, bus_generic_suspend),
259 DEVMETHOD(device_resume, bus_generic_resume),
260 DEVMETHOD(device_shutdown, bus_generic_shutdown),
261
262 DEVMETHOD_END
263};
264
265static driver_t ehci_driver = {
266 .name = "ehci",
267 .methods = ehci_methods,
268 .size = sizeof(struct ar71xx_ehci_softc),
269};
270
271static devclass_t ehci_devclass;
272
273DRIVER_MODULE(ehci, nexus, ehci_driver, ehci_devclass, 0, 0);
274DRIVER_MODULE(ehci, apb, ehci_driver, ehci_devclass, 0, 0);
275
276MODULE_DEPEND(ehci, usb, 1, 1, 1);
| 178 case AR71XX_SOC_QCA9556:
179 case AR71XX_SOC_QCA9558:
180 sc->sc_flags |= EHCI_SCFLG_TT | EHCI_SCFLG_NORESTERM;
181 break;
182 default:
183 /* fallthrough */
184 break;
185 }
186
187 /*
188 * ehci_reset() needs the correct offset to access the host controller
189 * registers. The AR724x/AR913x offsets aren't 0.
190 */
191 sc->sc_offs = EHCI_CAPLENGTH(EREAD4(sc, EHCI_CAPLEN_HCIVERSION));
192
193 (void) ehci_reset(sc);
194
195 err = ehci_init(sc);
196 if (!err) {
197 err = device_probe_and_attach(sc->sc_bus.bdev);
198 }
199 if (err) {
200 device_printf(self, "USB init failed err=%d\n", err);
201 goto error;
202 }
203 return (0);
204
205error:
206 ar71xx_ehci_detach(self);
207 return (ENXIO);
208}
209
210static int
211ar71xx_ehci_detach(device_t self)
212{
213 struct ar71xx_ehci_softc *isc = device_get_softc(self);
214 ehci_softc_t *sc = &isc->base;
215 device_t bdev;
216 int err;
217
218 if (sc->sc_bus.bdev) {
219 bdev = sc->sc_bus.bdev;
220 device_detach(bdev);
221 device_delete_child(self, bdev);
222 }
223 /* during module unload there are lots of children leftover */
224 device_delete_children(self);
225
226 if (sc->sc_irq_res && sc->sc_intr_hdl) {
227 /*
228 * only call ehci_detach() after ehci_init()
229 */
230 ehci_detach(sc);
231
232 err = bus_teardown_intr(self, sc->sc_irq_res, sc->sc_intr_hdl);
233
234 if (err)
235 /* XXX or should we panic? */
236 device_printf(self, "Could not tear down irq, %d\n",
237 err);
238 sc->sc_intr_hdl = NULL;
239 }
240
241 if (sc->sc_irq_res) {
242 bus_release_resource(self, SYS_RES_IRQ, 0, sc->sc_irq_res);
243 sc->sc_irq_res = NULL;
244 }
245 if (sc->sc_io_res) {
246 bus_release_resource(self, SYS_RES_MEMORY, 0,
247 sc->sc_io_res);
248 sc->sc_io_res = NULL;
249 }
250 usb_bus_mem_free_all(&sc->sc_bus, &ehci_iterate_hw_softc);
251
252 return (0);
253}
254
255static device_method_t ehci_methods[] = {
256 /* Device interface */
257 DEVMETHOD(device_probe, ar71xx_ehci_probe),
258 DEVMETHOD(device_attach, ar71xx_ehci_attach),
259 DEVMETHOD(device_detach, ar71xx_ehci_detach),
260 DEVMETHOD(device_suspend, bus_generic_suspend),
261 DEVMETHOD(device_resume, bus_generic_resume),
262 DEVMETHOD(device_shutdown, bus_generic_shutdown),
263
264 DEVMETHOD_END
265};
266
267static driver_t ehci_driver = {
268 .name = "ehci",
269 .methods = ehci_methods,
270 .size = sizeof(struct ar71xx_ehci_softc),
271};
272
273static devclass_t ehci_devclass;
274
275DRIVER_MODULE(ehci, nexus, ehci_driver, ehci_devclass, 0, 0);
276DRIVER_MODULE(ehci, apb, ehci_driver, ehci_devclass, 0, 0);
277
278MODULE_DEPEND(ehci, usb, 1, 1, 1);
|