1/*-
2 * Copyright (c) 2008 Sam Leffler. All rights reserved.
3 *
4 * Redistribution and use in source and binary forms, with or without
5 * modification, are permitted provided that the following conditions
6 * are met:
7 * 1. Redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer.
9 * 2. Redistributions in binary form must reproduce the above copyright
10 * notice, this list of conditions and the following disclaimer in the
11 * documentation and/or other materials provided with the distribution.
12 *
13 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
14 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
15 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
16 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
17 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
18 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
19 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
20 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
21 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
22 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
23 */
24
25/*
26 * AR71XX attachment driver for the USB Enhanced Host Controller.
27 */
28
29#include <sys/cdefs.h>
| 1/*-
2 * Copyright (c) 2008 Sam Leffler. All rights reserved.
3 *
4 * Redistribution and use in source and binary forms, with or without
5 * modification, are permitted provided that the following conditions
6 * are met:
7 * 1. Redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer.
9 * 2. Redistributions in binary form must reproduce the above copyright
10 * notice, this list of conditions and the following disclaimer in the
11 * documentation and/or other materials provided with the distribution.
12 *
13 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
14 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
15 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
16 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
17 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
18 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
19 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
20 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
21 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
22 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
23 */
24
25/*
26 * AR71XX attachment driver for the USB Enhanced Host Controller.
27 */
28
29#include <sys/cdefs.h>
|
30__FBSDID("$FreeBSD: head/sys/mips/atheros/ar71xx_ehci.c 227849 2011-11-22 21:56:55Z hselasky $");
| 30__FBSDID("$FreeBSD: head/sys/mips/atheros/ar71xx_ehci.c 228483 2011-12-14 00:28:54Z hselasky $");
|
31
32#include "opt_bus.h"
33
34#include <sys/param.h>
35#include <sys/systm.h>
36#include <sys/bus.h>
37#include <sys/rman.h>
38#include <sys/condvar.h>
39#include <sys/kernel.h>
40#include <sys/module.h>
41
42#include <machine/bus.h>
43
44#include <dev/usb/usb.h>
45#include <dev/usb/usbdi.h>
46
47#include <dev/usb/usb_core.h>
48#include <dev/usb/usb_busdma.h>
49#include <dev/usb/usb_process.h>
50#include <dev/usb/usb_util.h>
51
52#include <dev/usb/usb_controller.h>
53#include <dev/usb/usb_bus.h>
54#include <dev/usb/controller/ehci.h>
55#include <dev/usb/controller/ehcireg.h>
56
57#include <mips/atheros/ar71xx_setup.h>
58#include <mips/atheros/ar71xx_bus_space_reversed.h>
59
60#define EHCI_HC_DEVSTR "AR71XX Integrated USB 2.0 controller"
61
62struct ar71xx_ehci_softc {
63 ehci_softc_t base; /* storage for EHCI code */
64};
65
66static device_attach_t ar71xx_ehci_attach;
67static device_detach_t ar71xx_ehci_detach;
| 31
32#include "opt_bus.h"
33
34#include <sys/param.h>
35#include <sys/systm.h>
36#include <sys/bus.h>
37#include <sys/rman.h>
38#include <sys/condvar.h>
39#include <sys/kernel.h>
40#include <sys/module.h>
41
42#include <machine/bus.h>
43
44#include <dev/usb/usb.h>
45#include <dev/usb/usbdi.h>
46
47#include <dev/usb/usb_core.h>
48#include <dev/usb/usb_busdma.h>
49#include <dev/usb/usb_process.h>
50#include <dev/usb/usb_util.h>
51
52#include <dev/usb/usb_controller.h>
53#include <dev/usb/usb_bus.h>
54#include <dev/usb/controller/ehci.h>
55#include <dev/usb/controller/ehcireg.h>
56
57#include <mips/atheros/ar71xx_setup.h>
58#include <mips/atheros/ar71xx_bus_space_reversed.h>
59
60#define EHCI_HC_DEVSTR "AR71XX Integrated USB 2.0 controller"
61
62struct ar71xx_ehci_softc {
63 ehci_softc_t base; /* storage for EHCI code */
64};
65
66static device_attach_t ar71xx_ehci_attach;
67static device_detach_t ar71xx_ehci_detach;
|
68static device_shutdown_t ar71xx_ehci_shutdown;
69static device_suspend_t ar71xx_ehci_suspend;
70static device_resume_t ar71xx_ehci_resume;
| |
71
72bs_r_1_proto(reversed);
73bs_w_1_proto(reversed);
74
75static int
| 68
69bs_r_1_proto(reversed);
70bs_w_1_proto(reversed);
71
72static int
|
76ar71xx_ehci_suspend(device_t self)
77{
78 ehci_softc_t *sc = device_get_softc(self);
79 int err;
80
81 err = bus_generic_suspend(self);
82 if (err)
83 return (err);
84 ehci_suspend(sc);
85 return (0);
86}
87
88static int
89ar71xx_ehci_resume(device_t self)
90{
91 ehci_softc_t *sc = device_get_softc(self);
92
93 ehci_resume(sc);
94
95 bus_generic_resume(self);
96
97 return (0);
98}
99
100static int
101ar71xx_ehci_shutdown(device_t self)
102{
103 ehci_softc_t *sc = device_get_softc(self);
104 int err;
105
106 err = bus_generic_shutdown(self);
107 if (err)
108 return (err);
109 ehci_shutdown(sc);
110
111 return (0);
112}
113
114static int
| |
115ar71xx_ehci_probe(device_t self)
116{
117
118 device_set_desc(self, EHCI_HC_DEVSTR);
119
120 return (BUS_PROBE_DEFAULT);
121}
122
123static int
124ar71xx_ehci_attach(device_t self)
125{
126 struct ar71xx_ehci_softc *isc = device_get_softc(self);
127 ehci_softc_t *sc = &isc->base;
128 int err;
129 int rid;
130
131 /* initialise some bus fields */
132 sc->sc_bus.parent = self;
133 sc->sc_bus.devices = sc->sc_devices;
134 sc->sc_bus.devices_max = EHCI_MAX_DEVICES;
135
136 /* get all DMA memory */
137 if (usb_bus_mem_alloc_all(&sc->sc_bus,
138 USB_GET_DMA_TAG(self), &ehci_iterate_hw_softc)) {
139 return (ENOMEM);
140 }
141
142 sc->sc_bus.usbrev = USB_REV_2_0;
143
144 /* NB: hints fix the memory location and irq */
145
146 rid = 0;
147 sc->sc_io_res = bus_alloc_resource_any(self, SYS_RES_MEMORY, &rid, RF_ACTIVE);
148 if (!sc->sc_io_res) {
149 device_printf(self, "Could not map memory\n");
150 goto error;
151 }
152
153 /*
154 * Craft special resource for bus space ops that handle
155 * byte-alignment of non-word addresses.
156 */
157 sc->sc_io_tag = ar71xx_bus_space_reversed;
158 sc->sc_io_hdl = rman_get_bushandle(sc->sc_io_res);
159 sc->sc_io_size = rman_get_size(sc->sc_io_res);
160
161 rid = 0;
162 sc->sc_irq_res = bus_alloc_resource_any(self, SYS_RES_IRQ, &rid,
163 RF_ACTIVE);
164 if (sc->sc_irq_res == NULL) {
165 device_printf(self, "Could not allocate irq\n");
166 goto error;
167 }
168 sc->sc_bus.bdev = device_add_child(self, "usbus", -1);
169 if (!sc->sc_bus.bdev) {
170 device_printf(self, "Could not add USB device\n");
171 goto error;
172 }
173 device_set_ivars(sc->sc_bus.bdev, &sc->sc_bus);
174 device_set_desc(sc->sc_bus.bdev, EHCI_HC_DEVSTR);
175
176 sprintf(sc->sc_vendor, "Atheros");
177
178
179 err = bus_setup_intr(self, sc->sc_irq_res, INTR_TYPE_BIO | INTR_MPSAFE,
180 NULL, (driver_intr_t *)ehci_interrupt, sc, &sc->sc_intr_hdl);
181 if (err) {
182 device_printf(self, "Could not setup irq, %d\n", err);
183 sc->sc_intr_hdl = NULL;
184 goto error;
185 }
186
187 /*
188 * Arrange to force Host mode, select big-endian byte alignment,
189 * and arrange to not terminate reset operations (the adapter
190 * will ignore it if we do but might as well save a reg write).
191 * Also, the controller has an embedded Transaction Translator
192 * which means port speed must be read from the Port Status
193 * register following a port enable.
194 */
195 sc->sc_flags = EHCI_SCFLG_SETMODE;
196
197 switch (ar71xx_soc) {
198 case AR71XX_SOC_AR7241:
199 case AR71XX_SOC_AR7242:
200 case AR71XX_SOC_AR9130:
201 case AR71XX_SOC_AR9132:
202 sc->sc_flags |= EHCI_SCFLG_TT | EHCI_SCFLG_NORESTERM;
203 break;
204 default:
205 /* fallthrough */
206 break;
207 }
208
209 /*
210 * ehci_reset() needs the correct offset to access the host controller
211 * registers. The AR724x/AR913x offsets aren't 0.
212 */
213 sc->sc_offs = EHCI_CAPLENGTH(EREAD4(sc, EHCI_CAPLEN_HCIVERSION));
214
215
216 (void) ehci_reset(sc);
217
218 err = ehci_init(sc);
219 if (!err) {
220 err = device_probe_and_attach(sc->sc_bus.bdev);
221 }
222 if (err) {
223 device_printf(self, "USB init failed err=%d\n", err);
224 goto error;
225 }
226 return (0);
227
228error:
229 ar71xx_ehci_detach(self);
230 return (ENXIO);
231}
232
233static int
234ar71xx_ehci_detach(device_t self)
235{
236 struct ar71xx_ehci_softc *isc = device_get_softc(self);
237 ehci_softc_t *sc = &isc->base;
238 device_t bdev;
239 int err;
240
241 if (sc->sc_bus.bdev) {
242 bdev = sc->sc_bus.bdev;
243 device_detach(bdev);
244 device_delete_child(self, bdev);
245 }
246 /* during module unload there are lots of children leftover */
247 device_delete_children(self);
248
249 if (sc->sc_irq_res && sc->sc_intr_hdl) {
250 /*
251 * only call ehci_detach() after ehci_init()
252 */
253 ehci_detach(sc);
254
255 err = bus_teardown_intr(self, sc->sc_irq_res, sc->sc_intr_hdl);
256
257 if (err)
258 /* XXX or should we panic? */
259 device_printf(self, "Could not tear down irq, %d\n",
260 err);
261 sc->sc_intr_hdl = NULL;
262 }
263
264 if (sc->sc_irq_res) {
265 bus_release_resource(self, SYS_RES_IRQ, 0, sc->sc_irq_res);
266 sc->sc_irq_res = NULL;
267 }
268 if (sc->sc_io_res) {
269 bus_release_resource(self, SYS_RES_MEMORY, 0,
270 sc->sc_io_res);
271 sc->sc_io_res = NULL;
272 }
273 usb_bus_mem_free_all(&sc->sc_bus, &ehci_iterate_hw_softc);
274
275 return (0);
276}
277
278static device_method_t ehci_methods[] = {
279 /* Device interface */
280 DEVMETHOD(device_probe, ar71xx_ehci_probe),
281 DEVMETHOD(device_attach, ar71xx_ehci_attach),
282 DEVMETHOD(device_detach, ar71xx_ehci_detach),
| 73ar71xx_ehci_probe(device_t self)
74{
75
76 device_set_desc(self, EHCI_HC_DEVSTR);
77
78 return (BUS_PROBE_DEFAULT);
79}
80
81static int
82ar71xx_ehci_attach(device_t self)
83{
84 struct ar71xx_ehci_softc *isc = device_get_softc(self);
85 ehci_softc_t *sc = &isc->base;
86 int err;
87 int rid;
88
89 /* initialise some bus fields */
90 sc->sc_bus.parent = self;
91 sc->sc_bus.devices = sc->sc_devices;
92 sc->sc_bus.devices_max = EHCI_MAX_DEVICES;
93
94 /* get all DMA memory */
95 if (usb_bus_mem_alloc_all(&sc->sc_bus,
96 USB_GET_DMA_TAG(self), &ehci_iterate_hw_softc)) {
97 return (ENOMEM);
98 }
99
100 sc->sc_bus.usbrev = USB_REV_2_0;
101
102 /* NB: hints fix the memory location and irq */
103
104 rid = 0;
105 sc->sc_io_res = bus_alloc_resource_any(self, SYS_RES_MEMORY, &rid, RF_ACTIVE);
106 if (!sc->sc_io_res) {
107 device_printf(self, "Could not map memory\n");
108 goto error;
109 }
110
111 /*
112 * Craft special resource for bus space ops that handle
113 * byte-alignment of non-word addresses.
114 */
115 sc->sc_io_tag = ar71xx_bus_space_reversed;
116 sc->sc_io_hdl = rman_get_bushandle(sc->sc_io_res);
117 sc->sc_io_size = rman_get_size(sc->sc_io_res);
118
119 rid = 0;
120 sc->sc_irq_res = bus_alloc_resource_any(self, SYS_RES_IRQ, &rid,
121 RF_ACTIVE);
122 if (sc->sc_irq_res == NULL) {
123 device_printf(self, "Could not allocate irq\n");
124 goto error;
125 }
126 sc->sc_bus.bdev = device_add_child(self, "usbus", -1);
127 if (!sc->sc_bus.bdev) {
128 device_printf(self, "Could not add USB device\n");
129 goto error;
130 }
131 device_set_ivars(sc->sc_bus.bdev, &sc->sc_bus);
132 device_set_desc(sc->sc_bus.bdev, EHCI_HC_DEVSTR);
133
134 sprintf(sc->sc_vendor, "Atheros");
135
136
137 err = bus_setup_intr(self, sc->sc_irq_res, INTR_TYPE_BIO | INTR_MPSAFE,
138 NULL, (driver_intr_t *)ehci_interrupt, sc, &sc->sc_intr_hdl);
139 if (err) {
140 device_printf(self, "Could not setup irq, %d\n", err);
141 sc->sc_intr_hdl = NULL;
142 goto error;
143 }
144
145 /*
146 * Arrange to force Host mode, select big-endian byte alignment,
147 * and arrange to not terminate reset operations (the adapter
148 * will ignore it if we do but might as well save a reg write).
149 * Also, the controller has an embedded Transaction Translator
150 * which means port speed must be read from the Port Status
151 * register following a port enable.
152 */
153 sc->sc_flags = EHCI_SCFLG_SETMODE;
154
155 switch (ar71xx_soc) {
156 case AR71XX_SOC_AR7241:
157 case AR71XX_SOC_AR7242:
158 case AR71XX_SOC_AR9130:
159 case AR71XX_SOC_AR9132:
160 sc->sc_flags |= EHCI_SCFLG_TT | EHCI_SCFLG_NORESTERM;
161 break;
162 default:
163 /* fallthrough */
164 break;
165 }
166
167 /*
168 * ehci_reset() needs the correct offset to access the host controller
169 * registers. The AR724x/AR913x offsets aren't 0.
170 */
171 sc->sc_offs = EHCI_CAPLENGTH(EREAD4(sc, EHCI_CAPLEN_HCIVERSION));
172
173
174 (void) ehci_reset(sc);
175
176 err = ehci_init(sc);
177 if (!err) {
178 err = device_probe_and_attach(sc->sc_bus.bdev);
179 }
180 if (err) {
181 device_printf(self, "USB init failed err=%d\n", err);
182 goto error;
183 }
184 return (0);
185
186error:
187 ar71xx_ehci_detach(self);
188 return (ENXIO);
189}
190
191static int
192ar71xx_ehci_detach(device_t self)
193{
194 struct ar71xx_ehci_softc *isc = device_get_softc(self);
195 ehci_softc_t *sc = &isc->base;
196 device_t bdev;
197 int err;
198
199 if (sc->sc_bus.bdev) {
200 bdev = sc->sc_bus.bdev;
201 device_detach(bdev);
202 device_delete_child(self, bdev);
203 }
204 /* during module unload there are lots of children leftover */
205 device_delete_children(self);
206
207 if (sc->sc_irq_res && sc->sc_intr_hdl) {
208 /*
209 * only call ehci_detach() after ehci_init()
210 */
211 ehci_detach(sc);
212
213 err = bus_teardown_intr(self, sc->sc_irq_res, sc->sc_intr_hdl);
214
215 if (err)
216 /* XXX or should we panic? */
217 device_printf(self, "Could not tear down irq, %d\n",
218 err);
219 sc->sc_intr_hdl = NULL;
220 }
221
222 if (sc->sc_irq_res) {
223 bus_release_resource(self, SYS_RES_IRQ, 0, sc->sc_irq_res);
224 sc->sc_irq_res = NULL;
225 }
226 if (sc->sc_io_res) {
227 bus_release_resource(self, SYS_RES_MEMORY, 0,
228 sc->sc_io_res);
229 sc->sc_io_res = NULL;
230 }
231 usb_bus_mem_free_all(&sc->sc_bus, &ehci_iterate_hw_softc);
232
233 return (0);
234}
235
236static device_method_t ehci_methods[] = {
237 /* Device interface */
238 DEVMETHOD(device_probe, ar71xx_ehci_probe),
239 DEVMETHOD(device_attach, ar71xx_ehci_attach),
240 DEVMETHOD(device_detach, ar71xx_ehci_detach),
|
283 DEVMETHOD(device_suspend, ar71xx_ehci_suspend),
284 DEVMETHOD(device_resume, ar71xx_ehci_resume),
285 DEVMETHOD(device_shutdown, ar71xx_ehci_shutdown),
| 241 DEVMETHOD(device_suspend, bus_generic_suspend),
242 DEVMETHOD(device_resume, bus_generic_resume),
243 DEVMETHOD(device_shutdown, bus_generic_shutdown),
|
286
287 DEVMETHOD_END
288};
289
290static driver_t ehci_driver = {
| 244
245 DEVMETHOD_END
246};
247
248static driver_t ehci_driver = {
|
291 "ehci",
292 ehci_methods,
293 sizeof(struct ar71xx_ehci_softc),
| 249 .name = "ehci",
250 .methods = ehci_methods,
251 .size = sizeof(struct ar71xx_ehci_softc),
|
294};
295
296static devclass_t ehci_devclass;
297
298DRIVER_MODULE(ehci, nexus, ehci_driver, ehci_devclass, 0, 0);
299MODULE_DEPEND(ehci, usb, 1, 1, 1);
| 252};
253
254static devclass_t ehci_devclass;
255
256DRIVER_MODULE(ehci, nexus, ehci_driver, ehci_devclass, 0, 0);
257MODULE_DEPEND(ehci, usb, 1, 1, 1);
|