8#
9
10#
11# This directive is mandatory; it defines the architecture to be
12# configured for; in this case, the 386 family based IBM-PC and
13# compatibles.
14#
15machine i386
16
17#
18# We want LINT to cover profiling as well.
19profile 2
20
21
22#####################################################################
23# SMP OPTIONS:
24#
25# The apic device enables the use of the I/O APIC for interrupt delivery.
26# The apic device can be used in both UP and SMP kernels, but is required
27# for SMP kernels. Thus, the apic device is not strictly an SMP option,
28# but it is a prerequisite for SMP.
29#
30# Notes:
31#
32# Be sure to disable 'cpu I386_CPU' for SMP kernels.
33#
34# By default, mixed mode is used to route IRQ0 from the AT timer via
35# the 8259A master PIC through the ExtINT pin on the first I/O APIC.
36# This can be disabled via the NO_MIXED_MODE option. In that case,
37# IRQ0 will be routed via an intpin on the first I/O APIC. Not all
38# motherboards hook IRQ0 up to the first I/O APIC even though their
39# MP table or MADT may claim to do so. That is why mixed mode is
40# enabled by default.
41#
42# HTT CPUs should only be used if they are enabled in the BIOS. For
43# the ACPI case, ACPI only correctly tells us about any HTT CPUs if
44# they are enabled. However, most HTT systems do not list HTT CPUs
45# in the MP Table if they are enabled, thus we guess at the HTT CPUs
46# for the MP Table case. However, we shouldn't try to guess and use
47# these CPUs if HTTT is disabled. Thus, HTT guessing is only enabled
48# for the MP Table if the user explicitly asks for it via the
49# MPTABLE_FORCE_HTT option. Do NOT use this option if you have HTT
50# disabled in your BIOS.
51#
52
53# Mandatory:
54device apic # I/O apic
55
56# Optional:
57options MPTABLE_FORCE_HTT # Enable HTT CPUs with the MP Table
58options NO_MIXED_MODE # Disable use of mixed mode
59
60
61#####################################################################
62# CPU OPTIONS
63
64#
65# You must specify at least one CPU (the one you intend to run on);
66# deleting the specification for CPUs you don't need to use may make
67# parts of the system run faster.
68# I386_CPU is mutually exclusive with the other CPU types.
69#
70#cpu I386_CPU
71cpu I486_CPU
72cpu I586_CPU # aka Pentium(tm)
73cpu I686_CPU # aka Pentium Pro(tm)
74
75#
76# Options for CPU features.
77#
78# CPU_ATHLON_SSE_HACK tries to enable SSE instructions when the BIOS has
79# forgotten to enable them.
80#
81# CPU_BLUELIGHTNING_3X enables triple-clock mode on IBM Blue Lightning
82# CPU if CPU supports it. The default is double-clock mode on
83# BlueLightning CPU box.
84#
85# CPU_BLUELIGHTNING_FPU_OP_CACHE enables FPU operand cache on IBM
86# BlueLightning CPU. It works only with Cyrix FPU, and this option
87# should not be used with Intel FPU.
88#
89# CPU_BTB_EN enables branch target buffer on Cyrix 5x86 (NOTE 1).
90#
91# CPU_CYRIX_NO_LOCK enables weak locking for the entire address space
92# of Cyrix 6x86 and 6x86MX CPUs by setting the NO_LOCK bit of CCR1.
93# Otherwise, the NO_LOCK bit of CCR1 is cleared. (NOTE 3)
94#
95# CPU_DIRECT_MAPPED_CACHE sets L1 cache of Cyrix 486DLC CPU in direct
96# mapped mode. Default is 2-way set associative mode.
97#
98# CPU_DISABLE_5X86_LSSER disables load store serialize (i.e., enables
99# reorder). This option should not be used if you use memory mapped
100# I/O device(s).
101#
102# CPU_DISABLE_CMPXCHG disables the CMPXCHG instruction on > i386 IA32
103# machines. VmWare seems to emulate this instruction poorly, causing
104# the guest OS to run very slowly. Enabling this with an SMP kernel
105# will cause the kernel to be unusable.
106#
107# CPU_DISABLE_SSE explicitly prevents I686_CPU from turning on SSE.
108#
109# CPU_ELAN enables support for AMDs ElanSC520 CPU.
110# CPU_ELAN_PPS enables precision timestamp code.
111# CPU_ELAN_XTAL sets the clock crystal frequency in Hz.
112#
113# CPU_ENABLE_LONGRUN enables support for Transmeta Crusoe LongRun
114# technology which allows to restrict power consumption of the CPU by
115# using group of hw.crusoe.* sysctls.
116#
117# CPU_ENABLE_SSE enables SSE/MMX2 instructions support. This is default
118# on I686_CPU and above.
119#
120# CPU_ENABLE_TCC enables Thermal Control Circuitry (TCC) found in some
121# Pentium(tm) 4 and (possibly) later CPUs. When enabled and detected,
122# TCC supports restricting power consumption using the hw.p4tcc.*
123# sysctls. This operates independently of SpeedStep and is useful on
124# systems where other mechanisms such as apm(4) or acpi(4) don't work.
125#
126# CPU_FASTER_5X86_FPU enables faster FPU exception handler.
127#
128# CPU_GEODE is for the SC1100 Geode embedded processor. This option
129# is necessary because the i8254 timecounter is toast.
130#
131# CPU_I486_ON_386 enables CPU cache on i486 based CPU upgrade products
132# for i386 machines.
133#
134# CPU_IORT defines I/O clock delay time (NOTE 1). Default values of
135# I/O clock delay time on Cyrix 5x86 and 6x86 are 0 and 7,respectively
136# (no clock delay).
137#
138# CPU_L2_LATENCY specifies the L2 cache latency value. This option is used
139# only when CPU_PPRO2CELERON is defined and Mendocino Celeron is detected.
140# The default value is 5.
141#
142# CPU_LOOP_EN prevents flushing the prefetch buffer if the destination
143# of a jump is already present in the prefetch buffer on Cyrix 5x86(NOTE
144# 1).
145#
146# CPU_PPRO2CELERON enables L2 cache of Mendocino Celeron CPUs. This option
147# is useful when you use Socket 8 to Socket 370 converter, because most Pentium
148# Pro BIOSs do not enable L2 cache of Mendocino Celeron CPUs.
149#
150# CPU_RSTK_EN enables return stack on Cyrix 5x86 (NOTE 1).
151#
152# CPU_SOEKRIS enables support www.soekris.com hardware.
153#
154# CPU_SUSP_HLT enables suspend on HALT. If this option is set, CPU
155# enters suspend mode following execution of HALT instruction.
156#
157# CPU_UPGRADE_HW_CACHE eliminates unneeded cache flush instruction(s).
158#
159# CPU_WT_ALLOC enables write allocation on Cyrix 6x86/6x86MX and AMD
160# K5/K6/K6-2 CPUs.
161#
162# CYRIX_CACHE_WORKS enables CPU cache on Cyrix 486 CPUs with cache
163# flush at hold state.
164#
165# CYRIX_CACHE_REALLY_WORKS enables (1) CPU cache on Cyrix 486 CPUs
166# without cache flush at hold state, and (2) write-back CPU cache on
167# Cyrix 6x86 whose revision < 2.7 (NOTE 2).
168#
169# NO_F00F_HACK disables the hack that prevents Pentiums (and ONLY
170# Pentiums) from locking up when a LOCK CMPXCHG8B instruction is
171# executed. This option is only needed if I586_CPU is also defined,
172# and should be included for any non-Pentium CPU that defines it.
173#
174# NO_MEMORY_HOLE is an optimisation for systems with AMD K6 processors
175# which indicates that the 15-16MB range is *definitely* not being
176# occupied by an ISA memory hole.
177#
178# NOTE 1: The options, CPU_BTB_EN, CPU_LOOP_EN, CPU_IORT,
179# CPU_LOOP_EN and CPU_RSTK_EN should not be used because of CPU bugs.
180# These options may crash your system.
181#
182# NOTE 2: If CYRIX_CACHE_REALLY_WORKS is not set, CPU cache is enabled
183# in write-through mode when revision < 2.7. If revision of Cyrix
184# 6x86 >= 2.7, CPU cache is always enabled in write-back mode.
185#
186# NOTE 3: This option may cause failures for software that requires
187# locked cycles in order to operate correctly.
188#
189options CPU_ATHLON_SSE_HACK
190options CPU_BLUELIGHTNING_3X
191options CPU_BLUELIGHTNING_FPU_OP_CACHE
192options CPU_BTB_EN
193options CPU_DIRECT_MAPPED_CACHE
194options CPU_DISABLE_5X86_LSSER
195options CPU_DISABLE_CMPXCHG
196#options CPU_DISABLE_SSE
197options CPU_ELAN
198options CPU_ELAN_PPS
199options CPU_ELAN_XTAL=32768000
200options CPU_ENABLE_LONGRUN
201options CPU_ENABLE_SSE
202options CPU_ENABLE_TCC
203options CPU_FASTER_5X86_FPU
204options CPU_GEODE
205options CPU_I486_ON_386
206options CPU_IORT
207options CPU_L2_LATENCY=5
208options CPU_LOOP_EN
209options CPU_PPRO2CELERON
210options CPU_RSTK_EN
211options CPU_SOEKRIS
212options CPU_SUSP_HLT
213options CPU_UPGRADE_HW_CACHE
214options CPU_WT_ALLOC
215options CYRIX_CACHE_WORKS
216options CYRIX_CACHE_REALLY_WORKS
217#options NO_F00F_HACK
218
219# Debug options
220options NPX_DEBUG # enable npx debugging
221
222#
223# PERFMON causes the driver for Pentium/Pentium Pro performance counters
224# to be compiled. See perfmon(4) for more information.
225#
226options PERFMON
227
228
229#####################################################################
230# NETWORKING OPTIONS
231
232#
233# DEVICE_POLLING adds support for mixed interrupt-polling handling
234# of network device drivers, which has significant benefits in terms
235# of robustness to overloads and responsivity, as well as permitting
236# accurate scheduling of the CPU time between kernel network processing
237# and other activities. The drawback is a moderate (up to 1/HZ seconds)
238# potential increase in response times.
239# It is strongly recommended to use HZ=1000 or 2000 with DEVICE_POLLING
240# to achieve smoother behaviour.
241# Additionally, you can enable/disable polling at runtime with the
242# sysctl variable kern.polling.enable (defaults off), and select
243# the CPU fraction reserved to userland with the sysctl variable
244# kern.polling.user_frac (default 50, range 0..100).
245#
246# Not all device drivers support this mode of operation at the time of
247# this writing. See polling(4) for more details.
248
249options DEVICE_POLLING
250
251
252#####################################################################
253# CLOCK OPTIONS
254
255# The following options are used for debugging clock behavior only, and
256# should not be used for production systems.
257
258# CLK_CALIBRATION_LOOP causes clock calibration to be run in a loop at
259# startup until the user presses a key. (The i8254 clock is always
260# calibrated relative to the RTC (mc146818a) and this option causes the
261# calibration to be repeated.)
262options CLK_CALIBRATION_LOOP
263
264# CLK_USE_I8254_CALIBRATION causes the calibrated frequency of the i8254
265# clock to actually be used.
266options CLK_USE_I8254_CALIBRATION
267
268
269#####################################################################
270# MISCELLANEOUS DEVICES AND OPTIONS
271
272device speaker #Play IBM BASIC-style noises out your speaker
273hint.speaker.0.at="isa"
274hint.speaker.0.port="0x61"
275device gzip #Exec gzipped a.out's. REQUIRES COMPAT_AOUT!
276device apm_saver # Requires APM
277
278
279#####################################################################
280# HARDWARE BUS CONFIGURATION
281
282#
283# ISA bus
284#
285device isa
286
287#
288# Options for `isa':
289#
290# AUTO_EOI_1 enables the `automatic EOI' feature for the master 8259A
291# interrupt controller. This saves about 0.7-1.25 usec for each interrupt.
292# This option breaks suspend/resume on some portables.
293#
294# AUTO_EOI_2 enables the `automatic EOI' feature for the slave 8259A
295# interrupt controller. This saves about 0.7-1.25 usec for each interrupt.
296# Automatic EOI is documented not to work for for the slave with the
297# original i8259A, but it works for some clones and some integrated
298# versions.
299#
300# MAXMEM specifies the amount of RAM on the machine; if this is not
301# specified, FreeBSD will first read the amount of memory from the CMOS
302# RAM, so the amount of memory will initially be limited to 64MB or 16MB
303# depending on the BIOS. If the BIOS reports 64MB, a memory probe will
304# then attempt to detect the installed amount of RAM. If this probe
305# fails to detect >64MB RAM you will have to use the MAXMEM option.
306# The amount is in kilobytes, so for a machine with 128MB of RAM, it would
307# be 131072 (128 * 1024).
308#
309# BROKEN_KEYBOARD_RESET disables the use of the keyboard controller to
310# reset the CPU for reboot. This is needed on some systems with broken
311# keyboard controllers.
312
313options AUTO_EOI_1
314#options AUTO_EOI_2
315
316options MAXMEM=(128*1024)
317#options BROKEN_KEYBOARD_RESET
318
319#
320# EISA bus
321#
322# The EISA bus device is `eisa'. It provides auto-detection and
323# configuration support for all devices on the EISA bus.
324
325device eisa
326
327# By default, only 10 EISA slots are probed, since the slot numbers
328# above clash with the configuration address space of the PCI subsystem,
329# and the EISA probe is not very smart about this. This is sufficient
330# for most machines, but in particular the HP NetServer LC series comes
331# with an onboard AIC7770 dual-channel SCSI controller on EISA slot #11,
332# thus you need to bump this figure to 12 for them.
333options EISA_SLOTS=12
334
335#
336# MCA bus:
337#
338# The MCA bus device is `mca'. It provides auto-detection and
339# configuration support for all devices on the MCA bus.
340# No hints are required for MCA.
341
342device mca
343
344#
345# PCI bus & PCI options:
346#
347device pci
348
349#
350# AGP GART support
351device agp
352
353
354#####################################################################
355# HARDWARE DEVICE CONFIGURATION
356
357# To include support for VGA VESA video modes
358options VESA
359
360# Turn on extra debugging checks and output for VESA support.
361options VESA_DEBUG
362
363# The pcvt console driver (vt220 compatible).
364device vt
365hint.vt.0.at="isa"
366options XSERVER # support for running an X server on vt
367options FAT_CURSOR # start with block cursor
368# This PCVT option is for keyboards such as those used on really old ThinkPads
369options PCVT_SCANSET=2
370# Other PCVT options are documented in pcvt(4).
371options PCVT_24LINESDEF
372options PCVT_CTRL_ALT_DEL
373options PCVT_META_ESC
374options PCVT_NSCREENS=9
375options PCVT_PRETTYSCRNS
376options PCVT_SCREENSAVER
377options PCVT_USEKBDSEC
378options PCVT_VT220KEYB
379options PCVT_GREENSAVER
380
381#
382# The Numeric Processing eXtension driver. In addition to this, you
383# may configure a math emulator (see above). If your machine has a
384# hardware FPU and the kernel configuration includes the npx device
385# *and* a math emulator compiled into the kernel, the hardware FPU
386# will be used, unless it is found to be broken or unless "flags" to
387# npx0 includes "0x08", which requests preference for the emulator.
388device npx
389hint.npx.0.flags="0x0"
390hint.npx.0.irq="13"
391
392#
393# `flags' for npx0:
394# 0x01 don't use the npx registers to optimize bcopy.
395# 0x02 don't use the npx registers to optimize bzero.
396# 0x04 don't use the npx registers to optimize copyin or copyout.
397# 0x08 use emulator even if hardware FPU is available.
398# The npx registers are normally used to optimize copying and zeroing when
399# all of the following conditions are satisfied:
400# I586_CPU is an option
401# the cpu is an i586 (perhaps not a Pentium)
402# the probe for npx0 succeeds
403# INT 16 exception handling works.
404# Then copying and zeroing using the npx registers is normally 30-100% faster.
405# The flags can be used to control cases where it doesn't work or is slower.
406# Setting them at boot time using userconfig works right (the optimizations
407# are not used until later in the bootstrap when npx0 is attached).
408# Flag 0x08 automatically disables the i586 optimized routines.
409#
410
411#
412# Optional devices:
413#
414
415# 3Dfx Voodoo Graphics, Voodoo II /dev/3dfx CDEV support. This will create
416# the /dev/3dfx0 device to work with glide implementations. This should get
417# linked to /dev/3dfx and /dev/voodoo. Note that this is not the same as
418# the tdfx DRI module from XFree86 and is completely unrelated.
419#
420# To enable Linuxulator support, one must also include COMPAT_LINUX in the
421# config as well, or you will not have the dependencies. The other option
422# is to load both as modules.
423
424device tdfx # Enable 3Dfx Voodoo support
425options TDFX_LINUX # Enable Linuxulator support
426
427#
428# ACPI support using the Intel ACPI Component Architecture reference
429# implementation.
430#
431# ACPI_DEBUG enables the use of the debug.acpi.level and debug.acpi.layer
432# kernel environment variables to select initial debugging levels for the
433# Intel ACPICA code. (Note that the Intel code must also have USE_DEBUGGER
434# defined when it is built).
435#
436# ACPI_MAX_THREADS sets the number of task threads started.
437#
438# ACPI_NO_SEMAPHORES makes the AcpiOs*Semaphore routines a no-op.
439#
440# ACPICA_PEDANTIC enables strict checking of AML. Our default is to
441# relax these checks to allow code generated by the Microsoft compiler
442# to still execute.
443#
444# Note that building ACPI into the kernel is deprecated; the module is
445# normally loaded automatically by the loader.
446
447device acpi
448options ACPI_DEBUG
449options ACPI_MAX_THREADS=1
450#!options ACPI_NO_SEMAPHORES
451#!options ACPICA_PEDANTIC
452
453# ACPI Toshiba Extras (LCD backlight/brightness, video output, etc.)
454device acpi_toshiba
455
456# ACPI Video Extensions (LCD backlight/brightness, video output, etc.)
457device acpi_video
458
459# DRM options:
460# mgadrm: AGP Matrox G200, G400, G450, G550
461# r128drm: ATI Rage 128
462# radeondrm: ATI Radeon up to 9000/9100
463# sisdrm: SiS 300/305,540,630
464# tdfxdrm: 3dfx Voodoo 3/4/5 and Banshee
465# DRM_DEBUG: include debug printfs, very slow
466#
467# mga requires AGP in the kernel, and it is recommended
468# for AGP r128 and radeon cards.
469
470device mgadrm
471device "r128drm"
472device radeondrm
473device sisdrm
474device tdfxdrm
475
476options DRM_DEBUG
477
478# M-systems DiskOnchip products see src/sys/contrib/dev/fla/README
479device fla
480hint.fla.0.at="isa"
481
482#
483# mse: Logitech and ATI InPort bus mouse ports
484
485device mse
486hint.mse.0.at="isa"
487hint.mse.0.port="0x23c"
488hint.mse.0.irq="5"
489
490#
491# Network interfaces:
492#
493
494# ar: Arnet SYNC/570i hdlc sync 2/4 port V.35/X.21 serial driver
495# (requires sppp)
496# arl: Aironet Arlan 655 wireless adapters.
497# ath: Atheros a/b/g WiFi adapters (requires ath_hal and wlan)
498# ctau: Cronyx/Tau sync dual port V.35/RS-232/RS-530/RS-449/X.21/G.703/E1
499# serial adaptor (requires sppp (default), or NETGRAPH if
500# NETGRAPH_CRONYX is configured)
501# cx: Cronyx/Sigma multiport sync/async adapter (requires sppp (default),
502# or NETGRAPH if NETGRAPH_CRONYX is configured)
503# ed: Western Digital and SMC 80xx; Novell NE1000 and NE2000; 3Com 3C503
504# HP PC Lan+, various PC Card devices (refer to etc/defaults/pccard.conf)
505# (requires miibus)
506# el: 3Com 3C501 (slow!)
507# ie: AT&T StarLAN 10 and EN100; 3Com 3C507; unknown NI5210;
508# Intel EtherExpress
509# lnc: Lance/PCnet cards (Isolan, Novell NE2100, NE32-VL, AMD Am7990 and
510# Am79C960)
511# oltr: Olicom ISA token-ring adapters OC-3115, OC-3117, OC-3118 and OC-3133.
512# Olicom PCI token-ring adapters OC-3136, OC-3137, OC-3139, OC-3140,
513# OC-3141, OC-3540 and OC-3250.
514# sbni: Granch SBNI12-xx ISA and PCI adapters
515# sr: RISCom/N2 hdlc sync 1/2 port V.35/X.21 serial driver (requires sppp)
516# wl: Lucent Wavelan (ISA card only).
517
518# Order for ISA/EISA devices is important here
519
520device ar
521hint.ar.0.at="isa"
522hint.ar.0.port="0x300"
523hint.ar.0.irq="10"
524hint.ar.0.maddr="0xd0000"
525device arl
526hint.arl.0.at="isa"
527hint.arl.0.irq="9"
528hint.arl.0.maddr="0xd0000"
529device ctau
530hint.ctau.0.at="isa"
531hint.ctau.0.port="0x240"
532hint.ctau.0.irq="15"
533hint.ctau.0.drq="7"
534device cx
535hint.cx.0.at="isa"
536hint.cx.0.port="0x240"
537hint.cx.0.irq="15"
538hint.cx.0.drq="7"
539#options NETGRAPH_CRONYX # Enable NETGRAPH support for Cronyx adapter(s)
540device ed
541#options ED_NO_MIIBUS # Disable ed miibus support
542hint.ed.0.at="isa"
543hint.ed.0.port="0x280"
544hint.ed.0.irq="5"
545hint.ed.0.maddr="0xd8000"
546device el 1
547hint.el.0.at="isa"
548hint.el.0.port="0x300"
549hint.el.0.irq="9"
550device ie # Hints only required for Starlan
551hint.ie.2.at="isa"
552hint.ie.2.port="0x300"
553hint.ie.2.irq="5"
554hint.ie.2.maddr="0xd0000"
555device lnc
556hint.lnc.0.at="isa"
557hint.lnc.0.port="0x280"
558hint.lnc.0.irq="10"
559hint.lnc.0.drq="0"
560device sbni
561hint.sbni.0.at="isa"
562hint.sbni.0.port="0x210"
563hint.sbni.0.irq="0xefdead"
564hint.sbni.0.flags="0"
565device sr
566hint.sr.0.at="isa"
567hint.sr.0.port="0x300"
568hint.sr.0.irq="5"
569hint.sr.0.maddr="0xd0000"
570device oltr
571hint.oltr.0.at="isa"
572device wl
573hint.wl.0.at="isa"
574hint.wl.0.port="0x300"
575options WLCACHE # enables the signal-strength cache
576options WLDEBUG # enables verbose debugging output
577
578device ath
579device ath_hal # Atheros HAL (includes binary component)
580#device wlan # 802.11 layer
581
582#
583# ATA raid adapters
584#
585device pst
586
587#
588# 3ware 9000 series PATA/SATA RAID controller driver and options.
589# The driver is implemented as a SIM, and so, needs the CAM infrastructure.
590#
591options TWA_DEBUG # 0-10; 10 prints the most messages.
592options TWA_FLASH_FIRMWARE # firmware image bundled when defined.
593device twa # 3ware 9000 series PATA/SATA RAID
594
595#
596# SCSI host adapters:
597#
598# ncv: NCR 53C500 based SCSI host adapters.
599# nsp: Workbit Ninja SCSI-3 based PC Card SCSI host adapters.
600# stg: TMC 18C30, 18C50 based SCSI host adapters.
601
602device ncv
603device nsp
604device stg
605hint.stg.0.at="isa"
606hint.stg.0.port="0x140"
607hint.stg.0.port="11"
608
609#
610# Adaptec FSA RAID controllers, including integrated DELL controllers,
611# the Dell PERC 2/QC and the HP NetRAID-4M
612device aac
613device aacp # SCSI Passthrough interface (optional, CAM required)
614
615#
616# IBM (now Adaptec) ServeRAID controllers
617device ips
618
619#
620# SafeNet crypto driver: can be moved to the MI NOTES as soon as
621# it's tested on a big-endian machine
622#
623device safe # SafeNet 1141
624options SAFE_DEBUG # enable debugging support: hw.safe.debug
625options SAFE_RNDTEST # enable rndtest support
626
627#####################################################################
628
629#
630# Miscellaneous hardware:
631#
632# apm: Laptop Advanced Power Management (experimental)
633# pmtimer: Timer device driver for power management events (APM or ACPI)
634# cy: Cyclades serial driver
635# digi: Digiboard driver
636# spic: Sony Programmable I/O controller (VAIO notebooks)
637
638# Notes on APM
639# The flags takes the following meaning for apm0:
640# 0x0020 Statclock is broken.
641
642# Notes on the Specialix SI/XIO driver:
643# The host card is memory, not IO mapped.
644# The Rev 1 host cards use a 64K chunk, on a 32K boundary.
645# The Rev 2 host cards use a 32K chunk, on a 32K boundary.
646# The cards can use an IRQ of 11, 12 or 15.
647
648# Notes on the Sony Programmable I/O controller
649# This is a temporary driver that should someday be replaced by something
650# that hooks into the ACPI layer. The device is hooked to the PIIX4's
651# General Device 10 decoder, which means you have to fiddle with PCI
652# registers to map it in, even though it is otherwise treated here as
653# an ISA device. At the moment, the driver polls, although the device
654# is capable of generating interrupts. It largely undocumented.
655# The port location in the hint is where you WANT the device to be
656# mapped. 0x10a0 seems to be traditional. At the moment the jogdial
657# is the only thing truly supported, but apparently a fair percentage
658# of the Vaio extra features are controlled by this device.
659
660device apm
661hint.apm.0.flags="0x20"
662device pmtimer # Adjust system timer at wakeup time
663device cy 1
664options CY_PCI_FASTINTR # Use with cy_pci unless irq is shared
665hint.cy.0.at="isa"
666hint.cy.0.irq="10"
667hint.cy.0.maddr="0xd4000"
668hint.cy.0.msize="0x2000"
669device digi
670hint.digi.0.at="isa"
671hint.digi.0.port="0x104"
672hint.digi.0.maddr="0xd0000"
673# BIOS & FEP/OS components of device digi.
674device digi_CX
675device digi_CX_PCI
676device digi_EPCX
677device digi_EPCX_PCI
678device digi_Xe
679device digi_Xem
680device digi_Xr
681device spic
682hint.spic.0.at="isa"
683hint.spic.0.port="0x10a0"
| 8#
9
10#
11# This directive is mandatory; it defines the architecture to be
12# configured for; in this case, the 386 family based IBM-PC and
13# compatibles.
14#
15machine i386
16
17#
18# We want LINT to cover profiling as well.
19profile 2
20
21
22#####################################################################
23# SMP OPTIONS:
24#
25# The apic device enables the use of the I/O APIC for interrupt delivery.
26# The apic device can be used in both UP and SMP kernels, but is required
27# for SMP kernels. Thus, the apic device is not strictly an SMP option,
28# but it is a prerequisite for SMP.
29#
30# Notes:
31#
32# Be sure to disable 'cpu I386_CPU' for SMP kernels.
33#
34# By default, mixed mode is used to route IRQ0 from the AT timer via
35# the 8259A master PIC through the ExtINT pin on the first I/O APIC.
36# This can be disabled via the NO_MIXED_MODE option. In that case,
37# IRQ0 will be routed via an intpin on the first I/O APIC. Not all
38# motherboards hook IRQ0 up to the first I/O APIC even though their
39# MP table or MADT may claim to do so. That is why mixed mode is
40# enabled by default.
41#
42# HTT CPUs should only be used if they are enabled in the BIOS. For
43# the ACPI case, ACPI only correctly tells us about any HTT CPUs if
44# they are enabled. However, most HTT systems do not list HTT CPUs
45# in the MP Table if they are enabled, thus we guess at the HTT CPUs
46# for the MP Table case. However, we shouldn't try to guess and use
47# these CPUs if HTTT is disabled. Thus, HTT guessing is only enabled
48# for the MP Table if the user explicitly asks for it via the
49# MPTABLE_FORCE_HTT option. Do NOT use this option if you have HTT
50# disabled in your BIOS.
51#
52
53# Mandatory:
54device apic # I/O apic
55
56# Optional:
57options MPTABLE_FORCE_HTT # Enable HTT CPUs with the MP Table
58options NO_MIXED_MODE # Disable use of mixed mode
59
60
61#####################################################################
62# CPU OPTIONS
63
64#
65# You must specify at least one CPU (the one you intend to run on);
66# deleting the specification for CPUs you don't need to use may make
67# parts of the system run faster.
68# I386_CPU is mutually exclusive with the other CPU types.
69#
70#cpu I386_CPU
71cpu I486_CPU
72cpu I586_CPU # aka Pentium(tm)
73cpu I686_CPU # aka Pentium Pro(tm)
74
75#
76# Options for CPU features.
77#
78# CPU_ATHLON_SSE_HACK tries to enable SSE instructions when the BIOS has
79# forgotten to enable them.
80#
81# CPU_BLUELIGHTNING_3X enables triple-clock mode on IBM Blue Lightning
82# CPU if CPU supports it. The default is double-clock mode on
83# BlueLightning CPU box.
84#
85# CPU_BLUELIGHTNING_FPU_OP_CACHE enables FPU operand cache on IBM
86# BlueLightning CPU. It works only with Cyrix FPU, and this option
87# should not be used with Intel FPU.
88#
89# CPU_BTB_EN enables branch target buffer on Cyrix 5x86 (NOTE 1).
90#
91# CPU_CYRIX_NO_LOCK enables weak locking for the entire address space
92# of Cyrix 6x86 and 6x86MX CPUs by setting the NO_LOCK bit of CCR1.
93# Otherwise, the NO_LOCK bit of CCR1 is cleared. (NOTE 3)
94#
95# CPU_DIRECT_MAPPED_CACHE sets L1 cache of Cyrix 486DLC CPU in direct
96# mapped mode. Default is 2-way set associative mode.
97#
98# CPU_DISABLE_5X86_LSSER disables load store serialize (i.e., enables
99# reorder). This option should not be used if you use memory mapped
100# I/O device(s).
101#
102# CPU_DISABLE_CMPXCHG disables the CMPXCHG instruction on > i386 IA32
103# machines. VmWare seems to emulate this instruction poorly, causing
104# the guest OS to run very slowly. Enabling this with an SMP kernel
105# will cause the kernel to be unusable.
106#
107# CPU_DISABLE_SSE explicitly prevents I686_CPU from turning on SSE.
108#
109# CPU_ELAN enables support for AMDs ElanSC520 CPU.
110# CPU_ELAN_PPS enables precision timestamp code.
111# CPU_ELAN_XTAL sets the clock crystal frequency in Hz.
112#
113# CPU_ENABLE_LONGRUN enables support for Transmeta Crusoe LongRun
114# technology which allows to restrict power consumption of the CPU by
115# using group of hw.crusoe.* sysctls.
116#
117# CPU_ENABLE_SSE enables SSE/MMX2 instructions support. This is default
118# on I686_CPU and above.
119#
120# CPU_ENABLE_TCC enables Thermal Control Circuitry (TCC) found in some
121# Pentium(tm) 4 and (possibly) later CPUs. When enabled and detected,
122# TCC supports restricting power consumption using the hw.p4tcc.*
123# sysctls. This operates independently of SpeedStep and is useful on
124# systems where other mechanisms such as apm(4) or acpi(4) don't work.
125#
126# CPU_FASTER_5X86_FPU enables faster FPU exception handler.
127#
128# CPU_GEODE is for the SC1100 Geode embedded processor. This option
129# is necessary because the i8254 timecounter is toast.
130#
131# CPU_I486_ON_386 enables CPU cache on i486 based CPU upgrade products
132# for i386 machines.
133#
134# CPU_IORT defines I/O clock delay time (NOTE 1). Default values of
135# I/O clock delay time on Cyrix 5x86 and 6x86 are 0 and 7,respectively
136# (no clock delay).
137#
138# CPU_L2_LATENCY specifies the L2 cache latency value. This option is used
139# only when CPU_PPRO2CELERON is defined and Mendocino Celeron is detected.
140# The default value is 5.
141#
142# CPU_LOOP_EN prevents flushing the prefetch buffer if the destination
143# of a jump is already present in the prefetch buffer on Cyrix 5x86(NOTE
144# 1).
145#
146# CPU_PPRO2CELERON enables L2 cache of Mendocino Celeron CPUs. This option
147# is useful when you use Socket 8 to Socket 370 converter, because most Pentium
148# Pro BIOSs do not enable L2 cache of Mendocino Celeron CPUs.
149#
150# CPU_RSTK_EN enables return stack on Cyrix 5x86 (NOTE 1).
151#
152# CPU_SOEKRIS enables support www.soekris.com hardware.
153#
154# CPU_SUSP_HLT enables suspend on HALT. If this option is set, CPU
155# enters suspend mode following execution of HALT instruction.
156#
157# CPU_UPGRADE_HW_CACHE eliminates unneeded cache flush instruction(s).
158#
159# CPU_WT_ALLOC enables write allocation on Cyrix 6x86/6x86MX and AMD
160# K5/K6/K6-2 CPUs.
161#
162# CYRIX_CACHE_WORKS enables CPU cache on Cyrix 486 CPUs with cache
163# flush at hold state.
164#
165# CYRIX_CACHE_REALLY_WORKS enables (1) CPU cache on Cyrix 486 CPUs
166# without cache flush at hold state, and (2) write-back CPU cache on
167# Cyrix 6x86 whose revision < 2.7 (NOTE 2).
168#
169# NO_F00F_HACK disables the hack that prevents Pentiums (and ONLY
170# Pentiums) from locking up when a LOCK CMPXCHG8B instruction is
171# executed. This option is only needed if I586_CPU is also defined,
172# and should be included for any non-Pentium CPU that defines it.
173#
174# NO_MEMORY_HOLE is an optimisation for systems with AMD K6 processors
175# which indicates that the 15-16MB range is *definitely* not being
176# occupied by an ISA memory hole.
177#
178# NOTE 1: The options, CPU_BTB_EN, CPU_LOOP_EN, CPU_IORT,
179# CPU_LOOP_EN and CPU_RSTK_EN should not be used because of CPU bugs.
180# These options may crash your system.
181#
182# NOTE 2: If CYRIX_CACHE_REALLY_WORKS is not set, CPU cache is enabled
183# in write-through mode when revision < 2.7. If revision of Cyrix
184# 6x86 >= 2.7, CPU cache is always enabled in write-back mode.
185#
186# NOTE 3: This option may cause failures for software that requires
187# locked cycles in order to operate correctly.
188#
189options CPU_ATHLON_SSE_HACK
190options CPU_BLUELIGHTNING_3X
191options CPU_BLUELIGHTNING_FPU_OP_CACHE
192options CPU_BTB_EN
193options CPU_DIRECT_MAPPED_CACHE
194options CPU_DISABLE_5X86_LSSER
195options CPU_DISABLE_CMPXCHG
196#options CPU_DISABLE_SSE
197options CPU_ELAN
198options CPU_ELAN_PPS
199options CPU_ELAN_XTAL=32768000
200options CPU_ENABLE_LONGRUN
201options CPU_ENABLE_SSE
202options CPU_ENABLE_TCC
203options CPU_FASTER_5X86_FPU
204options CPU_GEODE
205options CPU_I486_ON_386
206options CPU_IORT
207options CPU_L2_LATENCY=5
208options CPU_LOOP_EN
209options CPU_PPRO2CELERON
210options CPU_RSTK_EN
211options CPU_SOEKRIS
212options CPU_SUSP_HLT
213options CPU_UPGRADE_HW_CACHE
214options CPU_WT_ALLOC
215options CYRIX_CACHE_WORKS
216options CYRIX_CACHE_REALLY_WORKS
217#options NO_F00F_HACK
218
219# Debug options
220options NPX_DEBUG # enable npx debugging
221
222#
223# PERFMON causes the driver for Pentium/Pentium Pro performance counters
224# to be compiled. See perfmon(4) for more information.
225#
226options PERFMON
227
228
229#####################################################################
230# NETWORKING OPTIONS
231
232#
233# DEVICE_POLLING adds support for mixed interrupt-polling handling
234# of network device drivers, which has significant benefits in terms
235# of robustness to overloads and responsivity, as well as permitting
236# accurate scheduling of the CPU time between kernel network processing
237# and other activities. The drawback is a moderate (up to 1/HZ seconds)
238# potential increase in response times.
239# It is strongly recommended to use HZ=1000 or 2000 with DEVICE_POLLING
240# to achieve smoother behaviour.
241# Additionally, you can enable/disable polling at runtime with the
242# sysctl variable kern.polling.enable (defaults off), and select
243# the CPU fraction reserved to userland with the sysctl variable
244# kern.polling.user_frac (default 50, range 0..100).
245#
246# Not all device drivers support this mode of operation at the time of
247# this writing. See polling(4) for more details.
248
249options DEVICE_POLLING
250
251
252#####################################################################
253# CLOCK OPTIONS
254
255# The following options are used for debugging clock behavior only, and
256# should not be used for production systems.
257
258# CLK_CALIBRATION_LOOP causes clock calibration to be run in a loop at
259# startup until the user presses a key. (The i8254 clock is always
260# calibrated relative to the RTC (mc146818a) and this option causes the
261# calibration to be repeated.)
262options CLK_CALIBRATION_LOOP
263
264# CLK_USE_I8254_CALIBRATION causes the calibrated frequency of the i8254
265# clock to actually be used.
266options CLK_USE_I8254_CALIBRATION
267
268
269#####################################################################
270# MISCELLANEOUS DEVICES AND OPTIONS
271
272device speaker #Play IBM BASIC-style noises out your speaker
273hint.speaker.0.at="isa"
274hint.speaker.0.port="0x61"
275device gzip #Exec gzipped a.out's. REQUIRES COMPAT_AOUT!
276device apm_saver # Requires APM
277
278
279#####################################################################
280# HARDWARE BUS CONFIGURATION
281
282#
283# ISA bus
284#
285device isa
286
287#
288# Options for `isa':
289#
290# AUTO_EOI_1 enables the `automatic EOI' feature for the master 8259A
291# interrupt controller. This saves about 0.7-1.25 usec for each interrupt.
292# This option breaks suspend/resume on some portables.
293#
294# AUTO_EOI_2 enables the `automatic EOI' feature for the slave 8259A
295# interrupt controller. This saves about 0.7-1.25 usec for each interrupt.
296# Automatic EOI is documented not to work for for the slave with the
297# original i8259A, but it works for some clones and some integrated
298# versions.
299#
300# MAXMEM specifies the amount of RAM on the machine; if this is not
301# specified, FreeBSD will first read the amount of memory from the CMOS
302# RAM, so the amount of memory will initially be limited to 64MB or 16MB
303# depending on the BIOS. If the BIOS reports 64MB, a memory probe will
304# then attempt to detect the installed amount of RAM. If this probe
305# fails to detect >64MB RAM you will have to use the MAXMEM option.
306# The amount is in kilobytes, so for a machine with 128MB of RAM, it would
307# be 131072 (128 * 1024).
308#
309# BROKEN_KEYBOARD_RESET disables the use of the keyboard controller to
310# reset the CPU for reboot. This is needed on some systems with broken
311# keyboard controllers.
312
313options AUTO_EOI_1
314#options AUTO_EOI_2
315
316options MAXMEM=(128*1024)
317#options BROKEN_KEYBOARD_RESET
318
319#
320# EISA bus
321#
322# The EISA bus device is `eisa'. It provides auto-detection and
323# configuration support for all devices on the EISA bus.
324
325device eisa
326
327# By default, only 10 EISA slots are probed, since the slot numbers
328# above clash with the configuration address space of the PCI subsystem,
329# and the EISA probe is not very smart about this. This is sufficient
330# for most machines, but in particular the HP NetServer LC series comes
331# with an onboard AIC7770 dual-channel SCSI controller on EISA slot #11,
332# thus you need to bump this figure to 12 for them.
333options EISA_SLOTS=12
334
335#
336# MCA bus:
337#
338# The MCA bus device is `mca'. It provides auto-detection and
339# configuration support for all devices on the MCA bus.
340# No hints are required for MCA.
341
342device mca
343
344#
345# PCI bus & PCI options:
346#
347device pci
348
349#
350# AGP GART support
351device agp
352
353
354#####################################################################
355# HARDWARE DEVICE CONFIGURATION
356
357# To include support for VGA VESA video modes
358options VESA
359
360# Turn on extra debugging checks and output for VESA support.
361options VESA_DEBUG
362
363# The pcvt console driver (vt220 compatible).
364device vt
365hint.vt.0.at="isa"
366options XSERVER # support for running an X server on vt
367options FAT_CURSOR # start with block cursor
368# This PCVT option is for keyboards such as those used on really old ThinkPads
369options PCVT_SCANSET=2
370# Other PCVT options are documented in pcvt(4).
371options PCVT_24LINESDEF
372options PCVT_CTRL_ALT_DEL
373options PCVT_META_ESC
374options PCVT_NSCREENS=9
375options PCVT_PRETTYSCRNS
376options PCVT_SCREENSAVER
377options PCVT_USEKBDSEC
378options PCVT_VT220KEYB
379options PCVT_GREENSAVER
380
381#
382# The Numeric Processing eXtension driver. In addition to this, you
383# may configure a math emulator (see above). If your machine has a
384# hardware FPU and the kernel configuration includes the npx device
385# *and* a math emulator compiled into the kernel, the hardware FPU
386# will be used, unless it is found to be broken or unless "flags" to
387# npx0 includes "0x08", which requests preference for the emulator.
388device npx
389hint.npx.0.flags="0x0"
390hint.npx.0.irq="13"
391
392#
393# `flags' for npx0:
394# 0x01 don't use the npx registers to optimize bcopy.
395# 0x02 don't use the npx registers to optimize bzero.
396# 0x04 don't use the npx registers to optimize copyin or copyout.
397# 0x08 use emulator even if hardware FPU is available.
398# The npx registers are normally used to optimize copying and zeroing when
399# all of the following conditions are satisfied:
400# I586_CPU is an option
401# the cpu is an i586 (perhaps not a Pentium)
402# the probe for npx0 succeeds
403# INT 16 exception handling works.
404# Then copying and zeroing using the npx registers is normally 30-100% faster.
405# The flags can be used to control cases where it doesn't work or is slower.
406# Setting them at boot time using userconfig works right (the optimizations
407# are not used until later in the bootstrap when npx0 is attached).
408# Flag 0x08 automatically disables the i586 optimized routines.
409#
410
411#
412# Optional devices:
413#
414
415# 3Dfx Voodoo Graphics, Voodoo II /dev/3dfx CDEV support. This will create
416# the /dev/3dfx0 device to work with glide implementations. This should get
417# linked to /dev/3dfx and /dev/voodoo. Note that this is not the same as
418# the tdfx DRI module from XFree86 and is completely unrelated.
419#
420# To enable Linuxulator support, one must also include COMPAT_LINUX in the
421# config as well, or you will not have the dependencies. The other option
422# is to load both as modules.
423
424device tdfx # Enable 3Dfx Voodoo support
425options TDFX_LINUX # Enable Linuxulator support
426
427#
428# ACPI support using the Intel ACPI Component Architecture reference
429# implementation.
430#
431# ACPI_DEBUG enables the use of the debug.acpi.level and debug.acpi.layer
432# kernel environment variables to select initial debugging levels for the
433# Intel ACPICA code. (Note that the Intel code must also have USE_DEBUGGER
434# defined when it is built).
435#
436# ACPI_MAX_THREADS sets the number of task threads started.
437#
438# ACPI_NO_SEMAPHORES makes the AcpiOs*Semaphore routines a no-op.
439#
440# ACPICA_PEDANTIC enables strict checking of AML. Our default is to
441# relax these checks to allow code generated by the Microsoft compiler
442# to still execute.
443#
444# Note that building ACPI into the kernel is deprecated; the module is
445# normally loaded automatically by the loader.
446
447device acpi
448options ACPI_DEBUG
449options ACPI_MAX_THREADS=1
450#!options ACPI_NO_SEMAPHORES
451#!options ACPICA_PEDANTIC
452
453# ACPI Toshiba Extras (LCD backlight/brightness, video output, etc.)
454device acpi_toshiba
455
456# ACPI Video Extensions (LCD backlight/brightness, video output, etc.)
457device acpi_video
458
459# DRM options:
460# mgadrm: AGP Matrox G200, G400, G450, G550
461# r128drm: ATI Rage 128
462# radeondrm: ATI Radeon up to 9000/9100
463# sisdrm: SiS 300/305,540,630
464# tdfxdrm: 3dfx Voodoo 3/4/5 and Banshee
465# DRM_DEBUG: include debug printfs, very slow
466#
467# mga requires AGP in the kernel, and it is recommended
468# for AGP r128 and radeon cards.
469
470device mgadrm
471device "r128drm"
472device radeondrm
473device sisdrm
474device tdfxdrm
475
476options DRM_DEBUG
477
478# M-systems DiskOnchip products see src/sys/contrib/dev/fla/README
479device fla
480hint.fla.0.at="isa"
481
482#
483# mse: Logitech and ATI InPort bus mouse ports
484
485device mse
486hint.mse.0.at="isa"
487hint.mse.0.port="0x23c"
488hint.mse.0.irq="5"
489
490#
491# Network interfaces:
492#
493
494# ar: Arnet SYNC/570i hdlc sync 2/4 port V.35/X.21 serial driver
495# (requires sppp)
496# arl: Aironet Arlan 655 wireless adapters.
497# ath: Atheros a/b/g WiFi adapters (requires ath_hal and wlan)
498# ctau: Cronyx/Tau sync dual port V.35/RS-232/RS-530/RS-449/X.21/G.703/E1
499# serial adaptor (requires sppp (default), or NETGRAPH if
500# NETGRAPH_CRONYX is configured)
501# cx: Cronyx/Sigma multiport sync/async adapter (requires sppp (default),
502# or NETGRAPH if NETGRAPH_CRONYX is configured)
503# ed: Western Digital and SMC 80xx; Novell NE1000 and NE2000; 3Com 3C503
504# HP PC Lan+, various PC Card devices (refer to etc/defaults/pccard.conf)
505# (requires miibus)
506# el: 3Com 3C501 (slow!)
507# ie: AT&T StarLAN 10 and EN100; 3Com 3C507; unknown NI5210;
508# Intel EtherExpress
509# lnc: Lance/PCnet cards (Isolan, Novell NE2100, NE32-VL, AMD Am7990 and
510# Am79C960)
511# oltr: Olicom ISA token-ring adapters OC-3115, OC-3117, OC-3118 and OC-3133.
512# Olicom PCI token-ring adapters OC-3136, OC-3137, OC-3139, OC-3140,
513# OC-3141, OC-3540 and OC-3250.
514# sbni: Granch SBNI12-xx ISA and PCI adapters
515# sr: RISCom/N2 hdlc sync 1/2 port V.35/X.21 serial driver (requires sppp)
516# wl: Lucent Wavelan (ISA card only).
517
518# Order for ISA/EISA devices is important here
519
520device ar
521hint.ar.0.at="isa"
522hint.ar.0.port="0x300"
523hint.ar.0.irq="10"
524hint.ar.0.maddr="0xd0000"
525device arl
526hint.arl.0.at="isa"
527hint.arl.0.irq="9"
528hint.arl.0.maddr="0xd0000"
529device ctau
530hint.ctau.0.at="isa"
531hint.ctau.0.port="0x240"
532hint.ctau.0.irq="15"
533hint.ctau.0.drq="7"
534device cx
535hint.cx.0.at="isa"
536hint.cx.0.port="0x240"
537hint.cx.0.irq="15"
538hint.cx.0.drq="7"
539#options NETGRAPH_CRONYX # Enable NETGRAPH support for Cronyx adapter(s)
540device ed
541#options ED_NO_MIIBUS # Disable ed miibus support
542hint.ed.0.at="isa"
543hint.ed.0.port="0x280"
544hint.ed.0.irq="5"
545hint.ed.0.maddr="0xd8000"
546device el 1
547hint.el.0.at="isa"
548hint.el.0.port="0x300"
549hint.el.0.irq="9"
550device ie # Hints only required for Starlan
551hint.ie.2.at="isa"
552hint.ie.2.port="0x300"
553hint.ie.2.irq="5"
554hint.ie.2.maddr="0xd0000"
555device lnc
556hint.lnc.0.at="isa"
557hint.lnc.0.port="0x280"
558hint.lnc.0.irq="10"
559hint.lnc.0.drq="0"
560device sbni
561hint.sbni.0.at="isa"
562hint.sbni.0.port="0x210"
563hint.sbni.0.irq="0xefdead"
564hint.sbni.0.flags="0"
565device sr
566hint.sr.0.at="isa"
567hint.sr.0.port="0x300"
568hint.sr.0.irq="5"
569hint.sr.0.maddr="0xd0000"
570device oltr
571hint.oltr.0.at="isa"
572device wl
573hint.wl.0.at="isa"
574hint.wl.0.port="0x300"
575options WLCACHE # enables the signal-strength cache
576options WLDEBUG # enables verbose debugging output
577
578device ath
579device ath_hal # Atheros HAL (includes binary component)
580#device wlan # 802.11 layer
581
582#
583# ATA raid adapters
584#
585device pst
586
587#
588# 3ware 9000 series PATA/SATA RAID controller driver and options.
589# The driver is implemented as a SIM, and so, needs the CAM infrastructure.
590#
591options TWA_DEBUG # 0-10; 10 prints the most messages.
592options TWA_FLASH_FIRMWARE # firmware image bundled when defined.
593device twa # 3ware 9000 series PATA/SATA RAID
594
595#
596# SCSI host adapters:
597#
598# ncv: NCR 53C500 based SCSI host adapters.
599# nsp: Workbit Ninja SCSI-3 based PC Card SCSI host adapters.
600# stg: TMC 18C30, 18C50 based SCSI host adapters.
601
602device ncv
603device nsp
604device stg
605hint.stg.0.at="isa"
606hint.stg.0.port="0x140"
607hint.stg.0.port="11"
608
609#
610# Adaptec FSA RAID controllers, including integrated DELL controllers,
611# the Dell PERC 2/QC and the HP NetRAID-4M
612device aac
613device aacp # SCSI Passthrough interface (optional, CAM required)
614
615#
616# IBM (now Adaptec) ServeRAID controllers
617device ips
618
619#
620# SafeNet crypto driver: can be moved to the MI NOTES as soon as
621# it's tested on a big-endian machine
622#
623device safe # SafeNet 1141
624options SAFE_DEBUG # enable debugging support: hw.safe.debug
625options SAFE_RNDTEST # enable rndtest support
626
627#####################################################################
628
629#
630# Miscellaneous hardware:
631#
632# apm: Laptop Advanced Power Management (experimental)
633# pmtimer: Timer device driver for power management events (APM or ACPI)
634# cy: Cyclades serial driver
635# digi: Digiboard driver
636# spic: Sony Programmable I/O controller (VAIO notebooks)
637
638# Notes on APM
639# The flags takes the following meaning for apm0:
640# 0x0020 Statclock is broken.
641
642# Notes on the Specialix SI/XIO driver:
643# The host card is memory, not IO mapped.
644# The Rev 1 host cards use a 64K chunk, on a 32K boundary.
645# The Rev 2 host cards use a 32K chunk, on a 32K boundary.
646# The cards can use an IRQ of 11, 12 or 15.
647
648# Notes on the Sony Programmable I/O controller
649# This is a temporary driver that should someday be replaced by something
650# that hooks into the ACPI layer. The device is hooked to the PIIX4's
651# General Device 10 decoder, which means you have to fiddle with PCI
652# registers to map it in, even though it is otherwise treated here as
653# an ISA device. At the moment, the driver polls, although the device
654# is capable of generating interrupts. It largely undocumented.
655# The port location in the hint is where you WANT the device to be
656# mapped. 0x10a0 seems to be traditional. At the moment the jogdial
657# is the only thing truly supported, but apparently a fair percentage
658# of the Vaio extra features are controlled by this device.
659
660device apm
661hint.apm.0.flags="0x20"
662device pmtimer # Adjust system timer at wakeup time
663device cy 1
664options CY_PCI_FASTINTR # Use with cy_pci unless irq is shared
665hint.cy.0.at="isa"
666hint.cy.0.irq="10"
667hint.cy.0.maddr="0xd4000"
668hint.cy.0.msize="0x2000"
669device digi
670hint.digi.0.at="isa"
671hint.digi.0.port="0x104"
672hint.digi.0.maddr="0xd0000"
673# BIOS & FEP/OS components of device digi.
674device digi_CX
675device digi_CX_PCI
676device digi_EPCX
677device digi_EPCX_PCI
678device digi_Xe
679device digi_Xem
680device digi_Xr
681device spic
682hint.spic.0.at="isa"
683hint.spic.0.port="0x10a0"
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