1/*
2 * Copyright 2012 Sascha Hauer, Pengutronix
3 *
4 * The code contained herein is licensed under the GNU General Public
5 * License. You may obtain a copy of the GNU General Public License
6 * Version 2 or later at the following locations:
7 *
8 * http://www.opensource.org/licenses/gpl-license.html

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103 wdog: wdog@10002000 {
104 compatible = "fsl,imx27-wdt", "fsl,imx21-wdt";
105 reg = <0x10002000 0x1000>;
106 interrupts = <27>;
107 clocks = <&clks IMX27_CLK_WDOG_IPG_GATE>;
108 };
109
110 gpt1: timer@10003000 {
111 compatible = "fsl,imx27-gpt", "fsl,imx1-gpt";
112 reg = <0x10003000 0x1000>;
113 interrupts = <26>;
114 clocks = <&clks IMX27_CLK_GPT1_IPG_GATE>,
115 <&clks IMX27_CLK_PER1_GATE>;
116 clock-names = "ipg", "per";
117 };
118
119 gpt2: timer@10004000 {
120 compatible = "fsl,imx27-gpt", "fsl,imx1-gpt";
121 reg = <0x10004000 0x1000>;
122 interrupts = <25>;
123 clocks = <&clks IMX27_CLK_GPT2_IPG_GATE>,
124 <&clks IMX27_CLK_PER1_GATE>;
125 clock-names = "ipg", "per";
126 };
127
128 gpt3: timer@10005000 {
129 compatible = "fsl,imx27-gpt", "fsl,imx1-gpt";
130 reg = <0x10005000 0x1000>;
131 interrupts = <24>;
132 clocks = <&clks IMX27_CLK_GPT3_IPG_GATE>,
133 <&clks IMX27_CLK_PER1_GATE>;
134 clock-names = "ipg", "per";
135 };
136
137 pwm: pwm@10006000 {
138 #pwm-cells = <2>;
139 compatible = "fsl,imx27-pwm";
140 reg = <0x10006000 0x1000>;
141 interrupts = <23>;
142 clocks = <&clks IMX27_CLK_PWM_IPG_GATE>,
143 <&clks IMX27_CLK_PER1_GATE>;
144 clock-names = "ipg", "per";
145 };
146
147 kpp: kpp@10008000 {
148 compatible = "fsl,imx27-kpp", "fsl,imx21-kpp";
149 reg = <0x10008000 0x1000>;
150 interrupts = <21>;
151 clocks = <&clks IMX27_CLK_KPP_IPG_GATE>;
152 status = "disabled";
153 };
154

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371 interrupts = <6>;
372 clocks = <&clks IMX27_CLK_CSPI3_IPG_GATE>,
373 <&clks IMX27_CLK_PER2_GATE>;
374 clock-names = "ipg", "per";
375 status = "disabled";
376 };
377
378 gpt4: timer@10019000 {
379 compatible = "fsl,imx27-gpt", "fsl,imx1-gpt";
380 reg = <0x10019000 0x1000>;
381 interrupts = <4>;
382 clocks = <&clks IMX27_CLK_GPT4_IPG_GATE>,
383 <&clks IMX27_CLK_PER1_GATE>;
384 clock-names = "ipg", "per";
385 };
386
387 gpt5: timer@1001a000 {
388 compatible = "fsl,imx27-gpt", "fsl,imx1-gpt";
389 reg = <0x1001a000 0x1000>;
390 interrupts = <3>;
391 clocks = <&clks IMX27_CLK_GPT5_IPG_GATE>,
392 <&clks IMX27_CLK_PER1_GATE>;
393 clock-names = "ipg", "per";
394 };
395
396 uart5: serial@1001b000 {

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431 <&clks IMX27_CLK_PER2_GATE>;
432 clock-names = "ipg", "per";
433 dmas = <&dma 36>;
434 dma-names = "rx-tx";
435 status = "disabled";
436 };
437
438 gpt6: timer@1001f000 {
439 compatible = "fsl,imx27-gpt", "fsl,imx1-gpt";
440 reg = <0x1001f000 0x1000>;
441 interrupts = <2>;
442 clocks = <&clks IMX27_CLK_GPT6_IPG_GATE>,
443 <&clks IMX27_CLK_PER1_GATE>;
444 clock-names = "ipg", "per";
445 };
446 };
447

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472 clock-names = "per", "ahb";
473 iram = <&iram>;
474 };
475
476 usbotg: usb@10024000 {
477 compatible = "fsl,imx27-usb";
478 reg = <0x10024000 0x200>;
479 interrupts = <56>;
480 clocks = <&clks IMX27_CLK_USB_IPG_GATE>;
481 fsl,usbmisc = <&usbmisc 0>;
482 status = "disabled";
483 };
484
485 usbh1: usb@10024200 {
486 compatible = "fsl,imx27-usb";
487 reg = <0x10024200 0x200>;
488 interrupts = <54>;
489 clocks = <&clks IMX27_CLK_USB_IPG_GATE>;
490 fsl,usbmisc = <&usbmisc 1>;
491 status = "disabled";
492 };
493
494 usbh2: usb@10024400 {
495 compatible = "fsl,imx27-usb";
496 reg = <0x10024400 0x200>;
497 interrupts = <55>;
498 clocks = <&clks IMX27_CLK_USB_IPG_GATE>;
499 fsl,usbmisc = <&usbmisc 2>;
500 status = "disabled";
501 };
502
503 usbmisc: usbmisc@10024600 {
504 #index-cells = <1>;
505 compatible = "fsl,imx27-usbmisc";
506 reg = <0x10024600 0x200>;
507 clocks = <&clks IMX27_CLK_USB_AHB_GATE>;
508 };
509
510 sahara2: sahara@10025000 {
511 compatible = "fsl,imx27-sahara";
512 reg = <0x10025000 0x1000>;
513 interrupts = <59>;
514 clocks = <&clks IMX27_CLK_SAHARA_IPG_GATE>,
515 <&clks IMX27_CLK_SAHARA_AHB_GATE>;

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526 compatible = "fsl,imx27-iim";
527 reg = <0x10028000 0x1000>;
528 interrupts = <62>;
529 clocks = <&clks IMX27_CLK_IIM_IPG_GATE>;
530 };
531
532 fec: ethernet@1002b000 {
533 compatible = "fsl,imx27-fec";
534 reg = <0x1002b000 0x4000>;
535 interrupts = <50>;
536 clocks = <&clks IMX27_CLK_FEC_IPG_GATE>,
537 <&clks IMX27_CLK_FEC_AHB_GATE>;
538 clock-names = "ipg", "ahb";
539 status = "disabled";
540 };
541 };
542

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