| imx25-pinfunc.h (279385) | imx25-pinfunc.h (295436) |
|---|---|
| 1/* 2 * Copyright 2013 Eukr��a Electromatique <denis@eukrea.com> 3 * Based on imx35-pinfunc.h in the same directory Which is: 4 * Copyright 2013 Freescale Semiconductor, Inc. 5 * 6 * This program is free software; you can redistribute it and/or modify 7 * it under the terms of the GNU General Public License version 2 as 8 * published by the Free Software Foundation. 9 * 10 */ 11 12#ifndef __DTS_IMX25_PINFUNC_H 13#define __DTS_IMX25_PINFUNC_H 14 15/* 16 * The pin function ID is a tuple of 17 * <mux_reg conf_reg input_reg mux_mode input_val> 18 */ 19 | 1/* 2 * Copyright 2013 Eukr��a Electromatique <denis@eukrea.com> 3 * Based on imx35-pinfunc.h in the same directory Which is: 4 * Copyright 2013 Freescale Semiconductor, Inc. 5 * 6 * This program is free software; you can redistribute it and/or modify 7 * it under the terms of the GNU General Public License version 2 as 8 * published by the Free Software Foundation. 9 * 10 */ 11 12#ifndef __DTS_IMX25_PINFUNC_H 13#define __DTS_IMX25_PINFUNC_H 14 15/* 16 * The pin function ID is a tuple of 17 * <mux_reg conf_reg input_reg mux_mode input_val> 18 */ 19 |
| 20#define MX25_PAD_TDO__TDO 0x000 0x3e8 0x000 0x00 0x000 21 |
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| 20#define MX25_PAD_A10__A10 0x008 0x000 0x000 0x00 0x000 21#define MX25_PAD_A10__GPIO_4_0 0x008 0x000 0x000 0x05 0x000 22 23#define MX25_PAD_A13__A13 0x00c 0x22C 0x000 0x00 0x000 24#define MX25_PAD_A13__GPIO_4_1 0x00c 0x22C 0x000 0x05 0x000 | 22#define MX25_PAD_A10__A10 0x008 0x000 0x000 0x00 0x000 23#define MX25_PAD_A10__GPIO_4_0 0x008 0x000 0x000 0x05 0x000 24 25#define MX25_PAD_A13__A13 0x00c 0x22C 0x000 0x00 0x000 26#define MX25_PAD_A13__GPIO_4_1 0x00c 0x22C 0x000 0x05 0x000 |
| 27#define MX25_PAD_A13__LCDC_CLS 0x00c 0x22C 0x000 0x07 0x000 |
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| 25 26#define MX25_PAD_A14__A14 0x010 0x230 0x000 0x10 0x000 27#define MX25_PAD_A14__GPIO_2_0 0x010 0x230 0x000 0x15 0x000 | 28 29#define MX25_PAD_A14__A14 0x010 0x230 0x000 0x10 0x000 30#define MX25_PAD_A14__GPIO_2_0 0x010 0x230 0x000 0x15 0x000 |
| 31#define MX25_PAD_A14__SIM1_CLK1 0x010 0x230 0x000 0x16 0x000 32#define MX25_PAD_A14__LCDC_SPL 0x010 0x230 0x000 0x17 0x000 |
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| 28 29#define MX25_PAD_A15__A15 0x014 0x234 0x000 0x10 0x000 30#define MX25_PAD_A15__GPIO_2_1 0x014 0x234 0x000 0x15 0x000 | 33 34#define MX25_PAD_A15__A15 0x014 0x234 0x000 0x10 0x000 35#define MX25_PAD_A15__GPIO_2_1 0x014 0x234 0x000 0x15 0x000 |
| 36#define MX25_PAD_A15__SIM1_RST1 0x014 0x234 0x000 0x16 0x000 37#define MX25_PAD_A15__LCDC_PS 0x014 0x234 0x000 0x17 0x000 |
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| 31 32#define MX25_PAD_A16__A16 0x018 0x000 0x000 0x10 0x000 33#define MX25_PAD_A16__GPIO_2_2 0x018 0x000 0x000 0x15 0x000 | 38 39#define MX25_PAD_A16__A16 0x018 0x000 0x000 0x10 0x000 40#define MX25_PAD_A16__GPIO_2_2 0x018 0x000 0x000 0x15 0x000 |
| 41#define MX25_PAD_A16__SIM1_VEN1 0x018 0x000 0x000 0x16 0x000 42#define MX25_PAD_A16__LCDC_REV 0x018 0x000 0x000 0x17 0x000 |
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| 34 35#define MX25_PAD_A17__A17 0x01c 0x238 0x000 0x10 0x000 36#define MX25_PAD_A17__GPIO_2_3 0x01c 0x238 0x000 0x15 0x000 | 43 44#define MX25_PAD_A17__A17 0x01c 0x238 0x000 0x10 0x000 45#define MX25_PAD_A17__GPIO_2_3 0x01c 0x238 0x000 0x15 0x000 |
| 46#define MX25_PAD_A17__SIM1_TX 0x01c 0x238 0x554 0x16 0x000 47#define MX25_PAD_A17__FEC_TX_ERR 0x01c 0x238 0x000 0x17 0x000 |
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| 37 38#define MX25_PAD_A18__A18 0x020 0x23c 0x000 0x10 0x000 39#define MX25_PAD_A18__GPIO_2_4 0x020 0x23c 0x000 0x15 0x000 | 48 49#define MX25_PAD_A18__A18 0x020 0x23c 0x000 0x10 0x000 50#define MX25_PAD_A18__GPIO_2_4 0x020 0x23c 0x000 0x15 0x000 |
| 51#define MX25_PAD_A18__SIM1_PD1 0x020 0x23c 0x550 0x16 0x000 |
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| 40#define MX25_PAD_A18__FEC_COL 0x020 0x23c 0x504 0x17 0x000 41 42#define MX25_PAD_A19__A19 0x024 0x240 0x000 0x10 0x000 | 52#define MX25_PAD_A18__FEC_COL 0x020 0x23c 0x504 0x17 0x000 53 54#define MX25_PAD_A19__A19 0x024 0x240 0x000 0x10 0x000 |
| 43#define MX25_PAD_A19__FEC_RX_ER 0x024 0x240 0x518 0x17 0x000 | |
| 44#define MX25_PAD_A19__GPIO_2_5 0x024 0x240 0x000 0x15 0x000 | 55#define MX25_PAD_A19__GPIO_2_5 0x024 0x240 0x000 0x15 0x000 |
| 56#define MX25_PAD_A19__SIM1_RX1 0x024 0x240 0x54c 0x16 0x000 57#define MX25_PAD_A19__FEC_RX_ERR 0x024 0x240 0x518 0x17 0x000 |
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| 45 46#define MX25_PAD_A20__A20 0x028 0x244 0x000 0x10 0x000 47#define MX25_PAD_A20__GPIO_2_6 0x028 0x244 0x000 0x15 0x000 | 58 59#define MX25_PAD_A20__A20 0x028 0x244 0x000 0x10 0x000 60#define MX25_PAD_A20__GPIO_2_6 0x028 0x244 0x000 0x15 0x000 |
| 61#define MX25_PAD_A20__SIM2_CLK1 0x028 0x244 0x000 0x16 0x000 |
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| 48#define MX25_PAD_A20__FEC_RDATA2 0x028 0x244 0x50c 0x17 0x000 49 50#define MX25_PAD_A21__A21 0x02c 0x248 0x000 0x10 0x000 51#define MX25_PAD_A21__GPIO_2_7 0x02c 0x248 0x000 0x15 0x000 | 62#define MX25_PAD_A20__FEC_RDATA2 0x028 0x244 0x50c 0x17 0x000 63 64#define MX25_PAD_A21__A21 0x02c 0x248 0x000 0x10 0x000 65#define MX25_PAD_A21__GPIO_2_7 0x02c 0x248 0x000 0x15 0x000 |
| 66#define MX25_PAD_A21__SIM2_RST1 0x02c 0x248 0x000 0x16 0x000 |
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| 52#define MX25_PAD_A21__FEC_RDATA3 0x02c 0x248 0x510 0x17 0x000 53 54#define MX25_PAD_A22__A22 0x030 0x000 0x000 0x10 0x000 55#define MX25_PAD_A22__GPIO_2_8 0x030 0x000 0x000 0x15 0x000 | 67#define MX25_PAD_A21__FEC_RDATA3 0x02c 0x248 0x510 0x17 0x000 68 69#define MX25_PAD_A22__A22 0x030 0x000 0x000 0x10 0x000 70#define MX25_PAD_A22__GPIO_2_8 0x030 0x000 0x000 0x15 0x000 |
| 71#define MX25_PAD_A22__FEC_TDATA2 0x030 0x000 0x000 0x17 0x000 72#define MX25_PAD_A22__SIM2_VEN1 0x030 0x000 0x000 0x16 0x000 73#define MX25_PAD_A22__FEC_TDATA2 0x030 0x000 0x000 0x17 0x000 |
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| 56 57#define MX25_PAD_A23__A23 0x034 0x24c 0x000 0x10 0x000 58#define MX25_PAD_A23__GPIO_2_9 0x034 0x24c 0x000 0x15 0x000 | 74 75#define MX25_PAD_A23__A23 0x034 0x24c 0x000 0x10 0x000 76#define MX25_PAD_A23__GPIO_2_9 0x034 0x24c 0x000 0x15 0x000 |
| 77#define MX25_PAD_A23__SIM2_TX1 0x034 0x24c 0x560 0x16 0x000 78#define MX25_PAD_A23__FEC_TDATA3 0x034 0x24c 0x000 0x17 0x000 |
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| 59 60#define MX25_PAD_A24__A24 0x038 0x250 0x000 0x10 0x000 61#define MX25_PAD_A24__GPIO_2_10 0x038 0x250 0x000 0x15 0x000 | 79 80#define MX25_PAD_A24__A24 0x038 0x250 0x000 0x10 0x000 81#define MX25_PAD_A24__GPIO_2_10 0x038 0x250 0x000 0x15 0x000 |
| 82#define MX25_PAD_A24__SIM2_PD1 0x038 0x250 0x55c 0x16 0x000 |
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| 62#define MX25_PAD_A24__FEC_RX_CLK 0x038 0x250 0x514 0x17 0x000 63 64#define MX25_PAD_A25__A25 0x03c 0x254 0x000 0x10 0x000 65#define MX25_PAD_A25__GPIO_2_11 0x03c 0x254 0x000 0x15 0x000 66#define MX25_PAD_A25__FEC_CRS 0x03c 0x254 0x508 0x17 0x000 67 68#define MX25_PAD_EB0__EB0 0x040 0x258 0x000 0x10 0x000 69#define MX25_PAD_EB0__AUD4_TXD 0x040 0x258 0x464 0x14 0x000 --- 58 unchanged lines hidden (view full) --- 128#define MX25_PAD_NFWP_B__GPIO_3_30 0x080 0x000 0x000 0x15 0x000 129 130#define MX25_PAD_NFRB__NFRB 0x084 0x27c 0x000 0x10 0x000 131#define MX25_PAD_NFRB__GPIO_3_31 0x084 0x27c 0x000 0x15 0x000 132 133#define MX25_PAD_D15__D15 0x088 0x280 0x000 0x00 0x000 134#define MX25_PAD_D15__LD16 0x088 0x280 0x000 0x01 0x000 135#define MX25_PAD_D15__GPIO_4_5 0x088 0x280 0x000 0x05 0x000 | 83#define MX25_PAD_A24__FEC_RX_CLK 0x038 0x250 0x514 0x17 0x000 84 85#define MX25_PAD_A25__A25 0x03c 0x254 0x000 0x10 0x000 86#define MX25_PAD_A25__GPIO_2_11 0x03c 0x254 0x000 0x15 0x000 87#define MX25_PAD_A25__FEC_CRS 0x03c 0x254 0x508 0x17 0x000 88 89#define MX25_PAD_EB0__EB0 0x040 0x258 0x000 0x10 0x000 90#define MX25_PAD_EB0__AUD4_TXD 0x040 0x258 0x464 0x14 0x000 --- 58 unchanged lines hidden (view full) --- 149#define MX25_PAD_NFWP_B__GPIO_3_30 0x080 0x000 0x000 0x15 0x000 150 151#define MX25_PAD_NFRB__NFRB 0x084 0x27c 0x000 0x10 0x000 152#define MX25_PAD_NFRB__GPIO_3_31 0x084 0x27c 0x000 0x15 0x000 153 154#define MX25_PAD_D15__D15 0x088 0x280 0x000 0x00 0x000 155#define MX25_PAD_D15__LD16 0x088 0x280 0x000 0x01 0x000 156#define MX25_PAD_D15__GPIO_4_5 0x088 0x280 0x000 0x05 0x000 |
| 157#define MX25_PAD_D15__SDHC1_DAT7 0x088 0x280 0x4d8 0x06 0x000 |
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| 136 137#define MX25_PAD_D14__D14 0x08c 0x284 0x000 0x00 0x000 138#define MX25_PAD_D14__LD17 0x08c 0x284 0x000 0x01 0x000 139#define MX25_PAD_D14__GPIO_4_6 0x08c 0x284 0x000 0x05 0x000 | 158 159#define MX25_PAD_D14__D14 0x08c 0x284 0x000 0x00 0x000 160#define MX25_PAD_D14__LD17 0x08c 0x284 0x000 0x01 0x000 161#define MX25_PAD_D14__GPIO_4_6 0x08c 0x284 0x000 0x05 0x000 |
| 162#define MX25_PAD_D14__SDHC1_DAT6 0x08c 0x284 0x4d4 0x06 0x000 |
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| 140 141#define MX25_PAD_D13__D13 0x090 0x288 0x000 0x00 0x000 142#define MX25_PAD_D13__LD18 0x090 0x288 0x000 0x01 0x000 143#define MX25_PAD_D13__GPIO_4_7 0x090 0x288 0x000 0x05 0x000 | 163 164#define MX25_PAD_D13__D13 0x090 0x288 0x000 0x00 0x000 165#define MX25_PAD_D13__LD18 0x090 0x288 0x000 0x01 0x000 166#define MX25_PAD_D13__GPIO_4_7 0x090 0x288 0x000 0x05 0x000 |
| 167#define MX25_PAD_D13__SDHC1_DAT5 0x090 0x288 0x4d0 0x06 0x000 |
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| 144 145#define MX25_PAD_D12__D12 0x094 0x28c 0x000 0x00 0x000 146#define MX25_PAD_D12__GPIO_4_8 0x094 0x28c 0x000 0x05 0x000 | 168 169#define MX25_PAD_D12__D12 0x094 0x28c 0x000 0x00 0x000 170#define MX25_PAD_D12__GPIO_4_8 0x094 0x28c 0x000 0x05 0x000 |
| 171#define MX25_PAD_D12__SDHC1_DAT4 0x094 0x28c 0x4cc 0x06 0x000 |
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| 147 148#define MX25_PAD_D11__D11 0x098 0x290 0x000 0x00 0x000 149#define MX25_PAD_D11__GPIO_4_9 0x098 0x290 0x000 0x05 0x000 | 172 173#define MX25_PAD_D11__D11 0x098 0x290 0x000 0x00 0x000 174#define MX25_PAD_D11__GPIO_4_9 0x098 0x290 0x000 0x05 0x000 |
| 175#define MX25_PAD_D11__USBOTG_PWR 0x098 0x290 0x000 0x06 0x000 |
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| 150 151#define MX25_PAD_D10__D10 0x09c 0x294 0x000 0x00 0x000 152#define MX25_PAD_D10__GPIO_4_10 0x09c 0x294 0x000 0x05 0x000 153#define MX25_PAD_D10__USBOTG_OC 0x09c 0x294 0x57c 0x06 0x000 154 155#define MX25_PAD_D9__D9 0x0a0 0x298 0x000 0x00 0x000 156#define MX25_PAD_D9__GPIO_4_11 0x0a0 0x298 0x000 0x05 0x000 157#define MX25_PAD_D9__USBH2_PWR 0x0a0 0x298 0x000 0x06 0x000 --- 49 unchanged lines hidden (view full) --- 207#define MX25_PAD_LD6__LD6 0x0e0 0x2d8 0x000 0x10 0x000 208#define MX25_PAD_LD6__GPIO_1_20 0x0e0 0x2d8 0x000 0x15 0x000 209 210#define MX25_PAD_LD7__LD7 0x0e4 0x2dc 0x000 0x10 0x000 211#define MX25_PAD_LD7__GPIO_1_21 0x0e4 0x2dc 0x000 0x15 0x000 212 213#define MX25_PAD_LD8__LD8 0x0e8 0x2e0 0x000 0x10 0x000 214#define MX25_PAD_LD8__FEC_TX_ERR 0x0e8 0x2e0 0x000 0x15 0x000 | 176 177#define MX25_PAD_D10__D10 0x09c 0x294 0x000 0x00 0x000 178#define MX25_PAD_D10__GPIO_4_10 0x09c 0x294 0x000 0x05 0x000 179#define MX25_PAD_D10__USBOTG_OC 0x09c 0x294 0x57c 0x06 0x000 180 181#define MX25_PAD_D9__D9 0x0a0 0x298 0x000 0x00 0x000 182#define MX25_PAD_D9__GPIO_4_11 0x0a0 0x298 0x000 0x05 0x000 183#define MX25_PAD_D9__USBH2_PWR 0x0a0 0x298 0x000 0x06 0x000 --- 49 unchanged lines hidden (view full) --- 233#define MX25_PAD_LD6__LD6 0x0e0 0x2d8 0x000 0x10 0x000 234#define MX25_PAD_LD6__GPIO_1_20 0x0e0 0x2d8 0x000 0x15 0x000 235 236#define MX25_PAD_LD7__LD7 0x0e4 0x2dc 0x000 0x10 0x000 237#define MX25_PAD_LD7__GPIO_1_21 0x0e4 0x2dc 0x000 0x15 0x000 238 239#define MX25_PAD_LD8__LD8 0x0e8 0x2e0 0x000 0x10 0x000 240#define MX25_PAD_LD8__FEC_TX_ERR 0x0e8 0x2e0 0x000 0x15 0x000 |
| 241#define MX25_PAD_LD8__SDHC2_CMD 0x0e8 0x2e0 0x4e0 0x06 0x000 |
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| 215 216#define MX25_PAD_LD9__LD9 0x0ec 0x2e4 0x000 0x10 0x000 217#define MX25_PAD_LD9__FEC_COL 0x0ec 0x2e4 0x504 0x15 0x001 | 242 243#define MX25_PAD_LD9__LD9 0x0ec 0x2e4 0x000 0x10 0x000 244#define MX25_PAD_LD9__FEC_COL 0x0ec 0x2e4 0x504 0x15 0x001 |
| 245#define MX25_PAD_LD9__SDHC2_CLK 0x0ec 0x2e4 0x4dc 0x06 0x000 |
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| 218 219#define MX25_PAD_LD10__LD10 0x0f0 0x2e8 0x000 0x10 0x000 | 246 247#define MX25_PAD_LD10__LD10 0x0f0 0x2e8 0x000 0x10 0x000 |
| 220#define MX25_PAD_LD10__FEC_RX_ER 0x0f0 0x2e8 0x518 0x15 0x001 | 248#define MX25_PAD_LD10__FEC_RX_ERR 0x0f0 0x2e8 0x518 0x15 0x001 |
| 221 222#define MX25_PAD_LD11__LD11 0x0f4 0x2ec 0x000 0x10 0x000 223#define MX25_PAD_LD11__FEC_RDATA2 0x0f4 0x2ec 0x50c 0x15 0x001 | 249 250#define MX25_PAD_LD11__LD11 0x0f4 0x2ec 0x000 0x10 0x000 251#define MX25_PAD_LD11__FEC_RDATA2 0x0f4 0x2ec 0x50c 0x15 0x001 |
| 252#define MX25_PAD_LD11__SDHC2_DAT1 0x0f4 0x2ec 0x4e8 0x06 0x000 |
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| 224 225#define MX25_PAD_LD12__LD12 0x0f8 0x2f0 0x000 0x10 0x000 | 253 254#define MX25_PAD_LD12__LD12 0x0f8 0x2f0 0x000 0x10 0x000 |
| 255#define MX25_PAD_LD12__CSPI2_MOSI 0x0f8 0x2f0 0x4a0 0x02 0x000 |
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| 226#define MX25_PAD_LD12__FEC_RDATA3 0x0f8 0x2f0 0x510 0x15 0x001 227 228#define MX25_PAD_LD13__LD13 0x0fc 0x2f4 0x000 0x10 0x000 | 256#define MX25_PAD_LD12__FEC_RDATA3 0x0f8 0x2f0 0x510 0x15 0x001 257 258#define MX25_PAD_LD13__LD13 0x0fc 0x2f4 0x000 0x10 0x000 |
| 259#define MX25_PAD_LD13__CSPI2_MISO 0x0fc 0x2f4 0x49c 0x02 0x000 |
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| 229#define MX25_PAD_LD13__FEC_TDATA2 0x0fc 0x2f4 0x000 0x15 0x000 230 231#define MX25_PAD_LD14__LD14 0x100 0x2f8 0x000 0x10 0x000 | 260#define MX25_PAD_LD13__FEC_TDATA2 0x0fc 0x2f4 0x000 0x15 0x000 261 262#define MX25_PAD_LD14__LD14 0x100 0x2f8 0x000 0x10 0x000 |
| 263#define MX25_PAD_LD14__CSPI2_SCLK 0x100 0x2f8 0x494 0x02 0x000 |
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| 232#define MX25_PAD_LD14__FEC_TDATA3 0x100 0x2f8 0x000 0x15 0x000 233 234#define MX25_PAD_LD15__LD15 0x104 0x2fc 0x000 0x10 0x000 | 264#define MX25_PAD_LD14__FEC_TDATA3 0x100 0x2f8 0x000 0x15 0x000 265 266#define MX25_PAD_LD15__LD15 0x104 0x2fc 0x000 0x10 0x000 |
| 267#define MX25_PAD_LD15__CSPI2_RDY 0x104 0x2fc 0x498 0x02 0x000 |
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| 235#define MX25_PAD_LD15__FEC_RX_CLK 0x104 0x2fc 0x514 0x15 0x001 236 237#define MX25_PAD_HSYNC__HSYNC 0x108 0x300 0x000 0x10 0x000 238#define MX25_PAD_HSYNC__GPIO_1_22 0x108 0x300 0x000 0x15 0x000 239 240#define MX25_PAD_VSYNC__VSYNC 0x10c 0x304 0x000 0x10 0x000 241#define MX25_PAD_VSYNC__GPIO_1_23 0x10c 0x304 0x000 0x15 0x000 242 243#define MX25_PAD_LSCLK__LSCLK 0x110 0x308 0x000 0x10 0x000 244#define MX25_PAD_LSCLK__GPIO_1_24 0x110 0x308 0x000 0x15 0x000 245 246#define MX25_PAD_OE_ACD__OE_ACD 0x114 0x30c 0x000 0x10 0x000 | 268#define MX25_PAD_LD15__FEC_RX_CLK 0x104 0x2fc 0x514 0x15 0x001 269 270#define MX25_PAD_HSYNC__HSYNC 0x108 0x300 0x000 0x10 0x000 271#define MX25_PAD_HSYNC__GPIO_1_22 0x108 0x300 0x000 0x15 0x000 272 273#define MX25_PAD_VSYNC__VSYNC 0x10c 0x304 0x000 0x10 0x000 274#define MX25_PAD_VSYNC__GPIO_1_23 0x10c 0x304 0x000 0x15 0x000 275 276#define MX25_PAD_LSCLK__LSCLK 0x110 0x308 0x000 0x10 0x000 277#define MX25_PAD_LSCLK__GPIO_1_24 0x110 0x308 0x000 0x15 0x000 278 279#define MX25_PAD_OE_ACD__OE_ACD 0x114 0x30c 0x000 0x10 0x000 |
| 280#define MX25_PAD_OE_ACD__CSPI2_SS0 0x114 0x30c 0x4a4 0x02 0x000 |
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| 247#define MX25_PAD_OE_ACD__GPIO_1_25 0x114 0x30c 0x000 0x15 0x000 248 249#define MX25_PAD_CONTRAST__CONTRAST 0x118 0x310 0x000 0x10 0x000 250#define MX25_PAD_CONTRAST__CC4 0x118 0x310 0x000 0x11 0x000 251#define MX25_PAD_CONTRAST__PWM4_PWMO 0x118 0x310 0x000 0x14 0x000 252#define MX25_PAD_CONTRAST__FEC_CRS 0x118 0x310 0x508 0x15 0x001 | 281#define MX25_PAD_OE_ACD__GPIO_1_25 0x114 0x30c 0x000 0x15 0x000 282 283#define MX25_PAD_CONTRAST__CONTRAST 0x118 0x310 0x000 0x10 0x000 284#define MX25_PAD_CONTRAST__CC4 0x118 0x310 0x000 0x11 0x000 285#define MX25_PAD_CONTRAST__PWM4_PWMO 0x118 0x310 0x000 0x14 0x000 286#define MX25_PAD_CONTRAST__FEC_CRS 0x118 0x310 0x508 0x15 0x001 |
| 287#define MX25_PAD_CONTRAST__USBH2_PWR 0x118 0x310 0x000 0x16 0x000 |
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| 253 254#define MX25_PAD_PWM__PWM 0x11c 0x314 0x000 0x10 0x000 255#define MX25_PAD_PWM__GPIO_1_26 0x11c 0x314 0x000 0x15 0x000 256#define MX25_PAD_PWM__USBH2_OC 0x11c 0x314 0x580 0x16 0x001 257 258#define MX25_PAD_CSI_D2__CSI_D2 0x120 0x318 0x000 0x10 0x000 259#define MX25_PAD_CSI_D2__UART5_RXD_MUX 0x120 0x318 0x578 0x11 0x001 | 288 289#define MX25_PAD_PWM__PWM 0x11c 0x314 0x000 0x10 0x000 290#define MX25_PAD_PWM__GPIO_1_26 0x11c 0x314 0x000 0x15 0x000 291#define MX25_PAD_PWM__USBH2_OC 0x11c 0x314 0x580 0x16 0x001 292 293#define MX25_PAD_CSI_D2__CSI_D2 0x120 0x318 0x000 0x10 0x000 294#define MX25_PAD_CSI_D2__UART5_RXD_MUX 0x120 0x318 0x578 0x11 0x001 |
| 295#define MX25_PAD_CSI_D2__SIM1_CLK0 0x120 0x318 0x000 0x04 0x000 |
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| 260#define MX25_PAD_CSI_D2__GPIO_1_27 0x120 0x318 0x000 0x15 0x000 261#define MX25_PAD_CSI_D2__CSPI3_MOSI 0x120 0x318 0x000 0x17 0x000 262 263#define MX25_PAD_CSI_D3__CSI_D3 0x124 0x31c 0x000 0x10 0x000 264#define MX25_PAD_CSI_D3__UART5_TXD_MUX 0x124 0x31c 0x000 0x11 0x000 | 296#define MX25_PAD_CSI_D2__GPIO_1_27 0x120 0x318 0x000 0x15 0x000 297#define MX25_PAD_CSI_D2__CSPI3_MOSI 0x120 0x318 0x000 0x17 0x000 298 299#define MX25_PAD_CSI_D3__CSI_D3 0x124 0x31c 0x000 0x10 0x000 300#define MX25_PAD_CSI_D3__UART5_TXD_MUX 0x124 0x31c 0x000 0x11 0x000 |
| 301#define MX25_PAD_CSI_D3__SIM1_RST0 0x124 0x31c 0x000 0x04 0x000 |
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| 265#define MX25_PAD_CSI_D3__GPIO_1_28 0x124 0x31c 0x000 0x15 0x000 266#define MX25_PAD_CSI_D3__CSPI3_MISO 0x124 0x31c 0x4b4 0x17 0x001 267 268#define MX25_PAD_CSI_D4__CSI_D4 0x128 0x320 0x000 0x10 0x000 269#define MX25_PAD_CSI_D4__UART5_RTS 0x128 0x320 0x574 0x11 0x001 | 302#define MX25_PAD_CSI_D3__GPIO_1_28 0x124 0x31c 0x000 0x15 0x000 303#define MX25_PAD_CSI_D3__CSPI3_MISO 0x124 0x31c 0x4b4 0x17 0x001 304 305#define MX25_PAD_CSI_D4__CSI_D4 0x128 0x320 0x000 0x10 0x000 306#define MX25_PAD_CSI_D4__UART5_RTS 0x128 0x320 0x574 0x11 0x001 |
| 307#define MX25_PAD_CSI_D4__SIM1_VEN0 0x128 0x320 0x000 0x04 0x000 |
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| 270#define MX25_PAD_CSI_D4__GPIO_1_29 0x128 0x320 0x000 0x15 0x000 271#define MX25_PAD_CSI_D4__CSPI3_SCLK 0x128 0x320 0x000 0x17 0x000 272 273#define MX25_PAD_CSI_D5__CSI_D5 0x12c 0x324 0x000 0x10 0x000 | 308#define MX25_PAD_CSI_D4__GPIO_1_29 0x128 0x320 0x000 0x15 0x000 309#define MX25_PAD_CSI_D4__CSPI3_SCLK 0x128 0x320 0x000 0x17 0x000 310 311#define MX25_PAD_CSI_D5__CSI_D5 0x12c 0x324 0x000 0x10 0x000 |
| 274#define MX25_PAD_CSI_D5__UART5_CTS 0x12c 0x324 0x000 0x11 0x001 | 312#define MX25_PAD_CSI_D5__UART5_CTS 0x12c 0x324 0x000 0x11 0x000 313#define MX25_PAD_CSI_D5__SIM1_TX0 0x12c 0x324 0x000 0x04 0x000 |
| 275#define MX25_PAD_CSI_D5__GPIO_1_30 0x12c 0x324 0x000 0x15 0x000 276#define MX25_PAD_CSI_D5__CSPI3_RDY 0x12c 0x324 0x000 0x17 0x000 277 278#define MX25_PAD_CSI_D6__CSI_D6 0x130 0x328 0x000 0x10 0x000 279#define MX25_PAD_CSI_D6__SDHC2_CMD 0x130 0x328 0x4e0 0x12 0x001 | 314#define MX25_PAD_CSI_D5__GPIO_1_30 0x12c 0x324 0x000 0x15 0x000 315#define MX25_PAD_CSI_D5__CSPI3_RDY 0x12c 0x324 0x000 0x17 0x000 316 317#define MX25_PAD_CSI_D6__CSI_D6 0x130 0x328 0x000 0x10 0x000 318#define MX25_PAD_CSI_D6__SDHC2_CMD 0x130 0x328 0x4e0 0x12 0x001 |
| 319#define MX25_PAD_CSI_D6__SIM1_PD0 0x130 0x328 0x000 0x04 0x000 |
|
| 280#define MX25_PAD_CSI_D6__GPIO_1_31 0x130 0x328 0x000 0x15 0x000 281 282#define MX25_PAD_CSI_D7__CSI_D7 0x134 0x32c 0x000 0x10 0x000 283#define MX25_PAD_CSI_D7__SDHC2_DAT_CLK 0x134 0x32C 0x4dc 0x12 0x001 284#define MX25_PAD_CSI_D7__GPIO_1_6 0x134 0x32c 0x000 0x15 0x000 285 286#define MX25_PAD_CSI_D8__CSI_D8 0x138 0x330 0x000 0x10 0x000 | 320#define MX25_PAD_CSI_D6__GPIO_1_31 0x130 0x328 0x000 0x15 0x000 321 322#define MX25_PAD_CSI_D7__CSI_D7 0x134 0x32c 0x000 0x10 0x000 323#define MX25_PAD_CSI_D7__SDHC2_DAT_CLK 0x134 0x32C 0x4dc 0x12 0x001 324#define MX25_PAD_CSI_D7__GPIO_1_6 0x134 0x32c 0x000 0x15 0x000 325 326#define MX25_PAD_CSI_D8__CSI_D8 0x138 0x330 0x000 0x10 0x000 |
| 287#define MX25_PAD_CSI_D8__AUD6_RXC 0x138 0x330 0x000 0x12 0x001 | 327#define MX25_PAD_CSI_D8__AUD6_RXC 0x138 0x330 0x000 0x12 0x000 |
| 288#define MX25_PAD_CSI_D8__GPIO_1_7 0x138 0x330 0x000 0x15 0x000 289#define MX25_PAD_CSI_D8__CSPI3_SS2 0x138 0x330 0x4c4 0x17 0x000 290 291#define MX25_PAD_CSI_D9__CSI_D9 0x13c 0x334 0x000 0x10 0x000 | 328#define MX25_PAD_CSI_D8__GPIO_1_7 0x138 0x330 0x000 0x15 0x000 329#define MX25_PAD_CSI_D8__CSPI3_SS2 0x138 0x330 0x4c4 0x17 0x000 330 331#define MX25_PAD_CSI_D9__CSI_D9 0x13c 0x334 0x000 0x10 0x000 |
| 292#define MX25_PAD_CSI_D9__AUD6_RXFS 0x13c 0x334 0x000 0x12 0x001 | 332#define MX25_PAD_CSI_D9__AUD6_RXFS 0x13c 0x334 0x000 0x12 0x000 |
| 293#define MX25_PAD_CSI_D9__GPIO_4_21 0x13c 0x334 0x000 0x15 0x000 294#define MX25_PAD_CSI_D9__CSPI3_SS3 0x13c 0x334 0x4c8 0x17 0x000 295 296#define MX25_PAD_CSI_MCLK__CSI_MCLK 0x140 0x338 0x000 0x10 0x000 | 333#define MX25_PAD_CSI_D9__GPIO_4_21 0x13c 0x334 0x000 0x15 0x000 334#define MX25_PAD_CSI_D9__CSPI3_SS3 0x13c 0x334 0x4c8 0x17 0x000 335 336#define MX25_PAD_CSI_MCLK__CSI_MCLK 0x140 0x338 0x000 0x10 0x000 |
| 297#define MX25_PAD_CSI_MCLK__AUD6_TXD 0x140 0x338 0x000 0x11 0x001 | 337#define MX25_PAD_CSI_MCLK__AUD6_TXD 0x140 0x338 0x000 0x11 0x000 |
| 298#define MX25_PAD_CSI_MCLK__SDHC2_DAT0 0x140 0x338 0x4e4 0x12 0x001 299#define MX25_PAD_CSI_MCLK__GPIO_1_8 0x140 0x338 0x000 0x15 0x000 300 301#define MX25_PAD_CSI_VSYNC__CSI_VSYNC 0x144 0x33c 0x000 0x10 0x000 | 338#define MX25_PAD_CSI_MCLK__SDHC2_DAT0 0x140 0x338 0x4e4 0x12 0x001 339#define MX25_PAD_CSI_MCLK__GPIO_1_8 0x140 0x338 0x000 0x15 0x000 340 341#define MX25_PAD_CSI_VSYNC__CSI_VSYNC 0x144 0x33c 0x000 0x10 0x000 |
| 302#define MX25_PAD_CSI_VSYNC__AUD6_RXD 0x144 0x33c 0x000 0x11 0x001 | 342#define MX25_PAD_CSI_VSYNC__AUD6_RXD 0x144 0x33c 0x000 0x11 0x000 |
| 303#define MX25_PAD_CSI_VSYNC__SDHC2_DAT1 0x144 0x33c 0x4e8 0x12 0x001 304#define MX25_PAD_CSI_VSYNC__GPIO_1_9 0x144 0x33c 0x000 0x15 0x000 305 306#define MX25_PAD_CSI_HSYNC__CSI_HSYNC 0x148 0x340 0x000 0x10 0x000 | 343#define MX25_PAD_CSI_VSYNC__SDHC2_DAT1 0x144 0x33c 0x4e8 0x12 0x001 344#define MX25_PAD_CSI_VSYNC__GPIO_1_9 0x144 0x33c 0x000 0x15 0x000 345 346#define MX25_PAD_CSI_HSYNC__CSI_HSYNC 0x148 0x340 0x000 0x10 0x000 |
| 307#define MX25_PAD_CSI_HSYNC__AUD6_TXC 0x148 0x340 0x000 0x11 0x001 | 347#define MX25_PAD_CSI_HSYNC__AUD6_TXC 0x148 0x340 0x000 0x11 0x000 |
| 308#define MX25_PAD_CSI_HSYNC__SDHC2_DAT2 0x148 0x340 0x4ec 0x12 0x001 309#define MX25_PAD_CSI_HSYNC__GPIO_1_10 0x148 0x340 0x000 0x15 0x000 310 311#define MX25_PAD_CSI_PIXCLK__CSI_PIXCLK 0x14c 0x344 0x000 0x10 0x000 | 348#define MX25_PAD_CSI_HSYNC__SDHC2_DAT2 0x148 0x340 0x4ec 0x12 0x001 349#define MX25_PAD_CSI_HSYNC__GPIO_1_10 0x148 0x340 0x000 0x15 0x000 350 351#define MX25_PAD_CSI_PIXCLK__CSI_PIXCLK 0x14c 0x344 0x000 0x10 0x000 |
| 312#define MX25_PAD_CSI_PIXCLK__AUD6_TXFS 0x14c 0x344 0x000 0x11 0x001 | 352#define MX25_PAD_CSI_PIXCLK__AUD6_TXFS 0x14c 0x344 0x000 0x11 0x000 |
| 313#define MX25_PAD_CSI_PIXCLK__SDHC2_DAT3 0x14c 0x344 0x4f0 0x12 0x001 314#define MX25_PAD_CSI_PIXCLK__GPIO_1_11 0x14c 0x344 0x000 0x15 0x000 315 316#define MX25_PAD_I2C1_CLK__I2C1_CLK 0x150 0x348 0x000 0x10 0x000 317#define MX25_PAD_I2C1_CLK__GPIO_1_12 0x150 0x348 0x000 0x15 0x000 318 319#define MX25_PAD_I2C1_DAT__I2C1_DAT 0x154 0x34c 0x000 0x10 0x000 320#define MX25_PAD_I2C1_DAT__GPIO_1_13 0x154 0x34c 0x000 0x15 0x000 --- 43 unchanged lines hidden (view full) --- 364#define MX25_PAD_UART2_TXD__UART2_TXD 0x184 0x37c 0x000 0x10 0x000 365#define MX25_PAD_UART2_TXD__GPIO_4_27 0x184 0x37c 0x000 0x15 0x000 366 367#define MX25_PAD_UART2_RTS__UART2_RTS 0x188 0x380 0x000 0x10 0x000 368#define MX25_PAD_UART2_RTS__FEC_COL 0x188 0x380 0x504 0x12 0x002 369#define MX25_PAD_UART2_RTS__CC1 0x188 0x380 0x000 0x13 0x000 370#define MX25_PAD_UART2_RTS__GPIO_4_28 0x188 0x380 0x000 0x15 0x000 371 | 353#define MX25_PAD_CSI_PIXCLK__SDHC2_DAT3 0x14c 0x344 0x4f0 0x12 0x001 354#define MX25_PAD_CSI_PIXCLK__GPIO_1_11 0x14c 0x344 0x000 0x15 0x000 355 356#define MX25_PAD_I2C1_CLK__I2C1_CLK 0x150 0x348 0x000 0x10 0x000 357#define MX25_PAD_I2C1_CLK__GPIO_1_12 0x150 0x348 0x000 0x15 0x000 358 359#define MX25_PAD_I2C1_DAT__I2C1_DAT 0x154 0x34c 0x000 0x10 0x000 360#define MX25_PAD_I2C1_DAT__GPIO_1_13 0x154 0x34c 0x000 0x15 0x000 --- 43 unchanged lines hidden (view full) --- 404#define MX25_PAD_UART2_TXD__UART2_TXD 0x184 0x37c 0x000 0x10 0x000 405#define MX25_PAD_UART2_TXD__GPIO_4_27 0x184 0x37c 0x000 0x15 0x000 406 407#define MX25_PAD_UART2_RTS__UART2_RTS 0x188 0x380 0x000 0x10 0x000 408#define MX25_PAD_UART2_RTS__FEC_COL 0x188 0x380 0x504 0x12 0x002 409#define MX25_PAD_UART2_RTS__CC1 0x188 0x380 0x000 0x13 0x000 410#define MX25_PAD_UART2_RTS__GPIO_4_28 0x188 0x380 0x000 0x15 0x000 411 |
| 372#define MX25_PAD_UART2_CTS__FEC_RX_ER 0x18c 0x384 0x518 0x12 0x002 | |
| 373#define MX25_PAD_UART2_CTS__UART2_CTS 0x18c 0x384 0x000 0x10 0x000 | 412#define MX25_PAD_UART2_CTS__UART2_CTS 0x18c 0x384 0x000 0x10 0x000 |
| 413#define MX25_PAD_UART2_CTS__FEC_RX_ERR 0x18c 0x384 0x518 0x12 0x002 |
|
| 374#define MX25_PAD_UART2_CTS__GPIO_4_29 0x18c 0x384 0x000 0x15 0x000 375 376#define MX25_PAD_SD1_CMD__SD1_CMD 0x190 0x388 0x000 0x10 0x000 377#define MX25_PAD_SD1_CMD__CSPI2_MOSI 0x190 0x388 0x4a0 0x11 0x001 378#define MX25_PAD_SD1_CMD__FEC_RDATA2 0x190 0x388 0x50c 0x12 0x002 379#define MX25_PAD_SD1_CMD__GPIO_2_23 0x190 0x388 0x000 0x15 0x000 380 381#define MX25_PAD_SD1_CLK__SD1_CLK 0x194 0x38c 0x000 0x10 0x000 --- 5 unchanged lines hidden (view full) --- 387#define MX25_PAD_SD1_DATA0__CSPI2_SCLK 0x198 0x390 0x494 0x11 0x001 388#define MX25_PAD_SD1_DATA0__GPIO_2_25 0x198 0x390 0x000 0x15 0x000 389 390#define MX25_PAD_SD1_DATA1__SD1_DATA1 0x19c 0x394 0x000 0x10 0x000 391#define MX25_PAD_SD1_DATA1__AUD7_RXD 0x19c 0x394 0x478 0x13 0x000 392#define MX25_PAD_SD1_DATA1__GPIO_2_26 0x19c 0x394 0x000 0x15 0x000 393 394#define MX25_PAD_SD1_DATA2__SD1_DATA2 0x1a0 0x398 0x000 0x10 0x000 | 414#define MX25_PAD_UART2_CTS__GPIO_4_29 0x18c 0x384 0x000 0x15 0x000 415 416#define MX25_PAD_SD1_CMD__SD1_CMD 0x190 0x388 0x000 0x10 0x000 417#define MX25_PAD_SD1_CMD__CSPI2_MOSI 0x190 0x388 0x4a0 0x11 0x001 418#define MX25_PAD_SD1_CMD__FEC_RDATA2 0x190 0x388 0x50c 0x12 0x002 419#define MX25_PAD_SD1_CMD__GPIO_2_23 0x190 0x388 0x000 0x15 0x000 420 421#define MX25_PAD_SD1_CLK__SD1_CLK 0x194 0x38c 0x000 0x10 0x000 --- 5 unchanged lines hidden (view full) --- 427#define MX25_PAD_SD1_DATA0__CSPI2_SCLK 0x198 0x390 0x494 0x11 0x001 428#define MX25_PAD_SD1_DATA0__GPIO_2_25 0x198 0x390 0x000 0x15 0x000 429 430#define MX25_PAD_SD1_DATA1__SD1_DATA1 0x19c 0x394 0x000 0x10 0x000 431#define MX25_PAD_SD1_DATA1__AUD7_RXD 0x19c 0x394 0x478 0x13 0x000 432#define MX25_PAD_SD1_DATA1__GPIO_2_26 0x19c 0x394 0x000 0x15 0x000 433 434#define MX25_PAD_SD1_DATA2__SD1_DATA2 0x1a0 0x398 0x000 0x10 0x000 |
| 395#define MX25_PAD_SD1_DATA2__FEC_RX_CLK 0x1a0 0x398 0x514 0x15 0x002 | 435#define MX25_PAD_SD1_DATA2__FEC_RX_CLK 0x1a0 0x398 0x514 0x12 0x002 |
| 396#define MX25_PAD_SD1_DATA2__GPIO_2_27 0x1a0 0x398 0x000 0x15 0x000 397 398#define MX25_PAD_SD1_DATA3__SD1_DATA3 0x1a4 0x39c 0x000 0x10 0x000 | 436#define MX25_PAD_SD1_DATA2__GPIO_2_27 0x1a0 0x398 0x000 0x15 0x000 437 438#define MX25_PAD_SD1_DATA3__SD1_DATA3 0x1a4 0x39c 0x000 0x10 0x000 |
| 399#define MX25_PAD_SD1_DATA3__FEC_CRS 0x1a4 0x39c 0x508 0x10 0x002 | 439#define MX25_PAD_SD1_DATA3__FEC_CRS 0x1a4 0x39c 0x508 0x12 0x002 |
| 400#define MX25_PAD_SD1_DATA3__GPIO_2_28 0x1a4 0x39c 0x000 0x15 0x000 401 402#define MX25_PAD_KPP_ROW0__KPP_ROW0 0x1a8 0x3a0 0x000 0x10 0x000 | 440#define MX25_PAD_SD1_DATA3__GPIO_2_28 0x1a4 0x39c 0x000 0x15 0x000 441 442#define MX25_PAD_KPP_ROW0__KPP_ROW0 0x1a8 0x3a0 0x000 0x10 0x000 |
| 443#define MX25_PAD_KPP_ROW0__UART1_DTR 0x1a8 0x3a0 0x000 0x14 0x000 |
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| 403#define MX25_PAD_KPP_ROW0__GPIO_2_29 0x1a8 0x3a0 0x000 0x15 0x000 404 405#define MX25_PAD_KPP_ROW1__KPP_ROW1 0x1ac 0x3a4 0x000 0x10 0x000 406#define MX25_PAD_KPP_ROW1__GPIO_2_30 0x1ac 0x3a4 0x000 0x15 0x000 407 408#define MX25_PAD_KPP_ROW2__KPP_ROW2 0x1b0 0x3a8 0x000 0x10 0x000 409#define MX25_PAD_KPP_ROW2__CSI_D0 0x1b0 0x3a8 0x488 0x13 0x002 | 444#define MX25_PAD_KPP_ROW0__GPIO_2_29 0x1a8 0x3a0 0x000 0x15 0x000 445 446#define MX25_PAD_KPP_ROW1__KPP_ROW1 0x1ac 0x3a4 0x000 0x10 0x000 447#define MX25_PAD_KPP_ROW1__GPIO_2_30 0x1ac 0x3a4 0x000 0x15 0x000 448 449#define MX25_PAD_KPP_ROW2__KPP_ROW2 0x1b0 0x3a8 0x000 0x10 0x000 450#define MX25_PAD_KPP_ROW2__CSI_D0 0x1b0 0x3a8 0x488 0x13 0x002 |
| 451#define MX25_PAD_KPP_ROW2__UART1_DCD 0x1b0 0x3a8 0x000 0x14 0x000 |
|
| 410#define MX25_PAD_KPP_ROW2__GPIO_2_31 0x1b0 0x3a8 0x000 0x15 0x000 411 412#define MX25_PAD_KPP_ROW3__KPP_ROW3 0x1b4 0x3ac 0x000 0x10 0x000 | 452#define MX25_PAD_KPP_ROW2__GPIO_2_31 0x1b0 0x3a8 0x000 0x15 0x000 453 454#define MX25_PAD_KPP_ROW3__KPP_ROW3 0x1b4 0x3ac 0x000 0x10 0x000 |
| 413#define MX25_PAD_KPP_ROW3__CSI_LD1 0x1b4 0x3ac 0x48c 0x13 0x002 | 455#define MX25_PAD_KPP_ROW3__CSI_D1 0x1b4 0x3ac 0x48c 0x13 0x002 |
| 414#define MX25_PAD_KPP_ROW3__GPIO_3_0 0x1b4 0x3ac 0x000 0x15 0x000 415 416#define MX25_PAD_KPP_COL0__KPP_COL0 0x1b8 0x3b0 0x000 0x10 0x000 417#define MX25_PAD_KPP_COL0__UART4_RXD_MUX 0x1b8 0x3b0 0x570 0x11 0x001 418#define MX25_PAD_KPP_COL0__AUD5_TXD 0x1b8 0x3b0 0x000 0x12 0x000 419#define MX25_PAD_KPP_COL0__GPIO_3_1 0x1b8 0x3b0 0x000 0x15 0x000 420 421#define MX25_PAD_KPP_COL1__KPP_COL1 0x1bc 0x3b4 0x000 0x10 0x000 --- 28 unchanged lines hidden (view full) --- 450 451#define MX25_PAD_FEC_TX_EN__FEC_TX_EN 0x1d8 0x3d0 0x000 0x10 0x000 452#define MX25_PAD_FEC_TX_EN__GPIO_3_9 0x1d8 0x3d0 0x000 0x15 0x000 453 454#define MX25_PAD_FEC_RDATA0__FEC_RDATA0 0x1dc 0x3d4 0x000 0x10 0x000 455#define MX25_PAD_FEC_RDATA0__GPIO_3_10 0x1dc 0x3d4 0x000 0x15 0x000 456 457#define MX25_PAD_FEC_RDATA1__FEC_RDATA1 0x1e0 0x3d8 0x000 0x10 0x000 | 456#define MX25_PAD_KPP_ROW3__GPIO_3_0 0x1b4 0x3ac 0x000 0x15 0x000 457 458#define MX25_PAD_KPP_COL0__KPP_COL0 0x1b8 0x3b0 0x000 0x10 0x000 459#define MX25_PAD_KPP_COL0__UART4_RXD_MUX 0x1b8 0x3b0 0x570 0x11 0x001 460#define MX25_PAD_KPP_COL0__AUD5_TXD 0x1b8 0x3b0 0x000 0x12 0x000 461#define MX25_PAD_KPP_COL0__GPIO_3_1 0x1b8 0x3b0 0x000 0x15 0x000 462 463#define MX25_PAD_KPP_COL1__KPP_COL1 0x1bc 0x3b4 0x000 0x10 0x000 --- 28 unchanged lines hidden (view full) --- 492 493#define MX25_PAD_FEC_TX_EN__FEC_TX_EN 0x1d8 0x3d0 0x000 0x10 0x000 494#define MX25_PAD_FEC_TX_EN__GPIO_3_9 0x1d8 0x3d0 0x000 0x15 0x000 495 496#define MX25_PAD_FEC_RDATA0__FEC_RDATA0 0x1dc 0x3d4 0x000 0x10 0x000 497#define MX25_PAD_FEC_RDATA0__GPIO_3_10 0x1dc 0x3d4 0x000 0x15 0x000 498 499#define MX25_PAD_FEC_RDATA1__FEC_RDATA1 0x1e0 0x3d8 0x000 0x10 0x000 |
| 500/* 501 * According to the i.MX25 Reference manual (IMX25RM, Rev. 2, 502 * 01/2011) this is CAN1_TX but that's wrong. 503 */ 504#define MX25_PAD_FEC_RDATA1__CAN2_TX 0x1e0 0x3d8 0x000 0x14 0x000 |
|
| 458#define MX25_PAD_FEC_RDATA1__GPIO_3_11 0x1e0 0x3d8 0x000 0x15 0x000 459 460#define MX25_PAD_FEC_RX_DV__FEC_RX_DV 0x1e4 0x3dc 0x000 0x10 0x000 | 505#define MX25_PAD_FEC_RDATA1__GPIO_3_11 0x1e0 0x3d8 0x000 0x15 0x000 506 507#define MX25_PAD_FEC_RX_DV__FEC_RX_DV 0x1e4 0x3dc 0x000 0x10 0x000 |
| 508/* 509 * According to the i.MX25 Reference manual (IMX25RM, Rev. 2, 510 * 01/2011) this is CAN1_RX but that's wrong. 511 */ |
|
| 461#define MX25_PAD_FEC_RX_DV__CAN2_RX 0x1e4 0x3dc 0x484 0x14 0x000 462#define MX25_PAD_FEC_RX_DV__GPIO_3_12 0x1e4 0x3dc 0x000 0x15 0x000 463 464#define MX25_PAD_FEC_TX_CLK__FEC_TX_CLK 0x1e8 0x3e0 0x000 0x10 0x000 465#define MX25_PAD_FEC_TX_CLK__GPIO_3_13 0x1e8 0x3e0 0x000 0x15 0x000 466 467#define MX25_PAD_RTCK__RTCK 0x1ec 0x3e4 0x000 0x10 0x000 468#define MX25_PAD_RTCK__OWIRE 0x1ec 0x3e4 0x000 0x11 0x000 469#define MX25_PAD_RTCK__GPIO_3_14 0x1ec 0x3e4 0x000 0x15 0x000 470 471#define MX25_PAD_DE_B__DE_B 0x1f0 0x3ec 0x000 0x10 0x000 472#define MX25_PAD_DE_B__GPIO_2_20 0x1f0 0x3ec 0x000 0x15 0x000 473 | 512#define MX25_PAD_FEC_RX_DV__CAN2_RX 0x1e4 0x3dc 0x484 0x14 0x000 513#define MX25_PAD_FEC_RX_DV__GPIO_3_12 0x1e4 0x3dc 0x000 0x15 0x000 514 515#define MX25_PAD_FEC_TX_CLK__FEC_TX_CLK 0x1e8 0x3e0 0x000 0x10 0x000 516#define MX25_PAD_FEC_TX_CLK__GPIO_3_13 0x1e8 0x3e0 0x000 0x15 0x000 517 518#define MX25_PAD_RTCK__RTCK 0x1ec 0x3e4 0x000 0x10 0x000 519#define MX25_PAD_RTCK__OWIRE 0x1ec 0x3e4 0x000 0x11 0x000 520#define MX25_PAD_RTCK__GPIO_3_14 0x1ec 0x3e4 0x000 0x15 0x000 521 522#define MX25_PAD_DE_B__DE_B 0x1f0 0x3ec 0x000 0x10 0x000 523#define MX25_PAD_DE_B__GPIO_2_20 0x1f0 0x3ec 0x000 0x15 0x000 524 |
| 474#define MX25_PAD_TDO__TDO 0x000 0x3e8 0x000 0x00 0x000 475 | |
| 476#define MX25_PAD_GPIO_A__GPIO_A 0x1f4 0x3f0 0x000 0x10 0x000 477#define MX25_PAD_GPIO_A__CAN1_TX 0x1f4 0x3f0 0x000 0x16 0x000 478#define MX25_PAD_GPIO_A__USBOTG_PWR 0x1f4 0x3f0 0x000 0x12 0x000 479 480#define MX25_PAD_GPIO_B__GPIO_B 0x1f8 0x3f4 0x000 0x10 0x000 | 525#define MX25_PAD_GPIO_A__GPIO_A 0x1f4 0x3f0 0x000 0x10 0x000 526#define MX25_PAD_GPIO_A__CAN1_TX 0x1f4 0x3f0 0x000 0x16 0x000 527#define MX25_PAD_GPIO_A__USBOTG_PWR 0x1f4 0x3f0 0x000 0x12 0x000 528 529#define MX25_PAD_GPIO_B__GPIO_B 0x1f8 0x3f4 0x000 0x10 0x000 |
| 481#define MX25_PAD_GPIO_B__CAN1_RX 0x1f8 0x3f4 0x480 0x16 0x001 | |
| 482#define MX25_PAD_GPIO_B__USBOTG_OC 0x1f8 0x3f4 0x57c 0x12 0x001 | 530#define MX25_PAD_GPIO_B__USBOTG_OC 0x1f8 0x3f4 0x57c 0x12 0x001 |
| 531#define MX25_PAD_GPIO_B__CAN1_RX 0x1f8 0x3f4 0x480 0x16 0x001 |
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| 483 484#define MX25_PAD_GPIO_C__GPIO_C 0x1fc 0x3f8 0x000 0x10 0x000 | 532 533#define MX25_PAD_GPIO_C__GPIO_C 0x1fc 0x3f8 0x000 0x10 0x000 |
| 534#define MX25_PAD_GPIO_C__PWM4_PWMO 0x1fc 0x3f8 0x000 0x11 0x000 535#define MX25_PAD_GPIO_C__I2C2_SCL 0x1fc 0x3f8 0x51c 0x12 0x001 536#define MX25_PAD_GPIO_C__KPP_COL4 0x1fc 0x3f8 0x52c 0x13 0x001 |
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| 485#define MX25_PAD_GPIO_C__CAN2_TX 0x1fc 0x3f8 0x000 0x16 0x000 486 487#define MX25_PAD_GPIO_D__GPIO_D 0x200 0x3fc 0x000 0x10 0x000 | 537#define MX25_PAD_GPIO_C__CAN2_TX 0x1fc 0x3f8 0x000 0x16 0x000 538 539#define MX25_PAD_GPIO_D__GPIO_D 0x200 0x3fc 0x000 0x10 0x000 |
| 540#define MX25_PAD_GPIO_D__I2C2_SDA 0x200 0x3fc 0x520 0x12 0x001 |
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| 488#define MX25_PAD_GPIO_D__CAN2_RX 0x200 0x3fc 0x484 0x16 0x001 489 490#define MX25_PAD_GPIO_E__GPIO_E 0x204 0x400 0x000 0x10 0x000 491#define MX25_PAD_GPIO_E__I2C3_CLK 0x204 0x400 0x524 0x11 0x002 492#define MX25_PAD_GPIO_E__LD16 0x204 0x400 0x000 0x12 0x000 493#define MX25_PAD_GPIO_E__AUD7_TXD 0x204 0x400 0x000 0x14 0x000 | 541#define MX25_PAD_GPIO_D__CAN2_RX 0x200 0x3fc 0x484 0x16 0x001 542 543#define MX25_PAD_GPIO_E__GPIO_E 0x204 0x400 0x000 0x10 0x000 544#define MX25_PAD_GPIO_E__I2C3_CLK 0x204 0x400 0x524 0x11 0x002 545#define MX25_PAD_GPIO_E__LD16 0x204 0x400 0x000 0x12 0x000 546#define MX25_PAD_GPIO_E__AUD7_TXD 0x204 0x400 0x000 0x14 0x000 |
| 547#define MX25_PAD_GPIO_E__UART4_RXD 0x204 0x400 0x570 0x16 0x002 |
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| 494 495#define MX25_PAD_GPIO_F__GPIO_F 0x208 0x404 0x000 0x10 0x000 496#define MX25_PAD_GPIO_F__LD17 0x208 0x404 0x000 0x12 0x000 497#define MX25_PAD_GPIO_F__AUD7_TXC 0x208 0x404 0x000 0x14 0x000 | 548 549#define MX25_PAD_GPIO_F__GPIO_F 0x208 0x404 0x000 0x10 0x000 550#define MX25_PAD_GPIO_F__LD17 0x208 0x404 0x000 0x12 0x000 551#define MX25_PAD_GPIO_F__AUD7_TXC 0x208 0x404 0x000 0x14 0x000 |
| 552#define MX25_PAD_GPIO_F__UART4_TXD 0x208 0x404 0x000 0x16 0x000 |
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| 498 499#define MX25_PAD_EXT_ARMCLK__EXT_ARMCLK 0x20c 0x000 0x000 0x10 0x000 500#define MX25_PAD_EXT_ARMCLK__GPIO_3_15 0x20c 0x000 0x000 0x15 0x000 501 502#define MX25_PAD_UPLL_BYPCLK__UPLL_BYPCLK 0x210 0x000 0x000 0x10 0x000 503#define MX25_PAD_UPLL_BYPCLK__GPIO_3_16 0x210 0x000 0x000 0x15 0x000 504 505#define MX25_PAD_VSTBY_REQ__VSTBY_REQ 0x214 0x408 0x000 0x10 0x000 506#define MX25_PAD_VSTBY_REQ__AUD7_TXFS 0x214 0x408 0x000 0x14 0x000 507#define MX25_PAD_VSTBY_REQ__GPIO_3_17 0x214 0x408 0x000 0x15 0x000 | 553 554#define MX25_PAD_EXT_ARMCLK__EXT_ARMCLK 0x20c 0x000 0x000 0x10 0x000 555#define MX25_PAD_EXT_ARMCLK__GPIO_3_15 0x20c 0x000 0x000 0x15 0x000 556 557#define MX25_PAD_UPLL_BYPCLK__UPLL_BYPCLK 0x210 0x000 0x000 0x10 0x000 558#define MX25_PAD_UPLL_BYPCLK__GPIO_3_16 0x210 0x000 0x000 0x15 0x000 559 560#define MX25_PAD_VSTBY_REQ__VSTBY_REQ 0x214 0x408 0x000 0x10 0x000 561#define MX25_PAD_VSTBY_REQ__AUD7_TXFS 0x214 0x408 0x000 0x14 0x000 562#define MX25_PAD_VSTBY_REQ__GPIO_3_17 0x214 0x408 0x000 0x15 0x000 |
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| 508#define MX25_PAD_VSTBY_ACK__VSTBY_ACK 0x218 0x40c 0x000 0x10 0x000 509#define MX25_PAD_VSTBY_ACK__GPIO_3_18 0x218 0x40c 0x000 0x15 0x000 510 511#define MX25_PAD_POWER_FAIL__POWER_FAIL 0x21c 0x410 0x000 0x10 0x000 512#define MX25_PAD_POWER_FAIL__AUD7_RXD 0x21c 0x410 0x478 0x14 0x001 513#define MX25_PAD_POWER_FAIL__GPIO_3_19 0x21c 0x410 0x000 0x15 0x000 514 515#define MX25_PAD_CLKO__CLKO 0x220 0x414 0x000 0x10 0x000 516#define MX25_PAD_CLKO__GPIO_2_21 0x220 0x414 0x000 0x15 0x000 517 518#define MX25_PAD_BOOT_MODE0__BOOT_MODE0 0x224 0x000 0x000 0x00 0x000 519#define MX25_PAD_BOOT_MODE0__GPIO_4_30 0x224 0x000 0x000 0x05 0x000 | 564#define MX25_PAD_VSTBY_ACK__VSTBY_ACK 0x218 0x40c 0x000 0x10 0x000 565#define MX25_PAD_VSTBY_ACK__GPIO_3_18 0x218 0x40c 0x000 0x15 0x000 566 567#define MX25_PAD_POWER_FAIL__POWER_FAIL 0x21c 0x410 0x000 0x10 0x000 568#define MX25_PAD_POWER_FAIL__AUD7_RXD 0x21c 0x410 0x478 0x14 0x001 569#define MX25_PAD_POWER_FAIL__GPIO_3_19 0x21c 0x410 0x000 0x15 0x000 570 571#define MX25_PAD_CLKO__CLKO 0x220 0x414 0x000 0x10 0x000 572#define MX25_PAD_CLKO__GPIO_2_21 0x220 0x414 0x000 0x15 0x000 573 574#define MX25_PAD_BOOT_MODE0__BOOT_MODE0 0x224 0x000 0x000 0x00 0x000 575#define MX25_PAD_BOOT_MODE0__GPIO_4_30 0x224 0x000 0x000 0x05 0x000 |
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| 520#define MX25_PAD_BOOT_MODE1__BOOT_MODE1 0x228 0x000 0x000 0x00 0x000 521#define MX25_PAD_BOOT_MODE1__GPIO_4_31 0x228 0x000 0x000 0x05 0x000 522 523#endif /* __DTS_IMX25_PINFUNC_H */ | 577#define MX25_PAD_BOOT_MODE1__BOOT_MODE1 0x228 0x000 0x000 0x00 0x000 578#define MX25_PAD_BOOT_MODE1__GPIO_4_31 0x228 0x000 0x000 0x05 0x000 579 580#endif /* __DTS_IMX25_PINFUNC_H */ |