1/* 2 * SAMSUNG EXYNOS5440 SoC device tree source 3 * 4 * Copyright (c) 2012 Samsung Electronics Co., Ltd. 5 * http://www.samsung.com 6 * 7 * This program is free software; you can redistribute it and/or modify 8 * it under the terms of the GNU General Public License version 2 as --- 205 unchanged lines hidden (view full) --- 214 }; 215 216 tmuctrl_0: tmuctrl@160118 { 217 compatible = "samsung,exynos5440-tmu"; 218 reg = <0x160118 0x230>, <0x160368 0x10>; 219 interrupts = <0 58 0>; 220 clocks = <&clock CLK_B_125>; 221 clock-names = "tmu_apbif"; |
222 #include "exynos5440-tmu-sensor-conf.dtsi" |
223 }; 224 225 tmuctrl_1: tmuctrl@16011C { 226 compatible = "samsung,exynos5440-tmu"; 227 reg = <0x16011C 0x230>, <0x160368 0x10>; 228 interrupts = <0 58 0>; 229 clocks = <&clock CLK_B_125>; 230 clock-names = "tmu_apbif"; |
231 #include "exynos5440-tmu-sensor-conf.dtsi" |
232 }; 233 234 tmuctrl_2: tmuctrl@160120 { 235 compatible = "samsung,exynos5440-tmu"; 236 reg = <0x160120 0x230>, <0x160368 0x10>; 237 interrupts = <0 58 0>; 238 clocks = <&clock CLK_B_125>; 239 clock-names = "tmu_apbif"; |
240 #include "exynos5440-tmu-sensor-conf.dtsi" |
241 }; 242 |
243 thermal-zones { 244 cpu0_thermal: cpu0-thermal { 245 thermal-sensors = <&tmuctrl_0>; 246 #include "exynos5440-trip-points.dtsi" 247 }; 248 cpu1_thermal: cpu1-thermal { 249 thermal-sensors = <&tmuctrl_1>; 250 #include "exynos5440-trip-points.dtsi" 251 }; 252 cpu2_thermal: cpu2-thermal { 253 thermal-sensors = <&tmuctrl_2>; 254 #include "exynos5440-trip-points.dtsi" 255 }; 256 }; 257 |
258 sata@210000 { 259 compatible = "snps,exynos5440-ahci"; 260 reg = <0x210000 0x10000>; 261 interrupts = <0 30 0>; 262 clocks = <&clock CLK_SATA>; 263 clock-names = "sata"; 264 }; 265 --- 8 unchanged lines hidden (view full) --- 274 ehci@221000 { 275 compatible = "samsung,exynos5440-ehci"; 276 reg = <0x221000 0x1000>; 277 interrupts = <0 29 0>; 278 clocks = <&clock CLK_USB>; 279 clock-names = "usbhost"; 280 }; 281 |
282 pcie_0: pcie@290000 { |
283 compatible = "samsung,exynos5440-pcie", "snps,dw-pcie"; 284 reg = <0x290000 0x1000 285 0x270000 0x1000 286 0x271000 0x40>; 287 interrupts = <0 20 0>, <0 21 0>, <0 22 0>; 288 clocks = <&clock CLK_PR0_250_O>, <&clock CLK_PB0_250_O>; 289 clock-names = "pcie", "pcie_bus"; 290 #address-cells = <3>; --- 4 unchanged lines hidden (view full) --- 295 0x82000000 0 0x40011000 0x40011000 0 0x1ffef000>; /* non-prefetchable memory */ 296 #interrupt-cells = <1>; 297 interrupt-map-mask = <0 0 0 0>; 298 interrupt-map = <0x0 0 &gic 53>; 299 num-lanes = <4>; 300 status = "disabled"; 301 }; 302 |
303 pcie_1: pcie@2a0000 { |
304 compatible = "samsung,exynos5440-pcie", "snps,dw-pcie"; 305 reg = <0x2a0000 0x1000 306 0x272000 0x1000 307 0x271040 0x40>; 308 interrupts = <0 23 0>, <0 24 0>, <0 25 0>; 309 clocks = <&clock CLK_PR1_250_O>, <&clock CLK_PB0_250_O>; 310 clock-names = "pcie", "pcie_bus"; 311 #address-cells = <3>; --- 12 unchanged lines hidden --- |