1/*
2 * Samsung's Exynos4412 SoC device tree source
3 *
4 * Copyright (c) 2012 Samsung Electronics Co., Ltd.
5 * http://www.samsung.com
6 *
7 * Samsung's Exynos4412 SoC device nodes are listed in this file. Exynos4412
8 * based board files can include this file and provide values for board specfic
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21
22/ {
23 compatible = "samsung,exynos4412", "samsung,exynos4";
24
25 cpus {
26 #address-cells = <1>;
27 #size-cells = <0>;
28
29 cpu@A00 {
30 device_type = "cpu";
31 compatible = "arm,cortex-a9";
32 reg = <0xA00>;
33 };
34
35 cpu@A01 {
36 device_type = "cpu";
37 compatible = "arm,cortex-a9";
38 reg = <0xA01>;
39 };
40
41 cpu@A02 {
42 device_type = "cpu";
43 compatible = "arm,cortex-a9";
44 reg = <0xA02>;
45 };
46
47 cpu@A03 {
48 device_type = "cpu";
49 compatible = "arm,cortex-a9";
50 reg = <0xA03>;
51 };
52 };
53
54 combiner: interrupt-controller@10440000 {
55 samsung,combiner-nr = <20>;
56 };
57
58 pmu {
59 interrupts = <2 2>, <3 2>, <18 2>, <19 2>;
60 };
61
62 gic: interrupt-controller@10490000 {
63 cpu-offset = <0x4000>;
64 };
65
66 pmu_system_controller: system-controller@10020000 {
67 compatible = "samsung,exynos4412-pmu", "syscon";
68 };
69};
2 * Samsung's Exynos4412 SoC device tree source
3 *
4 * Copyright (c) 2012 Samsung Electronics Co., Ltd.
5 * http://www.samsung.com
6 *
7 * Samsung's Exynos4412 SoC device nodes are listed in this file. Exynos4412
8 * based board files can include this file and provide values for board specfic
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21
22/ {
23 compatible = "samsung,exynos4412", "samsung,exynos4";
24
25 cpus {
26 #address-cells = <1>;
27 #size-cells = <0>;
28
29 cpu@A00 {
30 device_type = "cpu";
31 compatible = "arm,cortex-a9";
32 reg = <0xA00>;
33 };
34
35 cpu@A01 {
36 device_type = "cpu";
37 compatible = "arm,cortex-a9";
38 reg = <0xA01>;
39 };
40
41 cpu@A02 {
42 device_type = "cpu";
43 compatible = "arm,cortex-a9";
44 reg = <0xA02>;
45 };
46
47 cpu@A03 {
48 device_type = "cpu";
49 compatible = "arm,cortex-a9";
50 reg = <0xA03>;
51 };
52 };
53
54 combiner: interrupt-controller@10440000 {
55 samsung,combiner-nr = <20>;
56 };
57
58 pmu {
59 interrupts = <2 2>, <3 2>, <18 2>, <19 2>;
60 };
61
62 gic: interrupt-controller@10490000 {
63 cpu-offset = <0x4000>;
64 };
65
66 pmu_system_controller: system-controller@10020000 {
67 compatible = "samsung,exynos4412-pmu", "syscon";
68 };
69};