20a21
> #include "exynos4-cpu-thermal.dtsi"
54a56,71
> clocks = <&cmu CLK_ARM_CLK>;
> clock-names = "cpu";
> #cooling-cells = <2>;
>
> operating-points = <
> 1000000 1150000
> 900000 1112500
> 800000 1075000
> 700000 1037500
> 600000 1000000
> 500000 962500
> 400000 925000
> 300000 887500
> 200000 850000
> 100000 850000
> >;
132a150,152
> interrupt-controller;
> #interrupt-cells = <3>;
> interrupt-parent = <&gic>;
134a155,168
> poweroff: syscon-poweroff {
> compatible = "syscon-poweroff";
> regmap = <&pmu_system_controller>;
> offset = <0x330C>; /* PS_HOLD_CONTROL */
> mask = <0x5200>; /* Reset value */
> };
>
> reboot: syscon-reboot {
> compatible = "syscon-reboot";
> regmap = <&pmu_system_controller>;
> offset = <0x0400>; /* SWRESET */
> mask = <0x1>;
> };
>
137d170
< reg = <0x10020710 8>;
138a172
> syscon = <&pmu_system_controller>;
174a209,212
> assigned-clocks = <&cmu CLK_MOUT_ACLK_400_MCUISP_SUB>,
> <&cmu CLK_MOUT_ACLK_266_SUB>;
> assigned-clock-parents = <&cmu CLK_FIN_PLL>,
> <&cmu CLK_FIN_PLL>;
184c222
< compatible = "samsung,exynos3250-rtc";
---
> compatible = "samsung,s3c6410-rtc";
186a225
> interrupt-parent = <&pmu_system_controller>;
195a235
> #include "exynos4412-tmu-sensor-conf.dtsi"
235a276,299
> jpeg: codec@11830000 {
> compatible = "samsung,exynos3250-jpeg";
> reg = <0x11830000 0x1000>;
> interrupts = <0 171 0>;
> clocks = <&cmu CLK_JPEG>, <&cmu CLK_SCLK_JPEG>;
> clock-names = "jpeg", "sclk";
> power-domains = <&pd_cam>;
> assigned-clocks = <&cmu CLK_MOUT_CAM_BLK>, <&cmu CLK_SCLK_JPEG>;
> assigned-clock-rates = <0>, <150000000>;
> assigned-clock-parents = <&cmu CLK_DIV_MPLL_PRE>;
> iommus = <&sysmmu_jpeg>;
> status = "disabled";
> };
>
> sysmmu_jpeg: sysmmu@11A60000 {
> compatible = "samsung,exynos-sysmmu";
> reg = <0x11a60000 0x1000>;
> interrupts = <0 156 0>, <0 161 0>;
> clock-names = "sysmmu", "master";
> clocks = <&cmu CLK_SMMUJPEG>, <&cmu CLK_JPEG>;
> power-domains = <&pd_cam>;
> #iommu-cells = <0>;
> };
>
243a308
> iommus = <&sysmmu_fimd0>;
262a328,337
> sysmmu_fimd0: sysmmu@11E20000 {
> compatible = "samsung,exynos-sysmmu";
> reg = <0x11e20000 0x1000>;
> interrupts = <0 80 0>, <0 81 0>;
> clock-names = "sysmmu", "master";
> clocks = <&cmu CLK_SMMUFIMD0>, <&cmu CLK_FIMD0>;
> power-domains = <&pd_lcd0>;
> #iommu-cells = <0>;
> };
>
275c350
< compatible = "samsung,exynos5250-dw-mshc";
---
> compatible = "samsung,exynos5420-dw-mshc";
287c362
< compatible = "samsung,exynos5250-dw-mshc";
---
> compatible = "samsung,exynos5420-dw-mshc";
356a432
> iommus = <&sysmmu_mfc>;
359a436,445
> sysmmu_mfc: sysmmu@13620000 {
> compatible = "samsung,exynos-sysmmu";
> reg = <0x13620000 0x1000>;
> interrupts = <0 96 0>, <0 98 0>;
> clock-names = "sysmmu", "master";
> clocks = <&cmu CLK_SMMUMFC_L>, <&cmu CLK_MFC>;
> power-domains = <&pd_mfc>;
> #iommu-cells = <0>;
> };
>
> #include "exynos4-cpu-thermal.dtsi"
54a56,71
> clocks = <&cmu CLK_ARM_CLK>;
> clock-names = "cpu";
> #cooling-cells = <2>;
>
> operating-points = <
> 1000000 1150000
> 900000 1112500
> 800000 1075000
> 700000 1037500
> 600000 1000000
> 500000 962500
> 400000 925000
> 300000 887500
> 200000 850000
> 100000 850000
> >;
132a150,152
> interrupt-controller;
> #interrupt-cells = <3>;
> interrupt-parent = <&gic>;
134a155,168
> poweroff: syscon-poweroff {
> compatible = "syscon-poweroff";
> regmap = <&pmu_system_controller>;
> offset = <0x330C>; /* PS_HOLD_CONTROL */
> mask = <0x5200>; /* Reset value */
> };
>
> reboot: syscon-reboot {
> compatible = "syscon-reboot";
> regmap = <&pmu_system_controller>;
> offset = <0x0400>; /* SWRESET */
> mask = <0x1>;
> };
>
137d170
< reg = <0x10020710 8>;
138a172
> syscon = <&pmu_system_controller>;
174a209,212
> assigned-clocks = <&cmu CLK_MOUT_ACLK_400_MCUISP_SUB>,
> <&cmu CLK_MOUT_ACLK_266_SUB>;
> assigned-clock-parents = <&cmu CLK_FIN_PLL>,
> <&cmu CLK_FIN_PLL>;
184c222
< compatible = "samsung,exynos3250-rtc";
---
> compatible = "samsung,s3c6410-rtc";
186a225
> interrupt-parent = <&pmu_system_controller>;
195a235
> #include "exynos4412-tmu-sensor-conf.dtsi"
235a276,299
> jpeg: codec@11830000 {
> compatible = "samsung,exynos3250-jpeg";
> reg = <0x11830000 0x1000>;
> interrupts = <0 171 0>;
> clocks = <&cmu CLK_JPEG>, <&cmu CLK_SCLK_JPEG>;
> clock-names = "jpeg", "sclk";
> power-domains = <&pd_cam>;
> assigned-clocks = <&cmu CLK_MOUT_CAM_BLK>, <&cmu CLK_SCLK_JPEG>;
> assigned-clock-rates = <0>, <150000000>;
> assigned-clock-parents = <&cmu CLK_DIV_MPLL_PRE>;
> iommus = <&sysmmu_jpeg>;
> status = "disabled";
> };
>
> sysmmu_jpeg: sysmmu@11A60000 {
> compatible = "samsung,exynos-sysmmu";
> reg = <0x11a60000 0x1000>;
> interrupts = <0 156 0>, <0 161 0>;
> clock-names = "sysmmu", "master";
> clocks = <&cmu CLK_SMMUJPEG>, <&cmu CLK_JPEG>;
> power-domains = <&pd_cam>;
> #iommu-cells = <0>;
> };
>
243a308
> iommus = <&sysmmu_fimd0>;
262a328,337
> sysmmu_fimd0: sysmmu@11E20000 {
> compatible = "samsung,exynos-sysmmu";
> reg = <0x11e20000 0x1000>;
> interrupts = <0 80 0>, <0 81 0>;
> clock-names = "sysmmu", "master";
> clocks = <&cmu CLK_SMMUFIMD0>, <&cmu CLK_FIMD0>;
> power-domains = <&pd_lcd0>;
> #iommu-cells = <0>;
> };
>
275c350
< compatible = "samsung,exynos5250-dw-mshc";
---
> compatible = "samsung,exynos5420-dw-mshc";
287c362
< compatible = "samsung,exynos5250-dw-mshc";
---
> compatible = "samsung,exynos5420-dw-mshc";
356a432
> iommus = <&sysmmu_mfc>;
359a436,445
> sysmmu_mfc: sysmmu@13620000 {
> compatible = "samsung,exynos-sysmmu";
> reg = <0x13620000 0x1000>;
> interrupts = <0 96 0>, <0 98 0>;
> clock-names = "sysmmu", "master";
> clocks = <&cmu CLK_SMMUMFC_L>, <&cmu CLK_MFC>;
> power-domains = <&pd_mfc>;
> #iommu-cells = <0>;
> };
>