23a24,25
> i2c0 = &iic0;
> i2c1 = &iic1;
45c47
< compatible = "arm,cortex-a9-gic";
---
> compatible = "arm,pl390";
68a71,94
> iic0_sclkdiv: iic0_sclkdiv {
> compatible = "renesas,emev2-smu-clkdiv";
> reg = <0x624 0>;
> clocks = <&pll3_fo>;
> #clock-cells = <0>;
> };
> iic0_sclk: iic0_sclk {
> compatible = "renesas,emev2-smu-gclk";
> reg = <0x48c 1>;
> clocks = <&iic0_sclkdiv>;
> #clock-cells = <0>;
> };
> iic1_sclkdiv: iic1_sclkdiv {
> compatible = "renesas,emev2-smu-clkdiv";
> reg = <0x624 16>;
> clocks = <&pll3_fo>;
> #clock-cells = <0>;
> };
> iic1_sclk: iic1_sclk {
> compatible = "renesas,emev2-smu-gclk";
> reg = <0x490 1>;
> clocks = <&iic1_sclkdiv>;
> #clock-cells = <0>;
> };
171a198,202
> pfc: pfc@e0140200 {
> compatible = "renesas,pfc-emev2";
> reg = <0xe0140200 0x100>;
> };
>
177a209
> gpio-ranges = <&pfc 0 0 32>;
188a221
> gpio-ranges = <&pfc 0 32 32>;
199a233
> gpio-ranges = <&pfc 0 64 32>;
210a245
> gpio-ranges = <&pfc 0 96 32>;
221a257
> gpio-ranges = <&pfc 0 128 31>;
226a263,284
>
> iic0: i2c@e0070000 {
> #address-cells = <1>;
> #size-cells = <0>;
> compatible = "renesas,iic-emev2";
> reg = <0xe0070000 0x28>;
> interrupts = <0 32 IRQ_TYPE_EDGE_RISING>;
> clocks = <&iic0_sclk>;
> clock-names = "sclk";
> status = "disabled";
> };
>
> iic1: i2c@e10a0000 {
> #address-cells = <1>;
> #size-cells = <0>;
> compatible = "renesas,iic-emev2";
> reg = <0xe10a0000 0x28>;
> interrupts = <0 33 IRQ_TYPE_EDGE_RISING>;
> clocks = <&iic1_sclk>;
> clock-names = "sclk";
> status = "disabled";
> };