22a23,27
>
> /* cooling options */
> cooling-min-level = <0>;
> cooling-max-level = <2>;
> #cooling-cells = <2>; /* min followed by max */
28c33,34
< interrupts = <GIC_SPI DIRECT_IRQ(131) IRQ_TYPE_LEVEL_HIGH>;
---
> interrupt-parent = <&wakeupgen>;
> interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>;
30a37,68
>
> &dss {
> reg = <0x58000000 0x80>,
> <0x58004054 0x4>,
> <0x58004300 0x20>;
> reg-names = "dss", "pll1_clkctrl", "pll1";
>
> clocks = <&dss_dss_clk>,
> <&dss_video1_clk>;
> clock-names = "fck", "video1_clk";
> };
>
> &mailbox5 {
> mbox_ipu1_ipc3x: mbox_ipu1_ipc3x {
> ti,mbox-tx = <6 2 2>;
> ti,mbox-rx = <4 2 2>;
> status = "disabled";
> };
> mbox_dsp1_ipc3x: mbox_dsp1_ipc3x {
> ti,mbox-tx = <5 2 2>;
> ti,mbox-rx = <1 2 2>;
> status = "disabled";
> };
> };
>
> &mailbox6 {
> mbox_ipu2_ipc3x: mbox_ipu2_ipc3x {
> ti,mbox-tx = <6 2 2>;
> ti,mbox-rx = <4 2 2>;
> status = "disabled";
> };
> };
>
> /* cooling options */
> cooling-min-level = <0>;
> cooling-max-level = <2>;
> #cooling-cells = <2>; /* min followed by max */
28c33,34
< interrupts = <GIC_SPI DIRECT_IRQ(131) IRQ_TYPE_LEVEL_HIGH>;
---
> interrupt-parent = <&wakeupgen>;
> interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>;
30a37,68
>
> &dss {
> reg = <0x58000000 0x80>,
> <0x58004054 0x4>,
> <0x58004300 0x20>;
> reg-names = "dss", "pll1_clkctrl", "pll1";
>
> clocks = <&dss_dss_clk>,
> <&dss_video1_clk>;
> clock-names = "fck", "video1_clk";
> };
>
> &mailbox5 {
> mbox_ipu1_ipc3x: mbox_ipu1_ipc3x {
> ti,mbox-tx = <6 2 2>;
> ti,mbox-rx = <4 2 2>;
> status = "disabled";
> };
> mbox_dsp1_ipc3x: mbox_dsp1_ipc3x {
> ti,mbox-tx = <5 2 2>;
> ti,mbox-rx = <1 2 2>;
> status = "disabled";
> };
> };
>
> &mailbox6 {
> mbox_ipu2_ipc3x: mbox_ipu2_ipc3x {
> ti,mbox-tx = <6 2 2>;
> ti,mbox-rx = <4 2 2>;
> status = "disabled";
> };
> };