60c60,61
< eth2 = &eth2;
---
> serial2 = &uart2;
> serial3 = &uart3;
80a82
> cache-level = <2>;
85a88,89
> compatible = "marvell,armada-xp-spi",
> "marvell,orion-spi";
89a94,99
> spi1: spi@10680 {
> compatible = "marvell,armada-xp-spi",
> "marvell,orion-spi";
> };
>
>
152c162
< reg = <0x18700 0xA0>, <0x1c054 0x10>;
---
> reg = <0x18700 0x24>, <0x1c054 0x10>;
156c166
< interrupt-controller@20000 {
---
> interrupt-controller@20a00 {
176a187,191
> cpu-config@21000 {
> compatible = "marvell,armada-xp-cpu-config";
> reg = <0x21000 0x8>;
> };
>
178c193
< compatible = "marvell,armada-370-neta";
---
> compatible = "marvell,armada-xp-neta";
220a236,255
> ethernet@70000 {
> compatible = "marvell,armada-xp-neta";
> };
>
> ethernet@74000 {
> compatible = "marvell,armada-xp-neta";
> };
>
> crypto@90000 {
> compatible = "marvell,armada-xp-crypto";
> reg = <0x90000 0x10000>;
> reg-names = "regs";
> interrupts = <48>, <49>;
> clocks = <&gateclk 23>, <&gateclk 23>;
> clock-names = "cesa0", "cesa1";
> marvell,crypto-srams = <&crypto_sram0>,
> <&crypto_sram1>;
> marvell,crypto-sram-size = <0x800>;
> };
>
240a276,293
>
> crypto_sram0: sa-sram0 {
> compatible = "mmio-sram";
> reg = <MBUS_ID(0x09, 0x09) 0 0x800>;
> clocks = <&gateclk 23>;
> #address-cells = <1>;
> #size-cells = <1>;
> ranges = <0 MBUS_ID(0x09, 0x09) 0 0x800>;
> };
>
> crypto_sram1: sa-sram1 {
> compatible = "mmio-sram";
> reg = <MBUS_ID(0x09, 0x05) 0 0x800>;
> clocks = <&gateclk 23>;
> #address-cells = <1>;
> #size-cells = <1>;
> ranges = <0 MBUS_ID(0x09, 0x05) 0 0x800>;
> };
290c343
< marvell,function = "spi";
---
> marvell,function = "spi0";