| armada-xp-gp.dts (279385) | armada-xp-gp.dts (295436) |
|---|---|
| 1/* 2 * Device Tree file for Marvell Armada XP development board 3 * (DB-MV784MP-GP) 4 * 5 * Copyright (C) 2013-2014 Marvell 6 * 7 * Lior Amsalem <alior@marvell.com> 8 * Gregory CLEMENT <gregory.clement@free-electrons.com> --- 51 unchanged lines hidden (view full) --- 60#include <dt-bindings/gpio/gpio.h> 61#include "armada-xp-mv78460.dtsi" 62 63/ { 64 model = "Marvell Armada XP Development Board DB-MV784MP-GP"; 65 compatible = "marvell,axp-gp", "marvell,armadaxp-mv78460", "marvell,armadaxp", "marvell,armada-370-xp"; 66 67 chosen { | 1/* 2 * Device Tree file for Marvell Armada XP development board 3 * (DB-MV784MP-GP) 4 * 5 * Copyright (C) 2013-2014 Marvell 6 * 7 * Lior Amsalem <alior@marvell.com> 8 * Gregory CLEMENT <gregory.clement@free-electrons.com> --- 51 unchanged lines hidden (view full) --- 60#include <dt-bindings/gpio/gpio.h> 61#include "armada-xp-mv78460.dtsi" 62 63/ { 64 model = "Marvell Armada XP Development Board DB-MV784MP-GP"; 65 compatible = "marvell,axp-gp", "marvell,armadaxp-mv78460", "marvell,armadaxp", "marvell,armada-370-xp"; 66 67 chosen { |
| 68 bootargs = "console=ttyS0,115200 earlyprintk"; | 68 stdout-path = "serial0:115200n8"; |
| 69 }; 70 71 memory { 72 device_type = "memory"; 73 /* 74 * 8 GB of plug-in RAM modules by default.The amount 75 * of memory available can be changed by the 76 * bootloader according the size of the module --- 12 unchanged lines hidden (view full) --- 89 <&gpio0 17 GPIO_ACTIVE_LOW>, 90 <&gpio0 18 GPIO_ACTIVE_LOW>; 91 }; 92 }; 93 94 soc { 95 ranges = <MBUS_ID(0xf0, 0x01) 0 0 0xf1000000 0x100000 96 MBUS_ID(0x01, 0x1d) 0 0 0xfff00000 0x100000 | 69 }; 70 71 memory { 72 device_type = "memory"; 73 /* 74 * 8 GB of plug-in RAM modules by default.The amount 75 * of memory available can be changed by the 76 * bootloader according the size of the module --- 12 unchanged lines hidden (view full) --- 89 <&gpio0 17 GPIO_ACTIVE_LOW>, 90 <&gpio0 18 GPIO_ACTIVE_LOW>; 91 }; 92 }; 93 94 soc { 95 ranges = <MBUS_ID(0xf0, 0x01) 0 0 0xf1000000 0x100000 96 MBUS_ID(0x01, 0x1d) 0 0 0xfff00000 0x100000 |
| 97 MBUS_ID(0x01, 0x2f) 0 0 0xf0000000 0x1000000>; | 97 MBUS_ID(0x01, 0x2f) 0 0 0xf0000000 0x1000000 98 MBUS_ID(0x09, 0x09) 0 0 0xf8100000 0x10000 99 MBUS_ID(0x09, 0x05) 0 0 0xf8110000 0x10000>; |
| 98 99 devbus-bootcs { 100 status = "okay"; 101 102 /* Device Bus parameters are required */ 103 104 /* Read parameters */ 105 devbus,bus-width = <16>; --- 116 unchanged lines hidden (view full) --- 222 }; 223 224 spi0: spi@10600 { 225 status = "okay"; 226 227 spi-flash@0 { 228 #address-cells = <1>; 229 #size-cells = <1>; | 100 101 devbus-bootcs { 102 status = "okay"; 103 104 /* Device Bus parameters are required */ 105 106 /* Read parameters */ 107 devbus,bus-width = <16>; --- 116 unchanged lines hidden (view full) --- 224 }; 225 226 spi0: spi@10600 { 227 status = "okay"; 228 229 spi-flash@0 { 230 #address-cells = <1>; 231 #size-cells = <1>; |
| 230 compatible = "n25q128a13"; | 232 compatible = "n25q128a13", "jedec,spi-nor"; |
| 231 reg = <0>; /* Chip select 0 */ 232 spi-max-frequency = <108000000>; 233 }; 234 }; 235 236 nand@d0000 { 237 status = "okay"; 238 num-cs = <1>; 239 marvell,nand-keep-config; 240 marvell,nand-enable-arbiter; 241 nand-on-flash-bbt; 242 }; 243 }; 244 }; 245}; | 233 reg = <0>; /* Chip select 0 */ 234 spi-max-frequency = <108000000>; 235 }; 236 }; 237 238 nand@d0000 { 239 status = "okay"; 240 num-cs = <1>; 241 marvell,nand-keep-config; 242 marvell,nand-enable-arbiter; 243 nand-on-flash-bbt; 244 }; 245 }; 246 }; 247}; |