Deleted Added
sdiff udiff text old ( 279385 ) new ( 295436 )
full compact
am33xx-clocks.dtsi (279385) am33xx-clocks.dtsi (295436)
1/*
2 * Device Tree Source for AM33xx clock data
3 *
4 * Copyright (C) 2013 Texas Instruments, Inc.
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 */
1/*
2 * Device Tree Source for AM33xx clock data
3 *
4 * Copyright (C) 2013 Texas Instruments, Inc.
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 */
10&scrm_clocks {
10&scm_clocks {
11 sys_clkin_ck: sys_clkin_ck {
12 #clock-cells = <0>;
13 compatible = "ti,mux-clock";
14 clocks = <&virt_19200000_ck>, <&virt_24000000_ck>, <&virt_25000000_ck>, <&virt_26000000_ck>;
15 ti,bit-shift = <22>;
16 reg = <0x0040>;
17 };
18

--- 75 unchanged lines hidden (view full) ---

94 clocks = <&sys_clkin_ck>;
95 clock-mult = <1>;
96 clock-div = <1>;
97 };
98
99 ehrpwm0_tbclk: ehrpwm0_tbclk@44e10664 {
100 #clock-cells = <0>;
101 compatible = "ti,gate-clock";
11 sys_clkin_ck: sys_clkin_ck {
12 #clock-cells = <0>;
13 compatible = "ti,mux-clock";
14 clocks = <&virt_19200000_ck>, <&virt_24000000_ck>, <&virt_25000000_ck>, <&virt_26000000_ck>;
15 ti,bit-shift = <22>;
16 reg = <0x0040>;
17 };
18

--- 75 unchanged lines hidden (view full) ---

94 clocks = <&sys_clkin_ck>;
95 clock-mult = <1>;
96 clock-div = <1>;
97 };
98
99 ehrpwm0_tbclk: ehrpwm0_tbclk@44e10664 {
100 #clock-cells = <0>;
101 compatible = "ti,gate-clock";
102 clocks = <&dpll_per_m2_ck>;
102 clocks = <&l4ls_gclk>;
103 ti,bit-shift = <0>;
104 reg = <0x0664>;
105 };
106
107 ehrpwm1_tbclk: ehrpwm1_tbclk@44e10664 {
108 #clock-cells = <0>;
109 compatible = "ti,gate-clock";
103 ti,bit-shift = <0>;
104 reg = <0x0664>;
105 };
106
107 ehrpwm1_tbclk: ehrpwm1_tbclk@44e10664 {
108 #clock-cells = <0>;
109 compatible = "ti,gate-clock";
110 clocks = <&dpll_per_m2_ck>;
110 clocks = <&l4ls_gclk>;
111 ti,bit-shift = <1>;
112 reg = <0x0664>;
113 };
114
115 ehrpwm2_tbclk: ehrpwm2_tbclk@44e10664 {
116 #clock-cells = <0>;
117 compatible = "ti,gate-clock";
111 ti,bit-shift = <1>;
112 reg = <0x0664>;
113 };
114
115 ehrpwm2_tbclk: ehrpwm2_tbclk@44e10664 {
116 #clock-cells = <0>;
117 compatible = "ti,gate-clock";
118 clocks = <&dpll_per_m2_ck>;
118 clocks = <&l4ls_gclk>;
119 ti,bit-shift = <2>;
120 reg = <0x0664>;
121 };
122};
123&prcm_clocks {
124 clk_32768_ck: clk_32768_ck {
125 #clock-cells = <0>;
126 compatible = "fixed-clock";

--- 520 unchanged lines hidden --- 		119 ti,bit-shift = <2>;
120 reg = <0x0664>;
121 };
122};
123&prcm_clocks {
124 clk_32768_ck: clk_32768_ck {
125 #clock-cells = <0>;
126 compatible = "fixed-clock";

--- 520 unchanged lines hidden ---