1/* 2 * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/ 3 * 4 * This program is free software; you can redistribute it and/or modify 5 * it under the terms of the GNU General Public License version 2 as 6 * published by the Free Software Foundation. 7 */ 8 --- 53 unchanged lines hidden (view full) --- 62}; 63 64&am33xx_pinmux { 65 pinctrl-names = "default"; 66 pinctrl-0 = <&clkout2_pin>; 67 68 user_leds_s0: user_leds_s0 { 69 pinctrl-single,pins = < |
70 AM33XX_IOPAD(0x854, PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpmc_a5.gpio1_21 */ 71 AM33XX_IOPAD(0x858, PIN_OUTPUT_PULLUP | MUX_MODE7) /* gpmc_a6.gpio1_22 */ 72 AM33XX_IOPAD(0x85c, PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpmc_a7.gpio1_23 */ 73 AM33XX_IOPAD(0x860, PIN_OUTPUT_PULLUP | MUX_MODE7) /* gpmc_a8.gpio1_24 */ |
74 >; 75 }; 76 77 i2c0_pins: pinmux_i2c0_pins { 78 pinctrl-single,pins = < |
79 AM33XX_IOPAD(0x988, PIN_INPUT_PULLUP | MUX_MODE0) /* i2c0_sda.i2c0_sda */ 80 AM33XX_IOPAD(0x98c, PIN_INPUT_PULLUP | MUX_MODE0) /* i2c0_scl.i2c0_scl */ |
81 >; 82 }; 83 |
84 i2c2_pins: pinmux_i2c2_pins { 85 pinctrl-single,pins = < 86 AM33XX_IOPAD(0x978, PIN_INPUT_PULLUP | MUX_MODE3) /* uart1_ctsn.i2c2_sda */ 87 AM33XX_IOPAD(0x97c, PIN_INPUT_PULLUP | MUX_MODE3) /* uart1_rtsn.i2c2_scl */ 88 >; 89 }; 90 |
91 uart0_pins: pinmux_uart0_pins { 92 pinctrl-single,pins = < |
93 AM33XX_IOPAD(0x970, PIN_INPUT_PULLUP | MUX_MODE0) /* uart0_rxd.uart0_rxd */ 94 AM33XX_IOPAD(0x974, PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* uart0_txd.uart0_txd */ |
95 >; 96 }; 97 98 clkout2_pin: pinmux_clkout2_pin { 99 pinctrl-single,pins = < |
100 AM33XX_IOPAD(0x9b4, PIN_OUTPUT_PULLDOWN | MUX_MODE3) /* xdma_event_intr1.clkout2 */ |
101 >; 102 }; 103 104 cpsw_default: cpsw_default { 105 pinctrl-single,pins = < 106 /* Slave 1 */ |
107 AM33XX_IOPAD(0x910, PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_rxerr.mii1_rxerr */ 108 AM33XX_IOPAD(0x914, PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* mii1_txen.mii1_txen */ 109 AM33XX_IOPAD(0x918, PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_rxdv.mii1_rxdv */ 110 AM33XX_IOPAD(0x91c, PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* mii1_txd3.mii1_txd3 */ 111 AM33XX_IOPAD(0x920, PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* mii1_txd2.mii1_txd2 */ 112 AM33XX_IOPAD(0x924, PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* mii1_txd1.mii1_txd1 */ 113 AM33XX_IOPAD(0x928, PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* mii1_txd0.mii1_txd0 */ 114 AM33XX_IOPAD(0x92c, PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_txclk.mii1_txclk */ 115 AM33XX_IOPAD(0x930, PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_rxclk.mii1_rxclk */ 116 AM33XX_IOPAD(0x934, PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_rxd3.mii1_rxd3 */ 117 AM33XX_IOPAD(0x938, PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_rxd2.mii1_rxd2 */ 118 AM33XX_IOPAD(0x93c, PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_rxd1.mii1_rxd1 */ 119 AM33XX_IOPAD(0x940, PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_rxd0.mii1_rxd0 */ |
120 >; 121 }; 122 123 cpsw_sleep: cpsw_sleep { 124 pinctrl-single,pins = < 125 /* Slave 1 reset value */ |
126 AM33XX_IOPAD(0x910, PIN_INPUT_PULLDOWN | MUX_MODE7) 127 AM33XX_IOPAD(0x914, PIN_INPUT_PULLDOWN | MUX_MODE7) 128 AM33XX_IOPAD(0x918, PIN_INPUT_PULLDOWN | MUX_MODE7) 129 AM33XX_IOPAD(0x91c, PIN_INPUT_PULLDOWN | MUX_MODE7) 130 AM33XX_IOPAD(0x920, PIN_INPUT_PULLDOWN | MUX_MODE7) 131 AM33XX_IOPAD(0x924, PIN_INPUT_PULLDOWN | MUX_MODE7) 132 AM33XX_IOPAD(0x928, PIN_INPUT_PULLDOWN | MUX_MODE7) 133 AM33XX_IOPAD(0x92c, PIN_INPUT_PULLDOWN | MUX_MODE7) 134 AM33XX_IOPAD(0x930, PIN_INPUT_PULLDOWN | MUX_MODE7) 135 AM33XX_IOPAD(0x934, PIN_INPUT_PULLDOWN | MUX_MODE7) 136 AM33XX_IOPAD(0x938, PIN_INPUT_PULLDOWN | MUX_MODE7) 137 AM33XX_IOPAD(0x93c, PIN_INPUT_PULLDOWN | MUX_MODE7) 138 AM33XX_IOPAD(0x940, PIN_INPUT_PULLDOWN | MUX_MODE7) |
139 >; 140 }; 141 142 davinci_mdio_default: davinci_mdio_default { 143 pinctrl-single,pins = < 144 /* MDIO */ |
145 AM33XX_IOPAD(0x948, PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0) /* mdio_data.mdio_data */ 146 AM33XX_IOPAD(0x94c, PIN_OUTPUT_PULLUP | MUX_MODE0) /* mdio_clk.mdio_clk */ |
147 >; 148 }; 149 150 davinci_mdio_sleep: davinci_mdio_sleep { 151 pinctrl-single,pins = < 152 /* MDIO reset value */ |
153 AM33XX_IOPAD(0x948, PIN_INPUT_PULLDOWN | MUX_MODE7) 154 AM33XX_IOPAD(0x94c, PIN_INPUT_PULLDOWN | MUX_MODE7) |
155 >; 156 }; 157 158 mmc1_pins: pinmux_mmc1_pins { 159 pinctrl-single,pins = < |
160 AM33XX_IOPAD(0x960, PIN_INPUT | MUX_MODE7) /* GPIO0_6 */ |
161 >; 162 }; 163 164 emmc_pins: pinmux_emmc_pins { 165 pinctrl-single,pins = < |
166 AM33XX_IOPAD(0x880, PIN_INPUT_PULLUP | MUX_MODE2) /* gpmc_csn1.mmc1_clk */ 167 AM33XX_IOPAD(0x884, PIN_INPUT_PULLUP | MUX_MODE2) /* gpmc_csn2.mmc1_cmd */ 168 AM33XX_IOPAD(0x800, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad0.mmc1_dat0 */ 169 AM33XX_IOPAD(0x804, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad1.mmc1_dat1 */ 170 AM33XX_IOPAD(0x808, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad2.mmc1_dat2 */ 171 AM33XX_IOPAD(0x80c, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad3.mmc1_dat3 */ 172 AM33XX_IOPAD(0x810, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad4.mmc1_dat4 */ 173 AM33XX_IOPAD(0x814, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad5.mmc1_dat5 */ 174 AM33XX_IOPAD(0x818, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad6.mmc1_dat6 */ 175 AM33XX_IOPAD(0x81c, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad7.mmc1_dat7 */ |
176 >; 177 }; 178}; 179 180&uart0 { 181 pinctrl-names = "default"; 182 pinctrl-0 = <&uart0_pins>; 183 --- 13 unchanged lines hidden (view full) --- 197}; 198 199&usb1_phy { 200 status = "okay"; 201}; 202 203&usb0 { 204 status = "okay"; |
205 dr_mode = "peripheral"; |
206}; 207 208&usb1 { 209 status = "okay"; 210 dr_mode = "host"; 211}; 212 213&cppi41dma { --- 6 unchanged lines hidden (view full) --- 220 221 status = "okay"; 222 clock-frequency = <400000>; 223 224 tps: tps@24 { 225 reg = <0x24>; 226 }; 227 |
228 baseboard_eeprom: baseboard_eeprom@50 { 229 compatible = "at,24c256"; 230 reg = <0x50>; 231 232 #address-cells = <1>; 233 #size-cells = <1>; 234 baseboard_data: baseboard_data@0 { 235 reg = <0 0x100>; 236 }; 237 }; |
238}; 239 |
240&i2c2 { 241 pinctrl-names = "default"; 242 pinctrl-0 = <&i2c2_pins>; |
243 |
244 status = "okay"; 245 clock-frequency = <100000>; 246 247 cape_eeprom0: cape_eeprom0@54 { 248 compatible = "at,24c256"; 249 reg = <0x54>; 250 #address-cells = <1>; 251 #size-cells = <1>; 252 cape0_data: cape_data@0 { 253 reg = <0 0x100>; 254 }; 255 }; 256 257 cape_eeprom1: cape_eeprom1@55 { 258 compatible = "at,24c256"; 259 reg = <0x55>; 260 #address-cells = <1>; 261 #size-cells = <1>; 262 cape1_data: cape_data@0 { 263 reg = <0 0x100>; 264 }; 265 }; 266 267 cape_eeprom2: cape_eeprom2@56 { 268 compatible = "at,24c256"; 269 reg = <0x56>; 270 #address-cells = <1>; 271 #size-cells = <1>; 272 cape2_data: cape_data@0 { 273 reg = <0 0x100>; 274 }; 275 }; 276 277 cape_eeprom3: cape_eeprom3@57 { 278 compatible = "at,24c256"; 279 reg = <0x57>; 280 #address-cells = <1>; 281 #size-cells = <1>; 282 cape3_data: cape_data@0 { 283 reg = <0 0x100>; 284 }; 285 }; 286}; 287 |
288&tps { |
289 compatible = "ti,tps65217"; 290 /* 291 * Configure pmic to enter OFF-state instead of SLEEP-state ("RTC-only 292 * mode") at poweroff. Most BeagleBone versions do not support RTC-only 293 * mode and risk hardware damage if this mode is entered. 294 * 295 * For details, see linux-omap mailing list May 2015 thread 296 * [PATCH] ARM: dts: am335x-bone* enable pmic-shutdown-controller 297 * In particular, messages: 298 * http://www.spinics.net/lists/linux-omap/msg118585.html 299 * http://www.spinics.net/lists/linux-omap/msg118615.html 300 * 301 * You can override this later with 302 * &tps { /delete-property/ ti,pmic-shutdown-controller; } 303 * if you want to use RTC-only mode and made sure you are not affected 304 * by the hardware problems. (Tip: double-check by performing a current 305 * measurement after shutdown: it should be less than 1 mA.) 306 */ 307 ti,pmic-shutdown-controller; 308 |
309 regulators { |
310 #address-cells = <1>; 311 #size-cells = <0>; 312 |
313 dcdc1_reg: regulator@0 { |
314 reg = <0>; |
315 regulator-name = "vdds_dpr"; 316 regulator-always-on; 317 }; 318 319 dcdc2_reg: regulator@1 { |
320 reg = <1>; |
321 /* VDD_MPU voltage limits 0.95V - 1.26V with +/-4% tolerance */ 322 regulator-name = "vdd_mpu"; 323 regulator-min-microvolt = <925000>; 324 regulator-max-microvolt = <1325000>; 325 regulator-boot-on; 326 regulator-always-on; 327 }; 328 329 dcdc3_reg: regulator@2 { |
330 reg = <2>; |
331 /* VDD_CORE voltage limits 0.95V - 1.1V with +/-4% tolerance */ 332 regulator-name = "vdd_core"; 333 regulator-min-microvolt = <925000>; 334 regulator-max-microvolt = <1150000>; 335 regulator-boot-on; 336 regulator-always-on; 337 }; 338 339 ldo1_reg: regulator@3 { |
340 reg = <3>; |
341 regulator-name = "vio,vrtc,vdds"; 342 regulator-always-on; 343 }; 344 345 ldo2_reg: regulator@4 { |
346 reg = <4>; |
347 regulator-name = "vdd_3v3aux"; 348 regulator-always-on; 349 }; 350 351 ldo3_reg: regulator@5 { |
352 reg = <5>; |
353 regulator-name = "vdd_1v8"; 354 regulator-always-on; 355 }; 356 357 ldo4_reg: regulator@6 { |
358 reg = <6>; |
359 regulator-name = "vdd_3v3a"; 360 regulator-always-on; 361 }; 362 }; 363}; 364 365&cpsw_emac0 { 366 phy_id = <&davinci_mdio>, <0>; --- 19 unchanged lines hidden (view full) --- 386 status = "okay"; 387}; 388 389&mmc1 { 390 status = "okay"; 391 bus-width = <0x4>; 392 pinctrl-names = "default"; 393 pinctrl-0 = <&mmc1_pins>; |
394 cd-gpios = <&gpio0 6 GPIO_ACTIVE_LOW>; |
395}; |
396 397&aes { 398 status = "okay"; 399}; 400 401&sham { 402 status = "okay"; 403}; |