1/*
2 * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 as
6 * published by the Free Software Foundation.
7 */
8

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62};
63
64&am33xx_pinmux {
65 pinctrl-names = "default";
66 pinctrl-0 = <&clkout2_pin>;
67
68 user_leds_s0: user_leds_s0 {
69 pinctrl-single,pins = <
70 0x54 (PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpmc_a5.gpio1_21 */
71 0x58 (PIN_OUTPUT_PULLUP | MUX_MODE7) /* gpmc_a6.gpio1_22 */
72 0x5c (PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpmc_a7.gpio1_23 */
73 0x60 (PIN_OUTPUT_PULLUP | MUX_MODE7) /* gpmc_a8.gpio1_24 */
74 >;
75 };
76
77 i2c0_pins: pinmux_i2c0_pins {
78 pinctrl-single,pins = <
79 0x188 (PIN_INPUT_PULLUP | MUX_MODE0) /* i2c0_sda.i2c0_sda */
80 0x18c (PIN_INPUT_PULLUP | MUX_MODE0) /* i2c0_scl.i2c0_scl */
81 >;
82 };
83
84 uart0_pins: pinmux_uart0_pins {
85 pinctrl-single,pins = <
86 0x170 (PIN_INPUT_PULLUP | MUX_MODE0) /* uart0_rxd.uart0_rxd */
87 0x174 (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* uart0_txd.uart0_txd */
88 >;
89 };
90
91 clkout2_pin: pinmux_clkout2_pin {
92 pinctrl-single,pins = <
93 0x1b4 (PIN_OUTPUT_PULLDOWN | MUX_MODE3) /* xdma_event_intr1.clkout2 */
94 >;
95 };
96
97 cpsw_default: cpsw_default {
98 pinctrl-single,pins = <
99 /* Slave 1 */
100 0x110 (PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_rxerr.mii1_rxerr */
101 0x114 (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* mii1_txen.mii1_txen */
102 0x118 (PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_rxdv.mii1_rxdv */
103 0x11c (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* mii1_txd3.mii1_txd3 */
104 0x120 (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* mii1_txd2.mii1_txd2 */
105 0x124 (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* mii1_txd1.mii1_txd1 */
106 0x128 (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* mii1_txd0.mii1_txd0 */
107 0x12c (PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_txclk.mii1_txclk */
108 0x130 (PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_rxclk.mii1_rxclk */
109 0x134 (PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_rxd3.mii1_rxd3 */
110 0x138 (PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_rxd2.mii1_rxd2 */
111 0x13c (PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_rxd1.mii1_rxd1 */
112 0x140 (PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_rxd0.mii1_rxd0 */
113 >;
114 };
115
116 cpsw_sleep: cpsw_sleep {
117 pinctrl-single,pins = <
118 /* Slave 1 reset value */
119 0x110 (PIN_INPUT_PULLDOWN | MUX_MODE7)
120 0x114 (PIN_INPUT_PULLDOWN | MUX_MODE7)
121 0x118 (PIN_INPUT_PULLDOWN | MUX_MODE7)
122 0x11c (PIN_INPUT_PULLDOWN | MUX_MODE7)
123 0x120 (PIN_INPUT_PULLDOWN | MUX_MODE7)
124 0x124 (PIN_INPUT_PULLDOWN | MUX_MODE7)
125 0x128 (PIN_INPUT_PULLDOWN | MUX_MODE7)
126 0x12c (PIN_INPUT_PULLDOWN | MUX_MODE7)
127 0x130 (PIN_INPUT_PULLDOWN | MUX_MODE7)
128 0x134 (PIN_INPUT_PULLDOWN | MUX_MODE7)
129 0x138 (PIN_INPUT_PULLDOWN | MUX_MODE7)
130 0x13c (PIN_INPUT_PULLDOWN | MUX_MODE7)
131 0x140 (PIN_INPUT_PULLDOWN | MUX_MODE7)
132 >;
133 };
134
135 davinci_mdio_default: davinci_mdio_default {
136 pinctrl-single,pins = <
137 /* MDIO */
138 0x148 (PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0) /* mdio_data.mdio_data */
139 0x14c (PIN_OUTPUT_PULLUP | MUX_MODE0) /* mdio_clk.mdio_clk */
140 >;
141 };
142
143 davinci_mdio_sleep: davinci_mdio_sleep {
144 pinctrl-single,pins = <
145 /* MDIO reset value */
146 0x148 (PIN_INPUT_PULLDOWN | MUX_MODE7)
147 0x14c (PIN_INPUT_PULLDOWN | MUX_MODE7)
148 >;
149 };
150
151 mmc1_pins: pinmux_mmc1_pins {
152 pinctrl-single,pins = <
153 0x160 (PIN_INPUT | MUX_MODE7) /* GPIO0_6 */
154 >;
155 };
156
157 emmc_pins: pinmux_emmc_pins {
158 pinctrl-single,pins = <
159 0x80 (PIN_INPUT_PULLUP | MUX_MODE2) /* gpmc_csn1.mmc1_clk */
160 0x84 (PIN_INPUT_PULLUP | MUX_MODE2) /* gpmc_csn2.mmc1_cmd */
161 0x00 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad0.mmc1_dat0 */
162 0x04 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad1.mmc1_dat1 */
163 0x08 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad2.mmc1_dat2 */
164 0x0c (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad3.mmc1_dat3 */
165 0x10 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad4.mmc1_dat4 */
166 0x14 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad5.mmc1_dat5 */
167 0x18 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad6.mmc1_dat6 */
168 0x1c (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad7.mmc1_dat7 */
169 >;
170 };
171};
172
173&uart0 {
174 pinctrl-names = "default";
175 pinctrl-0 = <&uart0_pins>;
176

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190};
191
192&usb1_phy {
193 status = "okay";
194};
195
196&usb0 {
197 status = "okay";
198};
199
200&usb1 {
201 status = "okay";
202 dr_mode = "host";
203};
204
205&cppi41dma {

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212
213 status = "okay";
214 clock-frequency = <400000>;
215
216 tps: tps@24 {
217 reg = <0x24>;
218 };
219
220};
221
222/include/ "tps65217.dtsi"
223
224&tps {
225 regulators {
226 dcdc1_reg: regulator@0 {
227 regulator-name = "vdds_dpr";
228 regulator-always-on;
229 };
230
231 dcdc2_reg: regulator@1 {
232 /* VDD_MPU voltage limits 0.95V - 1.26V with +/-4% tolerance */
233 regulator-name = "vdd_mpu";
234 regulator-min-microvolt = <925000>;
235 regulator-max-microvolt = <1325000>;
236 regulator-boot-on;
237 regulator-always-on;
238 };
239
240 dcdc3_reg: regulator@2 {
241 /* VDD_CORE voltage limits 0.95V - 1.1V with +/-4% tolerance */
242 regulator-name = "vdd_core";
243 regulator-min-microvolt = <925000>;
244 regulator-max-microvolt = <1150000>;
245 regulator-boot-on;
246 regulator-always-on;
247 };
248
249 ldo1_reg: regulator@3 {
250 regulator-name = "vio,vrtc,vdds";
251 regulator-always-on;
252 };
253
254 ldo2_reg: regulator@4 {
255 regulator-name = "vdd_3v3aux";
256 regulator-always-on;
257 };
258
259 ldo3_reg: regulator@5 {
260 regulator-name = "vdd_1v8";
261 regulator-always-on;
262 };
263
264 ldo4_reg: regulator@6 {
265 regulator-name = "vdd_3v3a";
266 regulator-always-on;
267 };
268 };
269};
270
271&cpsw_emac0 {
272 phy_id = <&davinci_mdio>, <0>;

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292 status = "okay";
293};
294
295&mmc1 {
296 status = "okay";
297 bus-width = <0x4>;
298 pinctrl-names = "default";
299 pinctrl-0 = <&mmc1_pins>;
300 cd-gpios = <&gpio0 6 GPIO_ACTIVE_HIGH>;
301 cd-inverted;
302};