| if_wbreg.h (48745) | if_wbreg.h (49611) |
|---|---|
| 1/* 2 * Copyright (c) 1997, 1998 3 * Bill Paul <wpaul@ctr.columbia.edu>. All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright --- 15 unchanged lines hidden (view full) --- 24 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 25 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 26 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 27 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 28 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 29 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF 30 * THE POSSIBILITY OF SUCH DAMAGE. 31 * | 1/* 2 * Copyright (c) 1997, 1998 3 * Bill Paul <wpaul@ctr.columbia.edu>. All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright --- 15 unchanged lines hidden (view full) --- 24 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 25 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 26 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 27 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 28 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 29 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF 30 * THE POSSIBILITY OF SUCH DAMAGE. 31 * |
| 32 * $Id: if_wbreg.h,v 1.3 1999/05/06 15:32:52 wpaul Exp $ | 32 * $Id: if_wbreg.h,v 1.4 1999/07/11 00:56:07 wpaul Exp $ |
| 33 */ 34 35/* 36 * Winbond register definitions. 37 */ 38 39#define WB_BUSCTL 0x00 /* bus control */ 40#define WB_TXSTART 0x04 /* tx start demand */ --- 314 unchanged lines hidden (view full) --- 355#define WB_FLAG_SCHEDDELAY 2 356#define WB_FLAG_DELAYTIMEO 3 357 358struct wb_softc { 359 struct arpcom arpcom; /* interface info */ 360 struct ifmedia ifmedia; /* media info */ 361 bus_space_handle_t wb_bhandle; 362 bus_space_tag_t wb_btag; | 33 */ 34 35/* 36 * Winbond register definitions. 37 */ 38 39#define WB_BUSCTL 0x00 /* bus control */ 40#define WB_TXSTART 0x04 /* tx start demand */ --- 314 unchanged lines hidden (view full) --- 355#define WB_FLAG_SCHEDDELAY 2 356#define WB_FLAG_DELAYTIMEO 3 357 358struct wb_softc { 359 struct arpcom arpcom; /* interface info */ 360 struct ifmedia ifmedia; /* media info */ 361 bus_space_handle_t wb_bhandle; 362 bus_space_tag_t wb_btag; |
| 363 struct wb_type *wb_info; /* 3Com adapter info */ | 363 struct resource *wb_res; 364 struct resource *wb_irq; 365 void *wb_intrhand; 366 struct wb_type *wb_info; /* Winbond adapter info */ |
| 364 struct wb_type *wb_pinfo; /* phy info */ 365 u_int8_t wb_unit; /* interface number */ 366 u_int8_t wb_type; 367 u_int8_t wb_phy_addr; /* PHY address */ 368 u_int8_t wb_tx_pend; /* TX pending */ 369 u_int8_t wb_want_auto; 370 u_int8_t wb_autoneg; 371 u_int16_t wb_txthresh; --- 218 unchanged lines hidden --- | 367 struct wb_type *wb_pinfo; /* phy info */ 368 u_int8_t wb_unit; /* interface number */ 369 u_int8_t wb_type; 370 u_int8_t wb_phy_addr; /* PHY address */ 371 u_int8_t wb_tx_pend; /* TX pending */ 372 u_int8_t wb_want_auto; 373 u_int8_t wb_autoneg; 374 u_int16_t wb_txthresh; --- 218 unchanged lines hidden --- |