67 68/* 69 * Driver for WinChipHead CH341/340, the worst USB-serial chip in the 70 * world. 71 */ 72 73#include <sys/stdint.h> 74#include <sys/stddef.h> 75#include <sys/param.h> 76#include <sys/queue.h> 77#include <sys/types.h> 78#include <sys/systm.h> 79#include <sys/kernel.h> 80#include <sys/bus.h> 81#include <sys/linker_set.h> 82#include <sys/module.h> 83#include <sys/lock.h> 84#include <sys/mutex.h> 85#include <sys/condvar.h> 86#include <sys/sysctl.h> 87#include <sys/sx.h> 88#include <sys/unistd.h> 89#include <sys/callout.h> 90#include <sys/malloc.h> 91#include <sys/priv.h> 92 93#include <dev/usb/usb.h> 94#include <dev/usb/usbdi.h> 95#include <dev/usb/usbdi_util.h> 96#include "usbdevs.h" 97 98#define USB_DEBUG_VAR uchcom_debug 99#include <dev/usb/usb_debug.h> 100#include <dev/usb/usb_process.h> 101 102#include <dev/usb/serial/usb_serial.h> 103 104#ifdef USB_DEBUG 105static int uchcom_debug = 0; 106 107SYSCTL_NODE(_hw_usb, OID_AUTO, uchcom, CTLFLAG_RW, 0, "USB uchcom"); 108SYSCTL_INT(_hw_usb_uchcom, OID_AUTO, debug, CTLFLAG_RW, 109 &uchcom_debug, 0, "uchcom debug level"); 110#endif 111 112#define UCHCOM_IFACE_INDEX 0 113#define UCHCOM_CONFIG_INDEX 0 114 115#define UCHCOM_REV_CH340 0x0250 116#define UCHCOM_INPUT_BUF_SIZE 8 117 118#define UCHCOM_REQ_GET_VERSION 0x5F 119#define UCHCOM_REQ_READ_REG 0x95 120#define UCHCOM_REQ_WRITE_REG 0x9A 121#define UCHCOM_REQ_RESET 0xA1 122#define UCHCOM_REQ_SET_DTRRTS 0xA4 123 124#define UCHCOM_REG_STAT1 0x06 125#define UCHCOM_REG_STAT2 0x07 126#define UCHCOM_REG_BPS_PRE 0x12 127#define UCHCOM_REG_BPS_DIV 0x13 128#define UCHCOM_REG_BPS_MOD 0x14 129#define UCHCOM_REG_BPS_PAD 0x0F 130#define UCHCOM_REG_BREAK1 0x05 131#define UCHCOM_REG_BREAK2 0x18 132#define UCHCOM_REG_LCR1 0x18 133#define UCHCOM_REG_LCR2 0x25 134 135#define UCHCOM_VER_20 0x20 136 137#define UCHCOM_BASE_UNKNOWN 0 138#define UCHCOM_BPS_MOD_BASE 20000000 139#define UCHCOM_BPS_MOD_BASE_OFS 1100 140 141#define UCHCOM_DTR_MASK 0x20 142#define UCHCOM_RTS_MASK 0x40 143 144#define UCHCOM_BRK1_MASK 0x01 145#define UCHCOM_BRK2_MASK 0x40 146 147#define UCHCOM_LCR1_MASK 0xAF 148#define UCHCOM_LCR2_MASK 0x07 149#define UCHCOM_LCR1_PARENB 0x80 150#define UCHCOM_LCR2_PAREVEN 0x07 151#define UCHCOM_LCR2_PARODD 0x06 152#define UCHCOM_LCR2_PARMARK 0x05 153#define UCHCOM_LCR2_PARSPACE 0x04 154 155#define UCHCOM_INTR_STAT1 0x02 156#define UCHCOM_INTR_STAT2 0x03 157#define UCHCOM_INTR_LEAST 4 158 159#define UCHCOM_BULK_BUF_SIZE 1024 /* bytes */ 160 161enum { 162 UCHCOM_BULK_DT_WR, 163 UCHCOM_BULK_DT_RD, 164 UCHCOM_INTR_DT_RD, 165 UCHCOM_N_TRANSFER, 166}; 167 168struct uchcom_softc { 169 struct ucom_super_softc sc_super_ucom; 170 struct ucom_softc sc_ucom; 171 172 struct usb_xfer *sc_xfer[UCHCOM_N_TRANSFER]; 173 struct usb_device *sc_udev; 174 struct mtx sc_mtx; 175 176 uint8_t sc_dtr; /* local copy */ 177 uint8_t sc_rts; /* local copy */ 178 uint8_t sc_version; 179 uint8_t sc_msr; 180 uint8_t sc_lsr; /* local status register */ 181}; 182 183struct uchcom_divider { 184 uint8_t dv_prescaler; 185 uint8_t dv_div; 186 uint8_t dv_mod; 187}; 188 189struct uchcom_divider_record { 190 uint32_t dvr_high; 191 uint32_t dvr_low; 192 uint32_t dvr_base_clock; 193 struct uchcom_divider dvr_divider; 194}; 195 196static const struct uchcom_divider_record dividers[] = 197{ 198 {307200, 307200, UCHCOM_BASE_UNKNOWN, {7, 0xD9, 0}}, 199 {921600, 921600, UCHCOM_BASE_UNKNOWN, {7, 0xF3, 0}}, 200 {2999999, 23530, 6000000, {3, 0, 0}}, 201 {23529, 2942, 750000, {2, 0, 0}}, 202 {2941, 368, 93750, {1, 0, 0}}, 203 {367, 1, 11719, {0, 0, 0}}, 204}; 205 206#define NUM_DIVIDERS (sizeof (dividers) / sizeof (dividers[0])) 207 208static const struct usb_device_id uchcom_devs[] = { 209 {USB_VPI(USB_VENDOR_WCH, USB_PRODUCT_WCH_CH341SER, 0)}, 210 {USB_VPI(USB_VENDOR_WCH2, USB_PRODUCT_WCH2_CH341SER, 0)}, 211}; 212 213/* protypes */ 214 215static int uchcom_pre_param(struct ucom_softc *, struct termios *); 216static void uchcom_cfg_get_status(struct ucom_softc *, uint8_t *, 217 uint8_t *); 218static void uchcom_cfg_open(struct ucom_softc *ucom); 219static void uchcom_cfg_param(struct ucom_softc *, struct termios *); 220static void uchcom_cfg_set_break(struct ucom_softc *, uint8_t); 221static void uchcom_cfg_set_dtr(struct ucom_softc *, uint8_t); 222static void uchcom_cfg_set_rts(struct ucom_softc *, uint8_t); 223static void uchcom_start_read(struct ucom_softc *); 224static void uchcom_start_write(struct ucom_softc *); 225static void uchcom_stop_read(struct ucom_softc *); 226static void uchcom_stop_write(struct ucom_softc *); 227static void uchcom_update_version(struct uchcom_softc *); 228static void uchcom_convert_status(struct uchcom_softc *, uint8_t); 229static void uchcom_update_status(struct uchcom_softc *); 230static void uchcom_set_dtr_rts(struct uchcom_softc *); 231static int uchcom_calc_divider_settings(struct uchcom_divider *, uint32_t); 232static void uchcom_set_baudrate(struct uchcom_softc *, uint32_t); 233static void uchcom_poll(struct ucom_softc *ucom); 234 235static device_probe_t uchcom_probe; 236static device_attach_t uchcom_attach; 237static device_detach_t uchcom_detach; 238 239static usb_callback_t uchcom_intr_callback; 240static usb_callback_t uchcom_write_callback; 241static usb_callback_t uchcom_read_callback; 242 243static const struct usb_config uchcom_config_data[UCHCOM_N_TRANSFER] = { 244 245 [UCHCOM_BULK_DT_WR] = { 246 .type = UE_BULK, 247 .endpoint = UE_ADDR_ANY, 248 .direction = UE_DIR_OUT, 249 .bufsize = UCHCOM_BULK_BUF_SIZE, 250 .flags = {.pipe_bof = 1,.force_short_xfer = 1,}, 251 .callback = &uchcom_write_callback, 252 }, 253 254 [UCHCOM_BULK_DT_RD] = { 255 .type = UE_BULK, 256 .endpoint = UE_ADDR_ANY, 257 .direction = UE_DIR_IN, 258 .bufsize = UCHCOM_BULK_BUF_SIZE, 259 .flags = {.pipe_bof = 1,.short_xfer_ok = 1,}, 260 .callback = &uchcom_read_callback, 261 }, 262 263 [UCHCOM_INTR_DT_RD] = { 264 .type = UE_INTERRUPT, 265 .endpoint = UE_ADDR_ANY, 266 .direction = UE_DIR_IN, 267 .flags = {.pipe_bof = 1,.short_xfer_ok = 1,}, 268 .bufsize = 0, /* use wMaxPacketSize */ 269 .callback = &uchcom_intr_callback, 270 }, 271}; 272 273static struct ucom_callback uchcom_callback = { 274 .ucom_cfg_get_status = &uchcom_cfg_get_status, 275 .ucom_cfg_set_dtr = &uchcom_cfg_set_dtr, 276 .ucom_cfg_set_rts = &uchcom_cfg_set_rts, 277 .ucom_cfg_set_break = &uchcom_cfg_set_break, 278 .ucom_cfg_open = &uchcom_cfg_open, 279 .ucom_cfg_param = &uchcom_cfg_param, 280 .ucom_pre_param = &uchcom_pre_param, 281 .ucom_start_read = &uchcom_start_read, 282 .ucom_stop_read = &uchcom_stop_read, 283 .ucom_start_write = &uchcom_start_write, 284 .ucom_stop_write = &uchcom_stop_write, 285 .ucom_poll = &uchcom_poll, 286}; 287 288/* ---------------------------------------------------------------------- 289 * driver entry points 290 */ 291 292static int 293uchcom_probe(device_t dev) 294{ 295 struct usb_attach_arg *uaa = device_get_ivars(dev); 296 297 DPRINTFN(11, "\n"); 298 299 if (uaa->usb_mode != USB_MODE_HOST) { 300 return (ENXIO); 301 } 302 if (uaa->info.bConfigIndex != UCHCOM_CONFIG_INDEX) { 303 return (ENXIO); 304 } 305 if (uaa->info.bIfaceIndex != UCHCOM_IFACE_INDEX) { 306 return (ENXIO); 307 } 308 return (usbd_lookup_id_by_uaa(uchcom_devs, sizeof(uchcom_devs), uaa)); 309} 310 311static int 312uchcom_attach(device_t dev) 313{ 314 struct uchcom_softc *sc = device_get_softc(dev); 315 struct usb_attach_arg *uaa = device_get_ivars(dev); 316 int error; 317 uint8_t iface_index; 318 319 DPRINTFN(11, "\n"); 320 321 device_set_usb_desc(dev); 322 mtx_init(&sc->sc_mtx, "uchcom", NULL, MTX_DEF); 323 324 sc->sc_udev = uaa->device; 325 326 switch (uaa->info.bcdDevice) { 327 case UCHCOM_REV_CH340: 328 device_printf(dev, "CH340 detected\n"); 329 break; 330 default: 331 device_printf(dev, "CH341 detected\n"); 332 break; 333 } 334 335 iface_index = UCHCOM_IFACE_INDEX; 336 error = usbd_transfer_setup(uaa->device, 337 &iface_index, sc->sc_xfer, uchcom_config_data, 338 UCHCOM_N_TRANSFER, sc, &sc->sc_mtx); 339 340 if (error) { 341 DPRINTF("one or more missing USB endpoints, " 342 "error=%s\n", usbd_errstr(error)); 343 goto detach; 344 } 345 346 /* clear stall at first run */ 347 mtx_lock(&sc->sc_mtx); 348 usbd_xfer_set_stall(sc->sc_xfer[UCHCOM_BULK_DT_WR]); 349 usbd_xfer_set_stall(sc->sc_xfer[UCHCOM_BULK_DT_RD]); 350 mtx_unlock(&sc->sc_mtx); 351 352 error = ucom_attach(&sc->sc_super_ucom, &sc->sc_ucom, 1, sc, 353 &uchcom_callback, &sc->sc_mtx); 354 if (error) { 355 goto detach; 356 } 357 return (0); 358 359detach: 360 uchcom_detach(dev); 361 return (ENXIO); 362} 363 364static int 365uchcom_detach(device_t dev) 366{ 367 struct uchcom_softc *sc = device_get_softc(dev); 368 369 DPRINTFN(11, "\n"); 370 371 ucom_detach(&sc->sc_super_ucom, &sc->sc_ucom, 1); 372 usbd_transfer_unsetup(sc->sc_xfer, UCHCOM_N_TRANSFER); 373 mtx_destroy(&sc->sc_mtx); 374 375 return (0); 376} 377 378/* ---------------------------------------------------------------------- 379 * low level i/o 380 */ 381 382static void 383uchcom_ctrl_write(struct uchcom_softc *sc, uint8_t reqno, 384 uint16_t value, uint16_t index) 385{ 386 struct usb_device_request req; 387 388 req.bmRequestType = UT_WRITE_VENDOR_DEVICE; 389 req.bRequest = reqno; 390 USETW(req.wValue, value); 391 USETW(req.wIndex, index); 392 USETW(req.wLength, 0); 393 394 ucom_cfg_do_request(sc->sc_udev, 395 &sc->sc_ucom, &req, NULL, 0, 1000); 396} 397 398static void 399uchcom_ctrl_read(struct uchcom_softc *sc, uint8_t reqno, 400 uint16_t value, uint16_t index, void *buf, uint16_t buflen) 401{ 402 struct usb_device_request req; 403 404 req.bmRequestType = UT_READ_VENDOR_DEVICE; 405 req.bRequest = reqno; 406 USETW(req.wValue, value); 407 USETW(req.wIndex, index); 408 USETW(req.wLength, buflen); 409 410 ucom_cfg_do_request(sc->sc_udev, 411 &sc->sc_ucom, &req, buf, USB_SHORT_XFER_OK, 1000); 412} 413 414static void 415uchcom_write_reg(struct uchcom_softc *sc, 416 uint8_t reg1, uint8_t val1, uint8_t reg2, uint8_t val2) 417{ 418 DPRINTF("0x%02X<-0x%02X, 0x%02X<-0x%02X\n", 419 (unsigned)reg1, (unsigned)val1, 420 (unsigned)reg2, (unsigned)val2); 421 uchcom_ctrl_write( 422 sc, UCHCOM_REQ_WRITE_REG, 423 reg1 | ((uint16_t)reg2 << 8), val1 | ((uint16_t)val2 << 8)); 424} 425 426static void 427uchcom_read_reg(struct uchcom_softc *sc, 428 uint8_t reg1, uint8_t *rval1, uint8_t reg2, uint8_t *rval2) 429{ 430 uint8_t buf[UCHCOM_INPUT_BUF_SIZE]; 431 432 uchcom_ctrl_read( 433 sc, UCHCOM_REQ_READ_REG, 434 reg1 | ((uint16_t)reg2 << 8), 0, buf, sizeof(buf)); 435 436 DPRINTF("0x%02X->0x%02X, 0x%02X->0x%02X\n", 437 (unsigned)reg1, (unsigned)buf[0], 438 (unsigned)reg2, (unsigned)buf[1]); 439 440 if (rval1) 441 *rval1 = buf[0]; 442 if (rval2) 443 *rval2 = buf[1]; 444} 445 446static void 447uchcom_get_version(struct uchcom_softc *sc, uint8_t *rver) 448{ 449 uint8_t buf[UCHCOM_INPUT_BUF_SIZE]; 450 451 uchcom_ctrl_read(sc, UCHCOM_REQ_GET_VERSION, 0, 0, buf, sizeof(buf)); 452 453 if (rver) 454 *rver = buf[0]; 455} 456 457static void 458uchcom_get_status(struct uchcom_softc *sc, uint8_t *rval) 459{ 460 uchcom_read_reg(sc, UCHCOM_REG_STAT1, rval, UCHCOM_REG_STAT2, NULL); 461} 462 463static void 464uchcom_set_dtr_rts_10(struct uchcom_softc *sc, uint8_t val) 465{ 466 uchcom_write_reg(sc, UCHCOM_REG_STAT1, val, UCHCOM_REG_STAT1, val); 467} 468 469static void 470uchcom_set_dtr_rts_20(struct uchcom_softc *sc, uint8_t val) 471{ 472 uchcom_ctrl_write(sc, UCHCOM_REQ_SET_DTRRTS, val, 0); 473} 474 475 476/* ---------------------------------------------------------------------- 477 * middle layer 478 */ 479 480static void 481uchcom_update_version(struct uchcom_softc *sc) 482{ 483 uchcom_get_version(sc, &sc->sc_version); 484} 485 486static void 487uchcom_convert_status(struct uchcom_softc *sc, uint8_t cur) 488{ 489 sc->sc_dtr = !(cur & UCHCOM_DTR_MASK); 490 sc->sc_rts = !(cur & UCHCOM_RTS_MASK); 491 492 cur = ~cur & 0x0F; 493 sc->sc_msr = (cur << 4) | ((sc->sc_msr >> 4) ^ cur); 494} 495 496static void 497uchcom_update_status(struct uchcom_softc *sc) 498{ 499 uint8_t cur; 500 501 uchcom_get_status(sc, &cur); 502 uchcom_convert_status(sc, cur); 503} 504 505 506static void 507uchcom_set_dtr_rts(struct uchcom_softc *sc) 508{ 509 uint8_t val = 0; 510 511 if (sc->sc_dtr) 512 val |= UCHCOM_DTR_MASK; 513 if (sc->sc_rts) 514 val |= UCHCOM_RTS_MASK; 515 516 if (sc->sc_version < UCHCOM_VER_20) 517 uchcom_set_dtr_rts_10(sc, ~val); 518 else 519 uchcom_set_dtr_rts_20(sc, ~val); 520} 521 522static void 523uchcom_cfg_set_break(struct ucom_softc *ucom, uint8_t onoff) 524{ 525 struct uchcom_softc *sc = ucom->sc_parent; 526 uint8_t brk1; 527 uint8_t brk2; 528 529 uchcom_read_reg(sc, UCHCOM_REG_BREAK1, &brk1, UCHCOM_REG_BREAK2, &brk2); 530 if (onoff) { 531 /* on - clear bits */ 532 brk1 &= ~UCHCOM_BRK1_MASK; 533 brk2 &= ~UCHCOM_BRK2_MASK; 534 } else { 535 /* off - set bits */ 536 brk1 |= UCHCOM_BRK1_MASK; 537 brk2 |= UCHCOM_BRK2_MASK; 538 } 539 uchcom_write_reg(sc, UCHCOM_REG_BREAK1, brk1, UCHCOM_REG_BREAK2, brk2); 540} 541 542static int 543uchcom_calc_divider_settings(struct uchcom_divider *dp, uint32_t rate) 544{ 545 const struct uchcom_divider_record *rp; 546 uint32_t div; 547 uint32_t rem; 548 uint32_t mod; 549 uint8_t i; 550 551 /* find record */ 552 for (i = 0; i != NUM_DIVIDERS; i++) { 553 if (dividers[i].dvr_high >= rate && 554 dividers[i].dvr_low <= rate) { 555 rp = ÷rs[i]; 556 goto found; 557 } 558 } 559 return (-1); 560 561found: 562 dp->dv_prescaler = rp->dvr_divider.dv_prescaler; 563 if (rp->dvr_base_clock == UCHCOM_BASE_UNKNOWN) 564 dp->dv_div = rp->dvr_divider.dv_div; 565 else { 566 div = rp->dvr_base_clock / rate; 567 rem = rp->dvr_base_clock % rate; 568 if (div == 0 || div >= 0xFF) 569 return (-1); 570 if ((rem << 1) >= rate) 571 div += 1; 572 dp->dv_div = (uint8_t)-div; 573 } 574 575 mod = (UCHCOM_BPS_MOD_BASE / rate) + UCHCOM_BPS_MOD_BASE_OFS; 576 mod = mod + (mod / 2); 577 578 dp->dv_mod = (mod + 0xFF) / 0x100; 579 580 return (0); 581} 582 583static void 584uchcom_set_baudrate(struct uchcom_softc *sc, uint32_t rate) 585{ 586 struct uchcom_divider dv; 587 588 if (uchcom_calc_divider_settings(&dv, rate)) 589 return; 590 591 uchcom_write_reg(sc, 592 UCHCOM_REG_BPS_PRE, dv.dv_prescaler, 593 UCHCOM_REG_BPS_DIV, dv.dv_div); 594 uchcom_write_reg(sc, 595 UCHCOM_REG_BPS_MOD, dv.dv_mod, 596 UCHCOM_REG_BPS_PAD, 0); 597} 598 599/* ---------------------------------------------------------------------- 600 * methods for ucom 601 */ 602static void 603uchcom_cfg_get_status(struct ucom_softc *ucom, uint8_t *lsr, uint8_t *msr) 604{ 605 struct uchcom_softc *sc = ucom->sc_parent; 606 607 DPRINTF("\n"); 608 609 *lsr = sc->sc_lsr; 610 *msr = sc->sc_msr; 611} 612 613static void 614uchcom_cfg_set_dtr(struct ucom_softc *ucom, uint8_t onoff) 615{ 616 struct uchcom_softc *sc = ucom->sc_parent; 617 618 DPRINTF("onoff = %d\n", onoff); 619 620 sc->sc_dtr = onoff; 621 uchcom_set_dtr_rts(sc); 622} 623 624static void 625uchcom_cfg_set_rts(struct ucom_softc *ucom, uint8_t onoff) 626{ 627 struct uchcom_softc *sc = ucom->sc_parent; 628 629 DPRINTF("onoff = %d\n", onoff); 630 631 sc->sc_rts = onoff; 632 uchcom_set_dtr_rts(sc); 633} 634 635static void 636uchcom_cfg_open(struct ucom_softc *ucom) 637{ 638 struct uchcom_softc *sc = ucom->sc_parent; 639 640 DPRINTF("\n"); 641 642 uchcom_update_version(sc); 643 uchcom_update_status(sc); 644} 645 646static int 647uchcom_pre_param(struct ucom_softc *ucom, struct termios *t) 648{ 649 struct uchcom_divider dv; 650 651 switch (t->c_cflag & CSIZE) { 652 case CS8: 653 break; 654 default: 655 return (EIO); 656 } 657 658 if (uchcom_calc_divider_settings(&dv, t->c_ospeed)) { 659 return (EIO); 660 } 661 return (0); /* success */ 662} 663 664static void 665uchcom_cfg_param(struct ucom_softc *ucom, struct termios *t) 666{ 667 struct uchcom_softc *sc = ucom->sc_parent; 668 669 uchcom_get_version(sc, 0); 670 uchcom_ctrl_write(sc, UCHCOM_REQ_RESET, 0, 0); 671 uchcom_set_baudrate(sc, t->c_ospeed); 672 uchcom_read_reg(sc, 0x18, 0, 0x25, 0); 673 uchcom_write_reg(sc, 0x18, 0x50, 0x25, 0x00); 674 uchcom_update_status(sc); 675 uchcom_ctrl_write(sc, UCHCOM_REQ_RESET, 0x501f, 0xd90a); 676 uchcom_set_baudrate(sc, t->c_ospeed); 677 uchcom_set_dtr_rts(sc); 678 uchcom_update_status(sc); 679} 680 681static void 682uchcom_start_read(struct ucom_softc *ucom) 683{ 684 struct uchcom_softc *sc = ucom->sc_parent; 685 686 /* start interrupt endpoint */ 687 usbd_transfer_start(sc->sc_xfer[UCHCOM_INTR_DT_RD]); 688 689 /* start read endpoint */ 690 usbd_transfer_start(sc->sc_xfer[UCHCOM_BULK_DT_RD]); 691} 692 693static void 694uchcom_stop_read(struct ucom_softc *ucom) 695{ 696 struct uchcom_softc *sc = ucom->sc_parent; 697 698 /* stop interrupt endpoint */ 699 usbd_transfer_stop(sc->sc_xfer[UCHCOM_INTR_DT_RD]); 700 701 /* stop read endpoint */ 702 usbd_transfer_stop(sc->sc_xfer[UCHCOM_BULK_DT_RD]); 703} 704 705static void 706uchcom_start_write(struct ucom_softc *ucom) 707{ 708 struct uchcom_softc *sc = ucom->sc_parent; 709 710 usbd_transfer_start(sc->sc_xfer[UCHCOM_BULK_DT_WR]); 711} 712 713static void 714uchcom_stop_write(struct ucom_softc *ucom) 715{ 716 struct uchcom_softc *sc = ucom->sc_parent; 717 718 usbd_transfer_stop(sc->sc_xfer[UCHCOM_BULK_DT_WR]); 719} 720 721/* ---------------------------------------------------------------------- 722 * callback when the modem status is changed. 723 */ 724static void 725uchcom_intr_callback(struct usb_xfer *xfer, usb_error_t error) 726{ 727 struct uchcom_softc *sc = usbd_xfer_softc(xfer); 728 struct usb_page_cache *pc; 729 uint8_t buf[UCHCOM_INTR_LEAST]; 730 int actlen; 731 732 usbd_xfer_status(xfer, &actlen, NULL, NULL, NULL); 733 734 switch (USB_GET_STATE(xfer)) { 735 case USB_ST_TRANSFERRED: 736 737 DPRINTF("actlen = %u\n", actlen); 738 739 if (actlen >= UCHCOM_INTR_LEAST) { 740 pc = usbd_xfer_get_frame(xfer, 0); 741 usbd_copy_out(pc, 0, buf, UCHCOM_INTR_LEAST); 742 743 DPRINTF("data = 0x%02X 0x%02X 0x%02X 0x%02X\n", 744 (unsigned)buf[0], (unsigned)buf[1], 745 (unsigned)buf[2], (unsigned)buf[3]); 746 747 uchcom_convert_status(sc, buf[UCHCOM_INTR_STAT1]); 748 ucom_status_change(&sc->sc_ucom); 749 } 750 case USB_ST_SETUP: 751tr_setup: 752 usbd_xfer_set_frame_len(xfer, 0, usbd_xfer_max_len(xfer)); 753 usbd_transfer_submit(xfer); 754 break; 755 756 default: /* Error */ 757 if (error != USB_ERR_CANCELLED) { 758 /* try to clear stall first */ 759 usbd_xfer_set_stall(xfer); 760 goto tr_setup; 761 } 762 break; 763 } 764} 765 766static void 767uchcom_write_callback(struct usb_xfer *xfer, usb_error_t error) 768{ 769 struct uchcom_softc *sc = usbd_xfer_softc(xfer); 770 struct usb_page_cache *pc; 771 uint32_t actlen; 772 773 switch (USB_GET_STATE(xfer)) { 774 case USB_ST_SETUP: 775 case USB_ST_TRANSFERRED: 776tr_setup: 777 pc = usbd_xfer_get_frame(xfer, 0); 778 if (ucom_get_data(&sc->sc_ucom, pc, 0, 779 usbd_xfer_max_len(xfer), &actlen)) { 780 781 DPRINTF("actlen = %d\n", actlen); 782 783 usbd_xfer_set_frame_len(xfer, 0, actlen); 784 usbd_transfer_submit(xfer); 785 } 786 break; 787 788 default: /* Error */ 789 if (error != USB_ERR_CANCELLED) { 790 /* try to clear stall first */ 791 usbd_xfer_set_stall(xfer); 792 goto tr_setup; 793 } 794 break; 795 } 796} 797 798static void 799uchcom_read_callback(struct usb_xfer *xfer, usb_error_t error) 800{ 801 struct uchcom_softc *sc = usbd_xfer_softc(xfer); 802 struct usb_page_cache *pc; 803 int actlen; 804 805 usbd_xfer_status(xfer, &actlen, NULL, NULL, NULL); 806 807 switch (USB_GET_STATE(xfer)) { 808 case USB_ST_TRANSFERRED: 809 810 if (actlen > 0) { 811 pc = usbd_xfer_get_frame(xfer, 0); 812 ucom_put_data(&sc->sc_ucom, pc, 0, actlen); 813 } 814 815 case USB_ST_SETUP: 816tr_setup: 817 usbd_xfer_set_frame_len(xfer, 0, usbd_xfer_max_len(xfer)); 818 usbd_transfer_submit(xfer); 819 break; 820 821 default: /* Error */ 822 if (error != USB_ERR_CANCELLED) { 823 /* try to clear stall first */ 824 usbd_xfer_set_stall(xfer); 825 goto tr_setup; 826 } 827 break; 828 } 829} 830 831static void 832uchcom_poll(struct ucom_softc *ucom) 833{ 834 struct uchcom_softc *sc = ucom->sc_parent; 835 usbd_transfer_poll(sc->sc_xfer, UCHCOM_N_TRANSFER); 836} 837 838static device_method_t uchcom_methods[] = { 839 /* Device interface */ 840 DEVMETHOD(device_probe, uchcom_probe), 841 DEVMETHOD(device_attach, uchcom_attach), 842 DEVMETHOD(device_detach, uchcom_detach), 843 844 {0, 0} 845}; 846 847static driver_t uchcom_driver = { 848 "ucom", 849 uchcom_methods, 850 sizeof(struct uchcom_softc) 851}; 852 853static devclass_t uchcom_devclass; 854 855DRIVER_MODULE(uchcom, uhub, uchcom_driver, uchcom_devclass, NULL, 0); 856MODULE_DEPEND(uchcom, ucom, 1, 1, 1); 857MODULE_DEPEND(uchcom, usb, 1, 1, 1);
| 67 68/* 69 * Driver for WinChipHead CH341/340, the worst USB-serial chip in the 70 * world. 71 */ 72 73#include <sys/stdint.h> 74#include <sys/stddef.h> 75#include <sys/param.h> 76#include <sys/queue.h> 77#include <sys/types.h> 78#include <sys/systm.h> 79#include <sys/kernel.h> 80#include <sys/bus.h> 81#include <sys/linker_set.h> 82#include <sys/module.h> 83#include <sys/lock.h> 84#include <sys/mutex.h> 85#include <sys/condvar.h> 86#include <sys/sysctl.h> 87#include <sys/sx.h> 88#include <sys/unistd.h> 89#include <sys/callout.h> 90#include <sys/malloc.h> 91#include <sys/priv.h> 92 93#include <dev/usb/usb.h> 94#include <dev/usb/usbdi.h> 95#include <dev/usb/usbdi_util.h> 96#include "usbdevs.h" 97 98#define USB_DEBUG_VAR uchcom_debug 99#include <dev/usb/usb_debug.h> 100#include <dev/usb/usb_process.h> 101 102#include <dev/usb/serial/usb_serial.h> 103 104#ifdef USB_DEBUG 105static int uchcom_debug = 0; 106 107SYSCTL_NODE(_hw_usb, OID_AUTO, uchcom, CTLFLAG_RW, 0, "USB uchcom"); 108SYSCTL_INT(_hw_usb_uchcom, OID_AUTO, debug, CTLFLAG_RW, 109 &uchcom_debug, 0, "uchcom debug level"); 110#endif 111 112#define UCHCOM_IFACE_INDEX 0 113#define UCHCOM_CONFIG_INDEX 0 114 115#define UCHCOM_REV_CH340 0x0250 116#define UCHCOM_INPUT_BUF_SIZE 8 117 118#define UCHCOM_REQ_GET_VERSION 0x5F 119#define UCHCOM_REQ_READ_REG 0x95 120#define UCHCOM_REQ_WRITE_REG 0x9A 121#define UCHCOM_REQ_RESET 0xA1 122#define UCHCOM_REQ_SET_DTRRTS 0xA4 123 124#define UCHCOM_REG_STAT1 0x06 125#define UCHCOM_REG_STAT2 0x07 126#define UCHCOM_REG_BPS_PRE 0x12 127#define UCHCOM_REG_BPS_DIV 0x13 128#define UCHCOM_REG_BPS_MOD 0x14 129#define UCHCOM_REG_BPS_PAD 0x0F 130#define UCHCOM_REG_BREAK1 0x05 131#define UCHCOM_REG_BREAK2 0x18 132#define UCHCOM_REG_LCR1 0x18 133#define UCHCOM_REG_LCR2 0x25 134 135#define UCHCOM_VER_20 0x20 136 137#define UCHCOM_BASE_UNKNOWN 0 138#define UCHCOM_BPS_MOD_BASE 20000000 139#define UCHCOM_BPS_MOD_BASE_OFS 1100 140 141#define UCHCOM_DTR_MASK 0x20 142#define UCHCOM_RTS_MASK 0x40 143 144#define UCHCOM_BRK1_MASK 0x01 145#define UCHCOM_BRK2_MASK 0x40 146 147#define UCHCOM_LCR1_MASK 0xAF 148#define UCHCOM_LCR2_MASK 0x07 149#define UCHCOM_LCR1_PARENB 0x80 150#define UCHCOM_LCR2_PAREVEN 0x07 151#define UCHCOM_LCR2_PARODD 0x06 152#define UCHCOM_LCR2_PARMARK 0x05 153#define UCHCOM_LCR2_PARSPACE 0x04 154 155#define UCHCOM_INTR_STAT1 0x02 156#define UCHCOM_INTR_STAT2 0x03 157#define UCHCOM_INTR_LEAST 4 158 159#define UCHCOM_BULK_BUF_SIZE 1024 /* bytes */ 160 161enum { 162 UCHCOM_BULK_DT_WR, 163 UCHCOM_BULK_DT_RD, 164 UCHCOM_INTR_DT_RD, 165 UCHCOM_N_TRANSFER, 166}; 167 168struct uchcom_softc { 169 struct ucom_super_softc sc_super_ucom; 170 struct ucom_softc sc_ucom; 171 172 struct usb_xfer *sc_xfer[UCHCOM_N_TRANSFER]; 173 struct usb_device *sc_udev; 174 struct mtx sc_mtx; 175 176 uint8_t sc_dtr; /* local copy */ 177 uint8_t sc_rts; /* local copy */ 178 uint8_t sc_version; 179 uint8_t sc_msr; 180 uint8_t sc_lsr; /* local status register */ 181}; 182 183struct uchcom_divider { 184 uint8_t dv_prescaler; 185 uint8_t dv_div; 186 uint8_t dv_mod; 187}; 188 189struct uchcom_divider_record { 190 uint32_t dvr_high; 191 uint32_t dvr_low; 192 uint32_t dvr_base_clock; 193 struct uchcom_divider dvr_divider; 194}; 195 196static const struct uchcom_divider_record dividers[] = 197{ 198 {307200, 307200, UCHCOM_BASE_UNKNOWN, {7, 0xD9, 0}}, 199 {921600, 921600, UCHCOM_BASE_UNKNOWN, {7, 0xF3, 0}}, 200 {2999999, 23530, 6000000, {3, 0, 0}}, 201 {23529, 2942, 750000, {2, 0, 0}}, 202 {2941, 368, 93750, {1, 0, 0}}, 203 {367, 1, 11719, {0, 0, 0}}, 204}; 205 206#define NUM_DIVIDERS (sizeof (dividers) / sizeof (dividers[0])) 207 208static const struct usb_device_id uchcom_devs[] = { 209 {USB_VPI(USB_VENDOR_WCH, USB_PRODUCT_WCH_CH341SER, 0)}, 210 {USB_VPI(USB_VENDOR_WCH2, USB_PRODUCT_WCH2_CH341SER, 0)}, 211}; 212 213/* protypes */ 214 215static int uchcom_pre_param(struct ucom_softc *, struct termios *); 216static void uchcom_cfg_get_status(struct ucom_softc *, uint8_t *, 217 uint8_t *); 218static void uchcom_cfg_open(struct ucom_softc *ucom); 219static void uchcom_cfg_param(struct ucom_softc *, struct termios *); 220static void uchcom_cfg_set_break(struct ucom_softc *, uint8_t); 221static void uchcom_cfg_set_dtr(struct ucom_softc *, uint8_t); 222static void uchcom_cfg_set_rts(struct ucom_softc *, uint8_t); 223static void uchcom_start_read(struct ucom_softc *); 224static void uchcom_start_write(struct ucom_softc *); 225static void uchcom_stop_read(struct ucom_softc *); 226static void uchcom_stop_write(struct ucom_softc *); 227static void uchcom_update_version(struct uchcom_softc *); 228static void uchcom_convert_status(struct uchcom_softc *, uint8_t); 229static void uchcom_update_status(struct uchcom_softc *); 230static void uchcom_set_dtr_rts(struct uchcom_softc *); 231static int uchcom_calc_divider_settings(struct uchcom_divider *, uint32_t); 232static void uchcom_set_baudrate(struct uchcom_softc *, uint32_t); 233static void uchcom_poll(struct ucom_softc *ucom); 234 235static device_probe_t uchcom_probe; 236static device_attach_t uchcom_attach; 237static device_detach_t uchcom_detach; 238 239static usb_callback_t uchcom_intr_callback; 240static usb_callback_t uchcom_write_callback; 241static usb_callback_t uchcom_read_callback; 242 243static const struct usb_config uchcom_config_data[UCHCOM_N_TRANSFER] = { 244 245 [UCHCOM_BULK_DT_WR] = { 246 .type = UE_BULK, 247 .endpoint = UE_ADDR_ANY, 248 .direction = UE_DIR_OUT, 249 .bufsize = UCHCOM_BULK_BUF_SIZE, 250 .flags = {.pipe_bof = 1,.force_short_xfer = 1,}, 251 .callback = &uchcom_write_callback, 252 }, 253 254 [UCHCOM_BULK_DT_RD] = { 255 .type = UE_BULK, 256 .endpoint = UE_ADDR_ANY, 257 .direction = UE_DIR_IN, 258 .bufsize = UCHCOM_BULK_BUF_SIZE, 259 .flags = {.pipe_bof = 1,.short_xfer_ok = 1,}, 260 .callback = &uchcom_read_callback, 261 }, 262 263 [UCHCOM_INTR_DT_RD] = { 264 .type = UE_INTERRUPT, 265 .endpoint = UE_ADDR_ANY, 266 .direction = UE_DIR_IN, 267 .flags = {.pipe_bof = 1,.short_xfer_ok = 1,}, 268 .bufsize = 0, /* use wMaxPacketSize */ 269 .callback = &uchcom_intr_callback, 270 }, 271}; 272 273static struct ucom_callback uchcom_callback = { 274 .ucom_cfg_get_status = &uchcom_cfg_get_status, 275 .ucom_cfg_set_dtr = &uchcom_cfg_set_dtr, 276 .ucom_cfg_set_rts = &uchcom_cfg_set_rts, 277 .ucom_cfg_set_break = &uchcom_cfg_set_break, 278 .ucom_cfg_open = &uchcom_cfg_open, 279 .ucom_cfg_param = &uchcom_cfg_param, 280 .ucom_pre_param = &uchcom_pre_param, 281 .ucom_start_read = &uchcom_start_read, 282 .ucom_stop_read = &uchcom_stop_read, 283 .ucom_start_write = &uchcom_start_write, 284 .ucom_stop_write = &uchcom_stop_write, 285 .ucom_poll = &uchcom_poll, 286}; 287 288/* ---------------------------------------------------------------------- 289 * driver entry points 290 */ 291 292static int 293uchcom_probe(device_t dev) 294{ 295 struct usb_attach_arg *uaa = device_get_ivars(dev); 296 297 DPRINTFN(11, "\n"); 298 299 if (uaa->usb_mode != USB_MODE_HOST) { 300 return (ENXIO); 301 } 302 if (uaa->info.bConfigIndex != UCHCOM_CONFIG_INDEX) { 303 return (ENXIO); 304 } 305 if (uaa->info.bIfaceIndex != UCHCOM_IFACE_INDEX) { 306 return (ENXIO); 307 } 308 return (usbd_lookup_id_by_uaa(uchcom_devs, sizeof(uchcom_devs), uaa)); 309} 310 311static int 312uchcom_attach(device_t dev) 313{ 314 struct uchcom_softc *sc = device_get_softc(dev); 315 struct usb_attach_arg *uaa = device_get_ivars(dev); 316 int error; 317 uint8_t iface_index; 318 319 DPRINTFN(11, "\n"); 320 321 device_set_usb_desc(dev); 322 mtx_init(&sc->sc_mtx, "uchcom", NULL, MTX_DEF); 323 324 sc->sc_udev = uaa->device; 325 326 switch (uaa->info.bcdDevice) { 327 case UCHCOM_REV_CH340: 328 device_printf(dev, "CH340 detected\n"); 329 break; 330 default: 331 device_printf(dev, "CH341 detected\n"); 332 break; 333 } 334 335 iface_index = UCHCOM_IFACE_INDEX; 336 error = usbd_transfer_setup(uaa->device, 337 &iface_index, sc->sc_xfer, uchcom_config_data, 338 UCHCOM_N_TRANSFER, sc, &sc->sc_mtx); 339 340 if (error) { 341 DPRINTF("one or more missing USB endpoints, " 342 "error=%s\n", usbd_errstr(error)); 343 goto detach; 344 } 345 346 /* clear stall at first run */ 347 mtx_lock(&sc->sc_mtx); 348 usbd_xfer_set_stall(sc->sc_xfer[UCHCOM_BULK_DT_WR]); 349 usbd_xfer_set_stall(sc->sc_xfer[UCHCOM_BULK_DT_RD]); 350 mtx_unlock(&sc->sc_mtx); 351 352 error = ucom_attach(&sc->sc_super_ucom, &sc->sc_ucom, 1, sc, 353 &uchcom_callback, &sc->sc_mtx); 354 if (error) { 355 goto detach; 356 } 357 return (0); 358 359detach: 360 uchcom_detach(dev); 361 return (ENXIO); 362} 363 364static int 365uchcom_detach(device_t dev) 366{ 367 struct uchcom_softc *sc = device_get_softc(dev); 368 369 DPRINTFN(11, "\n"); 370 371 ucom_detach(&sc->sc_super_ucom, &sc->sc_ucom, 1); 372 usbd_transfer_unsetup(sc->sc_xfer, UCHCOM_N_TRANSFER); 373 mtx_destroy(&sc->sc_mtx); 374 375 return (0); 376} 377 378/* ---------------------------------------------------------------------- 379 * low level i/o 380 */ 381 382static void 383uchcom_ctrl_write(struct uchcom_softc *sc, uint8_t reqno, 384 uint16_t value, uint16_t index) 385{ 386 struct usb_device_request req; 387 388 req.bmRequestType = UT_WRITE_VENDOR_DEVICE; 389 req.bRequest = reqno; 390 USETW(req.wValue, value); 391 USETW(req.wIndex, index); 392 USETW(req.wLength, 0); 393 394 ucom_cfg_do_request(sc->sc_udev, 395 &sc->sc_ucom, &req, NULL, 0, 1000); 396} 397 398static void 399uchcom_ctrl_read(struct uchcom_softc *sc, uint8_t reqno, 400 uint16_t value, uint16_t index, void *buf, uint16_t buflen) 401{ 402 struct usb_device_request req; 403 404 req.bmRequestType = UT_READ_VENDOR_DEVICE; 405 req.bRequest = reqno; 406 USETW(req.wValue, value); 407 USETW(req.wIndex, index); 408 USETW(req.wLength, buflen); 409 410 ucom_cfg_do_request(sc->sc_udev, 411 &sc->sc_ucom, &req, buf, USB_SHORT_XFER_OK, 1000); 412} 413 414static void 415uchcom_write_reg(struct uchcom_softc *sc, 416 uint8_t reg1, uint8_t val1, uint8_t reg2, uint8_t val2) 417{ 418 DPRINTF("0x%02X<-0x%02X, 0x%02X<-0x%02X\n", 419 (unsigned)reg1, (unsigned)val1, 420 (unsigned)reg2, (unsigned)val2); 421 uchcom_ctrl_write( 422 sc, UCHCOM_REQ_WRITE_REG, 423 reg1 | ((uint16_t)reg2 << 8), val1 | ((uint16_t)val2 << 8)); 424} 425 426static void 427uchcom_read_reg(struct uchcom_softc *sc, 428 uint8_t reg1, uint8_t *rval1, uint8_t reg2, uint8_t *rval2) 429{ 430 uint8_t buf[UCHCOM_INPUT_BUF_SIZE]; 431 432 uchcom_ctrl_read( 433 sc, UCHCOM_REQ_READ_REG, 434 reg1 | ((uint16_t)reg2 << 8), 0, buf, sizeof(buf)); 435 436 DPRINTF("0x%02X->0x%02X, 0x%02X->0x%02X\n", 437 (unsigned)reg1, (unsigned)buf[0], 438 (unsigned)reg2, (unsigned)buf[1]); 439 440 if (rval1) 441 *rval1 = buf[0]; 442 if (rval2) 443 *rval2 = buf[1]; 444} 445 446static void 447uchcom_get_version(struct uchcom_softc *sc, uint8_t *rver) 448{ 449 uint8_t buf[UCHCOM_INPUT_BUF_SIZE]; 450 451 uchcom_ctrl_read(sc, UCHCOM_REQ_GET_VERSION, 0, 0, buf, sizeof(buf)); 452 453 if (rver) 454 *rver = buf[0]; 455} 456 457static void 458uchcom_get_status(struct uchcom_softc *sc, uint8_t *rval) 459{ 460 uchcom_read_reg(sc, UCHCOM_REG_STAT1, rval, UCHCOM_REG_STAT2, NULL); 461} 462 463static void 464uchcom_set_dtr_rts_10(struct uchcom_softc *sc, uint8_t val) 465{ 466 uchcom_write_reg(sc, UCHCOM_REG_STAT1, val, UCHCOM_REG_STAT1, val); 467} 468 469static void 470uchcom_set_dtr_rts_20(struct uchcom_softc *sc, uint8_t val) 471{ 472 uchcom_ctrl_write(sc, UCHCOM_REQ_SET_DTRRTS, val, 0); 473} 474 475 476/* ---------------------------------------------------------------------- 477 * middle layer 478 */ 479 480static void 481uchcom_update_version(struct uchcom_softc *sc) 482{ 483 uchcom_get_version(sc, &sc->sc_version); 484} 485 486static void 487uchcom_convert_status(struct uchcom_softc *sc, uint8_t cur) 488{ 489 sc->sc_dtr = !(cur & UCHCOM_DTR_MASK); 490 sc->sc_rts = !(cur & UCHCOM_RTS_MASK); 491 492 cur = ~cur & 0x0F; 493 sc->sc_msr = (cur << 4) | ((sc->sc_msr >> 4) ^ cur); 494} 495 496static void 497uchcom_update_status(struct uchcom_softc *sc) 498{ 499 uint8_t cur; 500 501 uchcom_get_status(sc, &cur); 502 uchcom_convert_status(sc, cur); 503} 504 505 506static void 507uchcom_set_dtr_rts(struct uchcom_softc *sc) 508{ 509 uint8_t val = 0; 510 511 if (sc->sc_dtr) 512 val |= UCHCOM_DTR_MASK; 513 if (sc->sc_rts) 514 val |= UCHCOM_RTS_MASK; 515 516 if (sc->sc_version < UCHCOM_VER_20) 517 uchcom_set_dtr_rts_10(sc, ~val); 518 else 519 uchcom_set_dtr_rts_20(sc, ~val); 520} 521 522static void 523uchcom_cfg_set_break(struct ucom_softc *ucom, uint8_t onoff) 524{ 525 struct uchcom_softc *sc = ucom->sc_parent; 526 uint8_t brk1; 527 uint8_t brk2; 528 529 uchcom_read_reg(sc, UCHCOM_REG_BREAK1, &brk1, UCHCOM_REG_BREAK2, &brk2); 530 if (onoff) { 531 /* on - clear bits */ 532 brk1 &= ~UCHCOM_BRK1_MASK; 533 brk2 &= ~UCHCOM_BRK2_MASK; 534 } else { 535 /* off - set bits */ 536 brk1 |= UCHCOM_BRK1_MASK; 537 brk2 |= UCHCOM_BRK2_MASK; 538 } 539 uchcom_write_reg(sc, UCHCOM_REG_BREAK1, brk1, UCHCOM_REG_BREAK2, brk2); 540} 541 542static int 543uchcom_calc_divider_settings(struct uchcom_divider *dp, uint32_t rate) 544{ 545 const struct uchcom_divider_record *rp; 546 uint32_t div; 547 uint32_t rem; 548 uint32_t mod; 549 uint8_t i; 550 551 /* find record */ 552 for (i = 0; i != NUM_DIVIDERS; i++) { 553 if (dividers[i].dvr_high >= rate && 554 dividers[i].dvr_low <= rate) { 555 rp = ÷rs[i]; 556 goto found; 557 } 558 } 559 return (-1); 560 561found: 562 dp->dv_prescaler = rp->dvr_divider.dv_prescaler; 563 if (rp->dvr_base_clock == UCHCOM_BASE_UNKNOWN) 564 dp->dv_div = rp->dvr_divider.dv_div; 565 else { 566 div = rp->dvr_base_clock / rate; 567 rem = rp->dvr_base_clock % rate; 568 if (div == 0 || div >= 0xFF) 569 return (-1); 570 if ((rem << 1) >= rate) 571 div += 1; 572 dp->dv_div = (uint8_t)-div; 573 } 574 575 mod = (UCHCOM_BPS_MOD_BASE / rate) + UCHCOM_BPS_MOD_BASE_OFS; 576 mod = mod + (mod / 2); 577 578 dp->dv_mod = (mod + 0xFF) / 0x100; 579 580 return (0); 581} 582 583static void 584uchcom_set_baudrate(struct uchcom_softc *sc, uint32_t rate) 585{ 586 struct uchcom_divider dv; 587 588 if (uchcom_calc_divider_settings(&dv, rate)) 589 return; 590 591 uchcom_write_reg(sc, 592 UCHCOM_REG_BPS_PRE, dv.dv_prescaler, 593 UCHCOM_REG_BPS_DIV, dv.dv_div); 594 uchcom_write_reg(sc, 595 UCHCOM_REG_BPS_MOD, dv.dv_mod, 596 UCHCOM_REG_BPS_PAD, 0); 597} 598 599/* ---------------------------------------------------------------------- 600 * methods for ucom 601 */ 602static void 603uchcom_cfg_get_status(struct ucom_softc *ucom, uint8_t *lsr, uint8_t *msr) 604{ 605 struct uchcom_softc *sc = ucom->sc_parent; 606 607 DPRINTF("\n"); 608 609 *lsr = sc->sc_lsr; 610 *msr = sc->sc_msr; 611} 612 613static void 614uchcom_cfg_set_dtr(struct ucom_softc *ucom, uint8_t onoff) 615{ 616 struct uchcom_softc *sc = ucom->sc_parent; 617 618 DPRINTF("onoff = %d\n", onoff); 619 620 sc->sc_dtr = onoff; 621 uchcom_set_dtr_rts(sc); 622} 623 624static void 625uchcom_cfg_set_rts(struct ucom_softc *ucom, uint8_t onoff) 626{ 627 struct uchcom_softc *sc = ucom->sc_parent; 628 629 DPRINTF("onoff = %d\n", onoff); 630 631 sc->sc_rts = onoff; 632 uchcom_set_dtr_rts(sc); 633} 634 635static void 636uchcom_cfg_open(struct ucom_softc *ucom) 637{ 638 struct uchcom_softc *sc = ucom->sc_parent; 639 640 DPRINTF("\n"); 641 642 uchcom_update_version(sc); 643 uchcom_update_status(sc); 644} 645 646static int 647uchcom_pre_param(struct ucom_softc *ucom, struct termios *t) 648{ 649 struct uchcom_divider dv; 650 651 switch (t->c_cflag & CSIZE) { 652 case CS8: 653 break; 654 default: 655 return (EIO); 656 } 657 658 if (uchcom_calc_divider_settings(&dv, t->c_ospeed)) { 659 return (EIO); 660 } 661 return (0); /* success */ 662} 663 664static void 665uchcom_cfg_param(struct ucom_softc *ucom, struct termios *t) 666{ 667 struct uchcom_softc *sc = ucom->sc_parent; 668 669 uchcom_get_version(sc, 0); 670 uchcom_ctrl_write(sc, UCHCOM_REQ_RESET, 0, 0); 671 uchcom_set_baudrate(sc, t->c_ospeed); 672 uchcom_read_reg(sc, 0x18, 0, 0x25, 0); 673 uchcom_write_reg(sc, 0x18, 0x50, 0x25, 0x00); 674 uchcom_update_status(sc); 675 uchcom_ctrl_write(sc, UCHCOM_REQ_RESET, 0x501f, 0xd90a); 676 uchcom_set_baudrate(sc, t->c_ospeed); 677 uchcom_set_dtr_rts(sc); 678 uchcom_update_status(sc); 679} 680 681static void 682uchcom_start_read(struct ucom_softc *ucom) 683{ 684 struct uchcom_softc *sc = ucom->sc_parent; 685 686 /* start interrupt endpoint */ 687 usbd_transfer_start(sc->sc_xfer[UCHCOM_INTR_DT_RD]); 688 689 /* start read endpoint */ 690 usbd_transfer_start(sc->sc_xfer[UCHCOM_BULK_DT_RD]); 691} 692 693static void 694uchcom_stop_read(struct ucom_softc *ucom) 695{ 696 struct uchcom_softc *sc = ucom->sc_parent; 697 698 /* stop interrupt endpoint */ 699 usbd_transfer_stop(sc->sc_xfer[UCHCOM_INTR_DT_RD]); 700 701 /* stop read endpoint */ 702 usbd_transfer_stop(sc->sc_xfer[UCHCOM_BULK_DT_RD]); 703} 704 705static void 706uchcom_start_write(struct ucom_softc *ucom) 707{ 708 struct uchcom_softc *sc = ucom->sc_parent; 709 710 usbd_transfer_start(sc->sc_xfer[UCHCOM_BULK_DT_WR]); 711} 712 713static void 714uchcom_stop_write(struct ucom_softc *ucom) 715{ 716 struct uchcom_softc *sc = ucom->sc_parent; 717 718 usbd_transfer_stop(sc->sc_xfer[UCHCOM_BULK_DT_WR]); 719} 720 721/* ---------------------------------------------------------------------- 722 * callback when the modem status is changed. 723 */ 724static void 725uchcom_intr_callback(struct usb_xfer *xfer, usb_error_t error) 726{ 727 struct uchcom_softc *sc = usbd_xfer_softc(xfer); 728 struct usb_page_cache *pc; 729 uint8_t buf[UCHCOM_INTR_LEAST]; 730 int actlen; 731 732 usbd_xfer_status(xfer, &actlen, NULL, NULL, NULL); 733 734 switch (USB_GET_STATE(xfer)) { 735 case USB_ST_TRANSFERRED: 736 737 DPRINTF("actlen = %u\n", actlen); 738 739 if (actlen >= UCHCOM_INTR_LEAST) { 740 pc = usbd_xfer_get_frame(xfer, 0); 741 usbd_copy_out(pc, 0, buf, UCHCOM_INTR_LEAST); 742 743 DPRINTF("data = 0x%02X 0x%02X 0x%02X 0x%02X\n", 744 (unsigned)buf[0], (unsigned)buf[1], 745 (unsigned)buf[2], (unsigned)buf[3]); 746 747 uchcom_convert_status(sc, buf[UCHCOM_INTR_STAT1]); 748 ucom_status_change(&sc->sc_ucom); 749 } 750 case USB_ST_SETUP: 751tr_setup: 752 usbd_xfer_set_frame_len(xfer, 0, usbd_xfer_max_len(xfer)); 753 usbd_transfer_submit(xfer); 754 break; 755 756 default: /* Error */ 757 if (error != USB_ERR_CANCELLED) { 758 /* try to clear stall first */ 759 usbd_xfer_set_stall(xfer); 760 goto tr_setup; 761 } 762 break; 763 } 764} 765 766static void 767uchcom_write_callback(struct usb_xfer *xfer, usb_error_t error) 768{ 769 struct uchcom_softc *sc = usbd_xfer_softc(xfer); 770 struct usb_page_cache *pc; 771 uint32_t actlen; 772 773 switch (USB_GET_STATE(xfer)) { 774 case USB_ST_SETUP: 775 case USB_ST_TRANSFERRED: 776tr_setup: 777 pc = usbd_xfer_get_frame(xfer, 0); 778 if (ucom_get_data(&sc->sc_ucom, pc, 0, 779 usbd_xfer_max_len(xfer), &actlen)) { 780 781 DPRINTF("actlen = %d\n", actlen); 782 783 usbd_xfer_set_frame_len(xfer, 0, actlen); 784 usbd_transfer_submit(xfer); 785 } 786 break; 787 788 default: /* Error */ 789 if (error != USB_ERR_CANCELLED) { 790 /* try to clear stall first */ 791 usbd_xfer_set_stall(xfer); 792 goto tr_setup; 793 } 794 break; 795 } 796} 797 798static void 799uchcom_read_callback(struct usb_xfer *xfer, usb_error_t error) 800{ 801 struct uchcom_softc *sc = usbd_xfer_softc(xfer); 802 struct usb_page_cache *pc; 803 int actlen; 804 805 usbd_xfer_status(xfer, &actlen, NULL, NULL, NULL); 806 807 switch (USB_GET_STATE(xfer)) { 808 case USB_ST_TRANSFERRED: 809 810 if (actlen > 0) { 811 pc = usbd_xfer_get_frame(xfer, 0); 812 ucom_put_data(&sc->sc_ucom, pc, 0, actlen); 813 } 814 815 case USB_ST_SETUP: 816tr_setup: 817 usbd_xfer_set_frame_len(xfer, 0, usbd_xfer_max_len(xfer)); 818 usbd_transfer_submit(xfer); 819 break; 820 821 default: /* Error */ 822 if (error != USB_ERR_CANCELLED) { 823 /* try to clear stall first */ 824 usbd_xfer_set_stall(xfer); 825 goto tr_setup; 826 } 827 break; 828 } 829} 830 831static void 832uchcom_poll(struct ucom_softc *ucom) 833{ 834 struct uchcom_softc *sc = ucom->sc_parent; 835 usbd_transfer_poll(sc->sc_xfer, UCHCOM_N_TRANSFER); 836} 837 838static device_method_t uchcom_methods[] = { 839 /* Device interface */ 840 DEVMETHOD(device_probe, uchcom_probe), 841 DEVMETHOD(device_attach, uchcom_attach), 842 DEVMETHOD(device_detach, uchcom_detach), 843 844 {0, 0} 845}; 846 847static driver_t uchcom_driver = { 848 "ucom", 849 uchcom_methods, 850 sizeof(struct uchcom_softc) 851}; 852 853static devclass_t uchcom_devclass; 854 855DRIVER_MODULE(uchcom, uhub, uchcom_driver, uchcom_devclass, NULL, 0); 856MODULE_DEPEND(uchcom, ucom, 1, 1, 1); 857MODULE_DEPEND(uchcom, usb, 1, 1, 1);
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