35
36/*
37 * ASIX Electronics AX88172/AX88178/AX88778 USB 2.0 ethernet driver.
38 * Used in the LinkSys USB200M and various other adapters.
39 *
40 * Manuals available from:
41 * http://www.asix.com.tw/datasheet/mac/Ax88172.PDF
42 * Note: you need the manual for the AX88170 chip (USB 1.x ethernet
43 * controller) to find the definitions for the RX control register.
44 * http://www.asix.com.tw/datasheet/mac/Ax88170.PDF
45 *
46 * Written by Bill Paul <wpaul@windriver.com>
47 * Senior Engineer
48 * Wind River Systems
49 */
50
51/*
52 * The AX88172 provides USB ethernet supports at 10 and 100Mbps.
53 * It uses an external PHY (reference designs use a RealTek chip),
54 * and has a 64-bit multicast hash filter. There is some information
55 * missing from the manual which one needs to know in order to make
56 * the chip function:
57 *
58 * - You must set bit 7 in the RX control register, otherwise the
59 * chip won't receive any packets.
60 * - You must initialize all 3 IPG registers, or you won't be able
61 * to send any packets.
62 *
63 * Note that this device appears to only support loading the station
64 * address via autload from the EEPROM (i.e. there's no way to manaully
65 * set it).
66 *
67 * (Adam Weinberger wanted me to name this driver if_gir.c.)
68 */
69
70/*
71 * Ax88178 and Ax88772 support backported from the OpenBSD driver.
72 * 2007/02/12, J.R. Oldroyd, fbsd@opal.com
73 *
74 * Manual here:
75 * http://www.asix.com.tw/FrootAttach/datasheet/AX88178_datasheet_Rev10.pdf
76 * http://www.asix.com.tw/FrootAttach/datasheet/AX88772_datasheet_Rev10.pdf
77 */
78
79#include <sys/stdint.h>
80#include <sys/stddef.h>
81#include <sys/param.h>
82#include <sys/queue.h>
83#include <sys/types.h>
84#include <sys/systm.h>
85#include <sys/kernel.h>
86#include <sys/bus.h>
87#include <sys/linker_set.h>
88#include <sys/module.h>
89#include <sys/lock.h>
90#include <sys/mutex.h>
91#include <sys/condvar.h>
92#include <sys/sysctl.h>
93#include <sys/sx.h>
94#include <sys/unistd.h>
95#include <sys/callout.h>
96#include <sys/malloc.h>
97#include <sys/priv.h>
98
99#include <dev/usb/usb.h>
100#include <dev/usb/usbdi.h>
101#include <dev/usb/usbdi_util.h>
102#include "usbdevs.h"
103
104#define USB_DEBUG_VAR axe_debug
105#include <dev/usb/usb_debug.h>
106#include <dev/usb/usb_process.h>
107
108#include <dev/usb/net/usb_ethernet.h>
109#include <dev/usb/net/if_axereg.h>
110
111/*
112 * AXE_178_MAX_FRAME_BURST
113 * max frame burst size for Ax88178 and Ax88772
114 * 0 2048 bytes
115 * 1 4096 bytes
116 * 2 8192 bytes
117 * 3 16384 bytes
118 * use the largest your system can handle without USB stalling.
119 *
120 * NB: 88772 parts appear to generate lots of input errors with
121 * a 2K rx buffer and 8K is only slightly faster than 4K on an
122 * EHCI port on a T42 so change at your own risk.
123 */
124#define AXE_178_MAX_FRAME_BURST 1
125
126#ifdef USB_DEBUG
127static int axe_debug = 0;
128
129SYSCTL_NODE(_hw_usb, OID_AUTO, axe, CTLFLAG_RW, 0, "USB axe");
130SYSCTL_INT(_hw_usb_axe, OID_AUTO, debug, CTLFLAG_RW, &axe_debug, 0,
131 "Debug level");
132#endif
133
134/*
135 * Various supported device vendors/products.
136 */
137static const struct usb_device_id axe_devs[] = {
138#define AXE_DEV(v,p,i) { USB_VPI(USB_VENDOR_##v, USB_PRODUCT_##v##_##p, i) }
139 AXE_DEV(ABOCOM, UF200, 0),
140 AXE_DEV(ACERCM, EP1427X2, 0),
141 AXE_DEV(APPLE, ETHERNET, AXE_FLAG_772),
142 AXE_DEV(ASIX, AX88172, 0),
143 AXE_DEV(ASIX, AX88178, AXE_FLAG_178),
144 AXE_DEV(ASIX, AX88772, AXE_FLAG_772),
145 AXE_DEV(ASIX, AX88772A, AXE_FLAG_772),
146 AXE_DEV(ATEN, UC210T, 0),
147 AXE_DEV(BELKIN, F5D5055, AXE_FLAG_178),
148 AXE_DEV(BILLIONTON, USB2AR, 0),
149 AXE_DEV(CISCOLINKSYS, USB200MV2, AXE_FLAG_772),
150 AXE_DEV(COREGA, FETHER_USB2_TX, 0),
151 AXE_DEV(DLINK, DUBE100, 0),
152 AXE_DEV(DLINK, DUBE100B1, AXE_FLAG_772),
153 AXE_DEV(GOODWAY, GWUSB2E, 0),
154 AXE_DEV(IODATA, ETGUS2, AXE_FLAG_178),
155 AXE_DEV(JVC, MP_PRX1, 0),
156 AXE_DEV(LINKSYS2, USB200M, 0),
157 AXE_DEV(LINKSYS4, USB1000, AXE_FLAG_178),
158 AXE_DEV(MELCO, LUAU2KTX, 0),
159 AXE_DEV(NETGEAR, FA120, 0),
160 AXE_DEV(OQO, ETHER01PLUS, AXE_FLAG_772),
161 AXE_DEV(PLANEX3, GU1000T, AXE_FLAG_178),
162 AXE_DEV(SITECOM, LN029, 0),
163 AXE_DEV(SITECOMEU, LN028, AXE_FLAG_178),
164 AXE_DEV(SYSTEMTALKS, SGCX2UL, 0),
165#undef AXE_DEV
166};
167
168static device_probe_t axe_probe;
169static device_attach_t axe_attach;
170static device_detach_t axe_detach;
171
172static usb_callback_t axe_intr_callback;
173static usb_callback_t axe_bulk_read_callback;
174static usb_callback_t axe_bulk_write_callback;
175
176static miibus_readreg_t axe_miibus_readreg;
177static miibus_writereg_t axe_miibus_writereg;
178static miibus_statchg_t axe_miibus_statchg;
179
180static uether_fn_t axe_attach_post;
181static uether_fn_t axe_init;
182static uether_fn_t axe_stop;
183static uether_fn_t axe_start;
184static uether_fn_t axe_tick;
185static uether_fn_t axe_setmulti;
186static uether_fn_t axe_setpromisc;
187
188static int axe_ifmedia_upd(struct ifnet *);
189static void axe_ifmedia_sts(struct ifnet *, struct ifmediareq *);
190static int axe_cmd(struct axe_softc *, int, int, int, void *);
191static void axe_ax88178_init(struct axe_softc *);
192static void axe_ax88772_init(struct axe_softc *);
193static int axe_get_phyno(struct axe_softc *, int);
194
195static const struct usb_config axe_config[AXE_N_TRANSFER] = {
196
197 [AXE_BULK_DT_WR] = {
198 .type = UE_BULK,
199 .endpoint = UE_ADDR_ANY,
200 .direction = UE_DIR_OUT,
201 .bufsize = AXE_BULK_BUF_SIZE,
202 .flags = {.pipe_bof = 1,.force_short_xfer = 1,},
203 .callback = axe_bulk_write_callback,
204 .timeout = 10000, /* 10 seconds */
205 },
206
207 [AXE_BULK_DT_RD] = {
208 .type = UE_BULK,
209 .endpoint = UE_ADDR_ANY,
210 .direction = UE_DIR_IN,
211 .bufsize = 16384, /* bytes */
212 .flags = {.pipe_bof = 1,.short_xfer_ok = 1,},
213 .callback = axe_bulk_read_callback,
214 .timeout = 0, /* no timeout */
215 },
216
217 [AXE_INTR_DT_RD] = {
218 .type = UE_INTERRUPT,
219 .endpoint = UE_ADDR_ANY,
220 .direction = UE_DIR_IN,
221 .flags = {.pipe_bof = 1,.short_xfer_ok = 1,},
222 .bufsize = 0, /* use wMaxPacketSize */
223 .callback = axe_intr_callback,
224 },
225};
226
227static device_method_t axe_methods[] = {
228 /* Device interface */
229 DEVMETHOD(device_probe, axe_probe),
230 DEVMETHOD(device_attach, axe_attach),
231 DEVMETHOD(device_detach, axe_detach),
232
233 /* bus interface */
234 DEVMETHOD(bus_print_child, bus_generic_print_child),
235 DEVMETHOD(bus_driver_added, bus_generic_driver_added),
236
237 /* MII interface */
238 DEVMETHOD(miibus_readreg, axe_miibus_readreg),
239 DEVMETHOD(miibus_writereg, axe_miibus_writereg),
240 DEVMETHOD(miibus_statchg, axe_miibus_statchg),
241
242 {0, 0}
243};
244
245static driver_t axe_driver = {
246 .name = "axe",
247 .methods = axe_methods,
248 .size = sizeof(struct axe_softc),
249};
250
251static devclass_t axe_devclass;
252
253DRIVER_MODULE(axe, uhub, axe_driver, axe_devclass, NULL, 0);
254DRIVER_MODULE(miibus, axe, miibus_driver, miibus_devclass, 0, 0);
255MODULE_DEPEND(axe, uether, 1, 1, 1);
256MODULE_DEPEND(axe, usb, 1, 1, 1);
257MODULE_DEPEND(axe, ether, 1, 1, 1);
258MODULE_DEPEND(axe, miibus, 1, 1, 1);
| 35
36/*
37 * ASIX Electronics AX88172/AX88178/AX88778 USB 2.0 ethernet driver.
38 * Used in the LinkSys USB200M and various other adapters.
39 *
40 * Manuals available from:
41 * http://www.asix.com.tw/datasheet/mac/Ax88172.PDF
42 * Note: you need the manual for the AX88170 chip (USB 1.x ethernet
43 * controller) to find the definitions for the RX control register.
44 * http://www.asix.com.tw/datasheet/mac/Ax88170.PDF
45 *
46 * Written by Bill Paul <wpaul@windriver.com>
47 * Senior Engineer
48 * Wind River Systems
49 */
50
51/*
52 * The AX88172 provides USB ethernet supports at 10 and 100Mbps.
53 * It uses an external PHY (reference designs use a RealTek chip),
54 * and has a 64-bit multicast hash filter. There is some information
55 * missing from the manual which one needs to know in order to make
56 * the chip function:
57 *
58 * - You must set bit 7 in the RX control register, otherwise the
59 * chip won't receive any packets.
60 * - You must initialize all 3 IPG registers, or you won't be able
61 * to send any packets.
62 *
63 * Note that this device appears to only support loading the station
64 * address via autload from the EEPROM (i.e. there's no way to manaully
65 * set it).
66 *
67 * (Adam Weinberger wanted me to name this driver if_gir.c.)
68 */
69
70/*
71 * Ax88178 and Ax88772 support backported from the OpenBSD driver.
72 * 2007/02/12, J.R. Oldroyd, fbsd@opal.com
73 *
74 * Manual here:
75 * http://www.asix.com.tw/FrootAttach/datasheet/AX88178_datasheet_Rev10.pdf
76 * http://www.asix.com.tw/FrootAttach/datasheet/AX88772_datasheet_Rev10.pdf
77 */
78
79#include <sys/stdint.h>
80#include <sys/stddef.h>
81#include <sys/param.h>
82#include <sys/queue.h>
83#include <sys/types.h>
84#include <sys/systm.h>
85#include <sys/kernel.h>
86#include <sys/bus.h>
87#include <sys/linker_set.h>
88#include <sys/module.h>
89#include <sys/lock.h>
90#include <sys/mutex.h>
91#include <sys/condvar.h>
92#include <sys/sysctl.h>
93#include <sys/sx.h>
94#include <sys/unistd.h>
95#include <sys/callout.h>
96#include <sys/malloc.h>
97#include <sys/priv.h>
98
99#include <dev/usb/usb.h>
100#include <dev/usb/usbdi.h>
101#include <dev/usb/usbdi_util.h>
102#include "usbdevs.h"
103
104#define USB_DEBUG_VAR axe_debug
105#include <dev/usb/usb_debug.h>
106#include <dev/usb/usb_process.h>
107
108#include <dev/usb/net/usb_ethernet.h>
109#include <dev/usb/net/if_axereg.h>
110
111/*
112 * AXE_178_MAX_FRAME_BURST
113 * max frame burst size for Ax88178 and Ax88772
114 * 0 2048 bytes
115 * 1 4096 bytes
116 * 2 8192 bytes
117 * 3 16384 bytes
118 * use the largest your system can handle without USB stalling.
119 *
120 * NB: 88772 parts appear to generate lots of input errors with
121 * a 2K rx buffer and 8K is only slightly faster than 4K on an
122 * EHCI port on a T42 so change at your own risk.
123 */
124#define AXE_178_MAX_FRAME_BURST 1
125
126#ifdef USB_DEBUG
127static int axe_debug = 0;
128
129SYSCTL_NODE(_hw_usb, OID_AUTO, axe, CTLFLAG_RW, 0, "USB axe");
130SYSCTL_INT(_hw_usb_axe, OID_AUTO, debug, CTLFLAG_RW, &axe_debug, 0,
131 "Debug level");
132#endif
133
134/*
135 * Various supported device vendors/products.
136 */
137static const struct usb_device_id axe_devs[] = {
138#define AXE_DEV(v,p,i) { USB_VPI(USB_VENDOR_##v, USB_PRODUCT_##v##_##p, i) }
139 AXE_DEV(ABOCOM, UF200, 0),
140 AXE_DEV(ACERCM, EP1427X2, 0),
141 AXE_DEV(APPLE, ETHERNET, AXE_FLAG_772),
142 AXE_DEV(ASIX, AX88172, 0),
143 AXE_DEV(ASIX, AX88178, AXE_FLAG_178),
144 AXE_DEV(ASIX, AX88772, AXE_FLAG_772),
145 AXE_DEV(ASIX, AX88772A, AXE_FLAG_772),
146 AXE_DEV(ATEN, UC210T, 0),
147 AXE_DEV(BELKIN, F5D5055, AXE_FLAG_178),
148 AXE_DEV(BILLIONTON, USB2AR, 0),
149 AXE_DEV(CISCOLINKSYS, USB200MV2, AXE_FLAG_772),
150 AXE_DEV(COREGA, FETHER_USB2_TX, 0),
151 AXE_DEV(DLINK, DUBE100, 0),
152 AXE_DEV(DLINK, DUBE100B1, AXE_FLAG_772),
153 AXE_DEV(GOODWAY, GWUSB2E, 0),
154 AXE_DEV(IODATA, ETGUS2, AXE_FLAG_178),
155 AXE_DEV(JVC, MP_PRX1, 0),
156 AXE_DEV(LINKSYS2, USB200M, 0),
157 AXE_DEV(LINKSYS4, USB1000, AXE_FLAG_178),
158 AXE_DEV(MELCO, LUAU2KTX, 0),
159 AXE_DEV(NETGEAR, FA120, 0),
160 AXE_DEV(OQO, ETHER01PLUS, AXE_FLAG_772),
161 AXE_DEV(PLANEX3, GU1000T, AXE_FLAG_178),
162 AXE_DEV(SITECOM, LN029, 0),
163 AXE_DEV(SITECOMEU, LN028, AXE_FLAG_178),
164 AXE_DEV(SYSTEMTALKS, SGCX2UL, 0),
165#undef AXE_DEV
166};
167
168static device_probe_t axe_probe;
169static device_attach_t axe_attach;
170static device_detach_t axe_detach;
171
172static usb_callback_t axe_intr_callback;
173static usb_callback_t axe_bulk_read_callback;
174static usb_callback_t axe_bulk_write_callback;
175
176static miibus_readreg_t axe_miibus_readreg;
177static miibus_writereg_t axe_miibus_writereg;
178static miibus_statchg_t axe_miibus_statchg;
179
180static uether_fn_t axe_attach_post;
181static uether_fn_t axe_init;
182static uether_fn_t axe_stop;
183static uether_fn_t axe_start;
184static uether_fn_t axe_tick;
185static uether_fn_t axe_setmulti;
186static uether_fn_t axe_setpromisc;
187
188static int axe_ifmedia_upd(struct ifnet *);
189static void axe_ifmedia_sts(struct ifnet *, struct ifmediareq *);
190static int axe_cmd(struct axe_softc *, int, int, int, void *);
191static void axe_ax88178_init(struct axe_softc *);
192static void axe_ax88772_init(struct axe_softc *);
193static int axe_get_phyno(struct axe_softc *, int);
194
195static const struct usb_config axe_config[AXE_N_TRANSFER] = {
196
197 [AXE_BULK_DT_WR] = {
198 .type = UE_BULK,
199 .endpoint = UE_ADDR_ANY,
200 .direction = UE_DIR_OUT,
201 .bufsize = AXE_BULK_BUF_SIZE,
202 .flags = {.pipe_bof = 1,.force_short_xfer = 1,},
203 .callback = axe_bulk_write_callback,
204 .timeout = 10000, /* 10 seconds */
205 },
206
207 [AXE_BULK_DT_RD] = {
208 .type = UE_BULK,
209 .endpoint = UE_ADDR_ANY,
210 .direction = UE_DIR_IN,
211 .bufsize = 16384, /* bytes */
212 .flags = {.pipe_bof = 1,.short_xfer_ok = 1,},
213 .callback = axe_bulk_read_callback,
214 .timeout = 0, /* no timeout */
215 },
216
217 [AXE_INTR_DT_RD] = {
218 .type = UE_INTERRUPT,
219 .endpoint = UE_ADDR_ANY,
220 .direction = UE_DIR_IN,
221 .flags = {.pipe_bof = 1,.short_xfer_ok = 1,},
222 .bufsize = 0, /* use wMaxPacketSize */
223 .callback = axe_intr_callback,
224 },
225};
226
227static device_method_t axe_methods[] = {
228 /* Device interface */
229 DEVMETHOD(device_probe, axe_probe),
230 DEVMETHOD(device_attach, axe_attach),
231 DEVMETHOD(device_detach, axe_detach),
232
233 /* bus interface */
234 DEVMETHOD(bus_print_child, bus_generic_print_child),
235 DEVMETHOD(bus_driver_added, bus_generic_driver_added),
236
237 /* MII interface */
238 DEVMETHOD(miibus_readreg, axe_miibus_readreg),
239 DEVMETHOD(miibus_writereg, axe_miibus_writereg),
240 DEVMETHOD(miibus_statchg, axe_miibus_statchg),
241
242 {0, 0}
243};
244
245static driver_t axe_driver = {
246 .name = "axe",
247 .methods = axe_methods,
248 .size = sizeof(struct axe_softc),
249};
250
251static devclass_t axe_devclass;
252
253DRIVER_MODULE(axe, uhub, axe_driver, axe_devclass, NULL, 0);
254DRIVER_MODULE(miibus, axe, miibus_driver, miibus_devclass, 0, 0);
255MODULE_DEPEND(axe, uether, 1, 1, 1);
256MODULE_DEPEND(axe, usb, 1, 1, 1);
257MODULE_DEPEND(axe, ether, 1, 1, 1);
258MODULE_DEPEND(axe, miibus, 1, 1, 1);
|
259
260static const struct usb_ether_methods axe_ue_methods = {
261 .ue_attach_post = axe_attach_post,
262 .ue_start = axe_start,
263 .ue_init = axe_init,
264 .ue_stop = axe_stop,
265 .ue_tick = axe_tick,
266 .ue_setmulti = axe_setmulti,
267 .ue_setpromisc = axe_setpromisc,
268 .ue_mii_upd = axe_ifmedia_upd,
269 .ue_mii_sts = axe_ifmedia_sts,
270};
271
272static int
273axe_cmd(struct axe_softc *sc, int cmd, int index, int val, void *buf)
274{
275 struct usb_device_request req;
276 usb_error_t err;
277
278 AXE_LOCK_ASSERT(sc, MA_OWNED);
279
280 req.bmRequestType = (AXE_CMD_IS_WRITE(cmd) ?
281 UT_WRITE_VENDOR_DEVICE :
282 UT_READ_VENDOR_DEVICE);
283 req.bRequest = AXE_CMD_CMD(cmd);
284 USETW(req.wValue, val);
285 USETW(req.wIndex, index);
286 USETW(req.wLength, AXE_CMD_LEN(cmd));
287
288 err = uether_do_request(&sc->sc_ue, &req, buf, 1000);
289
290 return (err);
291}
292
293static int
294axe_miibus_readreg(device_t dev, int phy, int reg)
295{
296 struct axe_softc *sc = device_get_softc(dev);
297 uint16_t val;
298 int locked;
299
300 if (sc->sc_phyno != phy)
301 return (0);
302
303 locked = mtx_owned(&sc->sc_mtx);
304 if (!locked)
305 AXE_LOCK(sc);
306
307 axe_cmd(sc, AXE_CMD_MII_OPMODE_SW, 0, 0, NULL);
308 axe_cmd(sc, AXE_CMD_MII_READ_REG, reg, phy, &val);
309 axe_cmd(sc, AXE_CMD_MII_OPMODE_HW, 0, 0, NULL);
310
311 val = le16toh(val);
312 if ((sc->sc_flags & AXE_FLAG_772) != 0 && reg == MII_BMSR) {
313 /*
314 * BMSR of AX88772 indicates that it supports extended
315 * capability but the extended status register is
316 * revered for embedded ethernet PHY. So clear the
317 * extended capability bit of BMSR.
318 */
319 val &= ~BMSR_EXTCAP;
320 }
321
322 if (!locked)
323 AXE_UNLOCK(sc);
324 return (val);
325}
326
327static int
328axe_miibus_writereg(device_t dev, int phy, int reg, int val)
329{
330 struct axe_softc *sc = device_get_softc(dev);
331 int locked;
332
333 val = htole32(val);
334
335 if (sc->sc_phyno != phy)
336 return (0);
337
338 locked = mtx_owned(&sc->sc_mtx);
339 if (!locked)
340 AXE_LOCK(sc);
341
342 axe_cmd(sc, AXE_CMD_MII_OPMODE_SW, 0, 0, NULL);
343 axe_cmd(sc, AXE_CMD_MII_WRITE_REG, reg, phy, &val);
344 axe_cmd(sc, AXE_CMD_MII_OPMODE_HW, 0, 0, NULL);
345
346 if (!locked)
347 AXE_UNLOCK(sc);
348 return (0);
349}
350
351static void
352axe_miibus_statchg(device_t dev)
353{
354 struct axe_softc *sc = device_get_softc(dev);
355 struct mii_data *mii = GET_MII(sc);
356 struct ifnet *ifp;
357 uint16_t val;
358 int err, locked;
359
360 locked = mtx_owned(&sc->sc_mtx);
361 if (!locked)
362 AXE_LOCK(sc);
363
364 ifp = uether_getifp(&sc->sc_ue);
365 if (mii == NULL || ifp == NULL ||
366 (ifp->if_drv_flags & IFF_DRV_RUNNING) == 0)
367 goto done;
368
369 sc->sc_flags &= ~AXE_FLAG_LINK;
370 if ((mii->mii_media_status & (IFM_ACTIVE | IFM_AVALID)) ==
371 (IFM_ACTIVE | IFM_AVALID)) {
372 switch (IFM_SUBTYPE(mii->mii_media_active)) {
373 case IFM_10_T:
374 case IFM_100_TX:
375 sc->sc_flags |= AXE_FLAG_LINK;
376 break;
377 case IFM_1000_T:
378 if ((sc->sc_flags & AXE_FLAG_178) == 0)
379 break;
380 sc->sc_flags |= AXE_FLAG_LINK;
381 break;
382 default:
383 break;
384 }
385 }
386
387 /* Lost link, do nothing. */
388 if ((sc->sc_flags & AXE_FLAG_LINK) == 0)
389 goto done;
390
391 val = 0;
392 if ((IFM_OPTIONS(mii->mii_media_active) & IFM_FDX) != 0)
393 val |= AXE_MEDIA_FULL_DUPLEX;
394 if (sc->sc_flags & (AXE_FLAG_178 | AXE_FLAG_772)) {
395 val |= AXE_178_MEDIA_RX_EN | AXE_178_MEDIA_MAGIC;
396 if ((sc->sc_flags & AXE_FLAG_178) != 0)
397 val |= AXE_178_MEDIA_ENCK;
398 switch (IFM_SUBTYPE(mii->mii_media_active)) {
399 case IFM_1000_T:
400 val |= AXE_178_MEDIA_GMII | AXE_178_MEDIA_ENCK;
401 break;
402 case IFM_100_TX:
403 val |= AXE_178_MEDIA_100TX;
404 break;
405 case IFM_10_T:
406 /* doesn't need to be handled */
407 break;
408 }
409 }
410 err = axe_cmd(sc, AXE_CMD_WRITE_MEDIA, 0, val, NULL);
411 if (err)
412 device_printf(dev, "media change failed, error %d\n", err);
413done:
414 if (!locked)
415 AXE_UNLOCK(sc);
416}
417
418/*
419 * Set media options.
420 */
421static int
422axe_ifmedia_upd(struct ifnet *ifp)
423{
424 struct axe_softc *sc = ifp->if_softc;
425 struct mii_data *mii = GET_MII(sc);
426 int error;
427
428 AXE_LOCK_ASSERT(sc, MA_OWNED);
429
430 if (mii->mii_instance) {
431 struct mii_softc *miisc;
432
433 LIST_FOREACH(miisc, &mii->mii_phys, mii_list)
434 mii_phy_reset(miisc);
435 }
436 error = mii_mediachg(mii);
437 return (error);
438}
439
440/*
441 * Report current media status.
442 */
443static void
444axe_ifmedia_sts(struct ifnet *ifp, struct ifmediareq *ifmr)
445{
446 struct axe_softc *sc = ifp->if_softc;
447 struct mii_data *mii = GET_MII(sc);
448
449 AXE_LOCK(sc);
450 mii_pollstat(mii);
451 AXE_UNLOCK(sc);
452 ifmr->ifm_active = mii->mii_media_active;
453 ifmr->ifm_status = mii->mii_media_status;
454}
455
456static void
457axe_setmulti(struct usb_ether *ue)
458{
459 struct axe_softc *sc = uether_getsc(ue);
460 struct ifnet *ifp = uether_getifp(ue);
461 struct ifmultiaddr *ifma;
462 uint32_t h = 0;
463 uint16_t rxmode;
464 uint8_t hashtbl[8] = { 0, 0, 0, 0, 0, 0, 0, 0 };
465
466 AXE_LOCK_ASSERT(sc, MA_OWNED);
467
468 axe_cmd(sc, AXE_CMD_RXCTL_READ, 0, 0, &rxmode);
469 rxmode = le16toh(rxmode);
470
471 if (ifp->if_flags & (IFF_ALLMULTI | IFF_PROMISC)) {
472 rxmode |= AXE_RXCMD_ALLMULTI;
473 axe_cmd(sc, AXE_CMD_RXCTL_WRITE, 0, rxmode, NULL);
474 return;
475 }
476 rxmode &= ~AXE_RXCMD_ALLMULTI;
477
478 if_maddr_rlock(ifp);
479 TAILQ_FOREACH(ifma, &ifp->if_multiaddrs, ifma_link)
480 {
481 if (ifma->ifma_addr->sa_family != AF_LINK)
482 continue;
483 h = ether_crc32_be(LLADDR((struct sockaddr_dl *)
484 ifma->ifma_addr), ETHER_ADDR_LEN) >> 26;
485 hashtbl[h / 8] |= 1 << (h % 8);
486 }
487 if_maddr_runlock(ifp);
488
489 axe_cmd(sc, AXE_CMD_WRITE_MCAST, 0, 0, (void *)&hashtbl);
490 axe_cmd(sc, AXE_CMD_RXCTL_WRITE, 0, rxmode, NULL);
491}
492
493static int
494axe_get_phyno(struct axe_softc *sc, int sel)
495{
496 int phyno;
497
498 switch (AXE_PHY_TYPE(sc->sc_phyaddrs[sel])) {
499 case PHY_TYPE_100_HOME:
500 case PHY_TYPE_GIG:
501 phyno = AXE_PHY_NO(sc->sc_phyaddrs[sel]);
502 break;
503 case PHY_TYPE_SPECIAL:
504 /* FALLTHROUGH */
505 case PHY_TYPE_RSVD:
506 /* FALLTHROUGH */
507 case PHY_TYPE_NON_SUP:
508 /* FALLTHROUGH */
509 default:
510 phyno = -1;
511 break;
512 }
513
514 return (phyno);
515}
516
517static void
518axe_ax88178_init(struct axe_softc *sc)
519{
520 int gpio0 = 0, phymode = 0;
521 uint16_t eeprom;
522
523 axe_cmd(sc, AXE_CMD_SROM_WR_ENABLE, 0, 0, NULL);
524 /* XXX magic */
525 axe_cmd(sc, AXE_CMD_SROM_READ, 0, 0x0017, &eeprom);
526 eeprom = le16toh(eeprom);
527 axe_cmd(sc, AXE_CMD_SROM_WR_DISABLE, 0, 0, NULL);
528
529 /* if EEPROM is invalid we have to use to GPIO0 */
530 if (eeprom == 0xffff) {
531 phymode = 0;
532 gpio0 = 1;
533 } else {
534 phymode = eeprom & 7;
535 gpio0 = (eeprom & 0x80) ? 0 : 1;
536 }
537
538 axe_cmd(sc, AXE_CMD_WRITE_GPIO, 0, 0x008c, NULL);
539 uether_pause(&sc->sc_ue, hz / 16);
540
541 if ((eeprom >> 8) != 0x01) {
542 axe_cmd(sc, AXE_CMD_WRITE_GPIO, 0, 0x003c, NULL);
543 uether_pause(&sc->sc_ue, hz / 32);
544
545 axe_cmd(sc, AXE_CMD_WRITE_GPIO, 0, 0x001c, NULL);
546 uether_pause(&sc->sc_ue, hz / 3);
547
548 axe_cmd(sc, AXE_CMD_WRITE_GPIO, 0, 0x003c, NULL);
549 uether_pause(&sc->sc_ue, hz / 32);
550 } else {
551 axe_cmd(sc, AXE_CMD_WRITE_GPIO, 0, 0x0004, NULL);
552 uether_pause(&sc->sc_ue, hz / 32);
553
554 axe_cmd(sc, AXE_CMD_WRITE_GPIO, 0, 0x000c, NULL);
555 uether_pause(&sc->sc_ue, hz / 32);
556 }
557
558 /* soft reset */
559 axe_cmd(sc, AXE_CMD_SW_RESET_REG, 0, AXE_SW_RESET_CLEAR, NULL);
560 uether_pause(&sc->sc_ue, hz / 4);
561
562 axe_cmd(sc, AXE_CMD_SW_RESET_REG, 0,
563 AXE_SW_RESET_PRL | AXE_178_RESET_MAGIC, NULL);
564 uether_pause(&sc->sc_ue, hz / 4);
565 /* Enable MII/GMII/RGMII interface to work with external PHY. */
566 axe_cmd(sc, AXE_CMD_SW_PHY_SELECT, 0, 0, NULL);
567 uether_pause(&sc->sc_ue, hz / 4);
568
569 axe_cmd(sc, AXE_CMD_RXCTL_WRITE, 0, 0, NULL);
570}
571
572static void
573axe_ax88772_init(struct axe_softc *sc)
574{
575 axe_cmd(sc, AXE_CMD_WRITE_GPIO, 0, 0x00b0, NULL);
576 uether_pause(&sc->sc_ue, hz / 16);
577
578 if (sc->sc_phyno == AXE_772_PHY_NO_EPHY) {
579 /* ask for the embedded PHY */
580 axe_cmd(sc, AXE_CMD_SW_PHY_SELECT, 0, 0x01, NULL);
581 uether_pause(&sc->sc_ue, hz / 64);
582
583 /* power down and reset state, pin reset state */
584 axe_cmd(sc, AXE_CMD_SW_RESET_REG, 0,
585 AXE_SW_RESET_CLEAR, NULL);
586 uether_pause(&sc->sc_ue, hz / 16);
587
588 /* power down/reset state, pin operating state */
589 axe_cmd(sc, AXE_CMD_SW_RESET_REG, 0,
590 AXE_SW_RESET_IPPD | AXE_SW_RESET_PRL, NULL);
591 uether_pause(&sc->sc_ue, hz / 4);
592
593 /* power up, reset */
594 axe_cmd(sc, AXE_CMD_SW_RESET_REG, 0, AXE_SW_RESET_PRL, NULL);
595
596 /* power up, operating */
597 axe_cmd(sc, AXE_CMD_SW_RESET_REG, 0,
598 AXE_SW_RESET_IPRL | AXE_SW_RESET_PRL, NULL);
599 } else {
600 /* ask for external PHY */
601 axe_cmd(sc, AXE_CMD_SW_PHY_SELECT, 0, 0x00, NULL);
602 uether_pause(&sc->sc_ue, hz / 64);
603
604 /* power down internal PHY */
605 axe_cmd(sc, AXE_CMD_SW_RESET_REG, 0,
606 AXE_SW_RESET_IPPD | AXE_SW_RESET_PRL, NULL);
607 }
608
609 uether_pause(&sc->sc_ue, hz / 4);
610 axe_cmd(sc, AXE_CMD_RXCTL_WRITE, 0, 0, NULL);
611}
612
613static void
614axe_reset(struct axe_softc *sc)
615{
616 struct usb_config_descriptor *cd;
617 usb_error_t err;
618
619 cd = usbd_get_config_descriptor(sc->sc_ue.ue_udev);
620
621 err = usbd_req_set_config(sc->sc_ue.ue_udev, &sc->sc_mtx,
622 cd->bConfigurationValue);
623 if (err)
624 DPRINTF("reset failed (ignored)\n");
625
626 /* Wait a little while for the chip to get its brains in order. */
627 uether_pause(&sc->sc_ue, hz / 100);
628}
629
630static void
631axe_attach_post(struct usb_ether *ue)
632{
633 struct axe_softc *sc = uether_getsc(ue);
634
635 /*
636 * Load PHY indexes first. Needed by axe_xxx_init().
637 */
638 axe_cmd(sc, AXE_CMD_READ_PHYID, 0, 0, sc->sc_phyaddrs);
639#if 1
640 device_printf(sc->sc_ue.ue_dev, "PHYADDR 0x%02x:0x%02x\n",
641 sc->sc_phyaddrs[0], sc->sc_phyaddrs[1]);
642#endif
643 sc->sc_phyno = axe_get_phyno(sc, AXE_PHY_SEL_PRI);
644 if (sc->sc_phyno == -1)
645 sc->sc_phyno = axe_get_phyno(sc, AXE_PHY_SEL_SEC);
646 if (sc->sc_phyno == -1) {
647 device_printf(sc->sc_ue.ue_dev,
648 "no valid PHY address found, assuming PHY address 0\n");
649 sc->sc_phyno = 0;
650 }
651
652 if (sc->sc_flags & AXE_FLAG_178)
653 axe_ax88178_init(sc);
654 else if (sc->sc_flags & AXE_FLAG_772)
655 axe_ax88772_init(sc);
656
657 /*
658 * Get station address.
659 */
660 if (sc->sc_flags & (AXE_FLAG_178 | AXE_FLAG_772))
661 axe_cmd(sc, AXE_178_CMD_READ_NODEID, 0, 0, ue->ue_eaddr);
662 else
663 axe_cmd(sc, AXE_172_CMD_READ_NODEID, 0, 0, ue->ue_eaddr);
664
665 /*
666 * Fetch IPG values.
667 */
668 axe_cmd(sc, AXE_CMD_READ_IPG012, 0, 0, sc->sc_ipgs);
669}
670
671/*
672 * Probe for a AX88172 chip.
673 */
674static int
675axe_probe(device_t dev)
676{
677 struct usb_attach_arg *uaa = device_get_ivars(dev);
678
679 if (uaa->usb_mode != USB_MODE_HOST)
680 return (ENXIO);
681 if (uaa->info.bConfigIndex != AXE_CONFIG_IDX)
682 return (ENXIO);
683 if (uaa->info.bIfaceIndex != AXE_IFACE_IDX)
684 return (ENXIO);
685
686 return (usbd_lookup_id_by_uaa(axe_devs, sizeof(axe_devs), uaa));
687}
688
689/*
690 * Attach the interface. Allocate softc structures, do ifmedia
691 * setup and ethernet/BPF attach.
692 */
693static int
694axe_attach(device_t dev)
695{
696 struct usb_attach_arg *uaa = device_get_ivars(dev);
697 struct axe_softc *sc = device_get_softc(dev);
698 struct usb_ether *ue = &sc->sc_ue;
699 uint8_t iface_index;
700 int error;
701
702 sc->sc_flags = USB_GET_DRIVER_INFO(uaa);
703
704 device_set_usb_desc(dev);
705
706 mtx_init(&sc->sc_mtx, device_get_nameunit(dev), NULL, MTX_DEF);
707
708 iface_index = AXE_IFACE_IDX;
709 error = usbd_transfer_setup(uaa->device, &iface_index, sc->sc_xfer,
710 axe_config, AXE_N_TRANSFER, sc, &sc->sc_mtx);
711 if (error) {
712 device_printf(dev, "allocating USB transfers failed\n");
713 goto detach;
714 }
715
716 ue->ue_sc = sc;
717 ue->ue_dev = dev;
718 ue->ue_udev = uaa->device;
719 ue->ue_mtx = &sc->sc_mtx;
720 ue->ue_methods = &axe_ue_methods;
721
722 error = uether_ifattach(ue);
723 if (error) {
724 device_printf(dev, "could not attach interface\n");
725 goto detach;
726 }
727 return (0); /* success */
728
729detach:
730 axe_detach(dev);
731 return (ENXIO); /* failure */
732}
733
734static int
735axe_detach(device_t dev)
736{
737 struct axe_softc *sc = device_get_softc(dev);
738 struct usb_ether *ue = &sc->sc_ue;
739
740 usbd_transfer_unsetup(sc->sc_xfer, AXE_N_TRANSFER);
741 uether_ifdetach(ue);
742 mtx_destroy(&sc->sc_mtx);
743
744 return (0);
745}
746
747static void
748axe_intr_callback(struct usb_xfer *xfer, usb_error_t error)
749{
750 switch (USB_GET_STATE(xfer)) {
751 case USB_ST_TRANSFERRED:
752 case USB_ST_SETUP:
753tr_setup:
754 usbd_xfer_set_frame_len(xfer, 0, usbd_xfer_max_len(xfer));
755 usbd_transfer_submit(xfer);
756 return;
757
758 default: /* Error */
759 if (error != USB_ERR_CANCELLED) {
760 /* try to clear stall first */
761 usbd_xfer_set_stall(xfer);
762 goto tr_setup;
763 }
764 return;
765 }
766}
767
768#if (AXE_BULK_BUF_SIZE >= 0x10000)
769#error "Please update axe_bulk_read_callback()!"
770#endif
771
772static void
773axe_bulk_read_callback(struct usb_xfer *xfer, usb_error_t error)
774{
775 struct axe_softc *sc = usbd_xfer_softc(xfer);
776 struct usb_ether *ue = &sc->sc_ue;
777 struct ifnet *ifp = uether_getifp(ue);
778 struct axe_sframe_hdr hdr;
779 struct usb_page_cache *pc;
780 int err, pos, len;
781 int actlen;
782
783 usbd_xfer_status(xfer, &actlen, NULL, NULL, NULL);
784
785 switch (USB_GET_STATE(xfer)) {
786 case USB_ST_TRANSFERRED:
787 pos = 0;
788 len = 0;
789 err = 0;
790
791 pc = usbd_xfer_get_frame(xfer, 0);
792 if (sc->sc_flags & (AXE_FLAG_772 | AXE_FLAG_178)) {
793 while (pos < actlen) {
794 if ((pos + sizeof(hdr)) > actlen) {
795 /* too little data */
796 err = EINVAL;
797 break;
798 }
799 usbd_copy_out(pc, pos, &hdr, sizeof(hdr));
800
801 if ((hdr.len ^ hdr.ilen) != 0xFFFF) {
802 /* we lost sync */
803 err = EINVAL;
804 break;
805 }
806 pos += sizeof(hdr);
807
808 len = le16toh(hdr.len);
809 if ((pos + len) > actlen) {
810 /* invalid length */
811 err = EINVAL;
812 break;
813 }
814 err = uether_rxbuf(ue, pc, pos, len);
815
816 pos += len + (len % 2);
817 }
818 } else {
819 err = uether_rxbuf(ue, pc, 0, actlen);
820 }
821
822 if (err != 0)
823 ifp->if_ierrors++;
824
825 /* FALLTHROUGH */
826 case USB_ST_SETUP:
827tr_setup:
828 usbd_xfer_set_frame_len(xfer, 0, usbd_xfer_max_len(xfer));
829 usbd_transfer_submit(xfer);
830 uether_rxflush(ue);
831 return;
832
833 default: /* Error */
834 DPRINTF("bulk read error, %s\n", usbd_errstr(error));
835
836 if (error != USB_ERR_CANCELLED) {
837 /* try to clear stall first */
838 usbd_xfer_set_stall(xfer);
839 goto tr_setup;
840 }
841 return;
842
843 }
844}
845
846#if ((AXE_BULK_BUF_SIZE >= 0x10000) || (AXE_BULK_BUF_SIZE < (MCLBYTES+4)))
847#error "Please update axe_bulk_write_callback()!"
848#endif
849
850static void
851axe_bulk_write_callback(struct usb_xfer *xfer, usb_error_t error)
852{
853 struct axe_softc *sc = usbd_xfer_softc(xfer);
854 struct axe_sframe_hdr hdr;
855 struct ifnet *ifp = uether_getifp(&sc->sc_ue);
856 struct usb_page_cache *pc;
857 struct mbuf *m;
858 int pos;
859
860 switch (USB_GET_STATE(xfer)) {
861 case USB_ST_TRANSFERRED:
862 DPRINTFN(11, "transfer complete\n");
863 ifp->if_opackets++;
864 /* FALLTHROUGH */
865 case USB_ST_SETUP:
866tr_setup:
867 if ((sc->sc_flags & AXE_FLAG_LINK) == 0) {
868 /*
869 * don't send anything if there is no link !
870 */
871 return;
872 }
873 pos = 0;
874 pc = usbd_xfer_get_frame(xfer, 0);
875
876 while (1) {
877
878 IFQ_DRV_DEQUEUE(&ifp->if_snd, m);
879
880 if (m == NULL) {
881 if (pos > 0)
882 break; /* send out data */
883 return;
884 }
885 if (m->m_pkthdr.len > MCLBYTES) {
886 m->m_pkthdr.len = MCLBYTES;
887 }
888 if (sc->sc_flags & (AXE_FLAG_772 | AXE_FLAG_178)) {
889
890 hdr.len = htole16(m->m_pkthdr.len);
891 hdr.ilen = ~hdr.len;
892
893 usbd_copy_in(pc, pos, &hdr, sizeof(hdr));
894
895 pos += sizeof(hdr);
896
897 /*
898 * NOTE: Some drivers force a short packet
899 * by appending a dummy header with zero
900 * length at then end of the USB transfer.
901 * This driver uses the
902 * USB_FORCE_SHORT_XFER flag instead.
903 */
904 }
905 usbd_m_copy_in(pc, pos, m, 0, m->m_pkthdr.len);
906 pos += m->m_pkthdr.len;
907
908 /*
909 * if there's a BPF listener, bounce a copy
910 * of this frame to him:
911 */
912 BPF_MTAP(ifp, m);
913
914 m_freem(m);
915
916 if (sc->sc_flags & (AXE_FLAG_772 | AXE_FLAG_178)) {
917 if (pos > (AXE_BULK_BUF_SIZE - MCLBYTES - sizeof(hdr))) {
918 /* send out frame(s) */
919 break;
920 }
921 } else {
922 /* send out frame */
923 break;
924 }
925 }
926
927 usbd_xfer_set_frame_len(xfer, 0, pos);
928 usbd_transfer_submit(xfer);
929 return;
930
931 default: /* Error */
932 DPRINTFN(11, "transfer error, %s\n",
933 usbd_errstr(error));
934
935 ifp->if_oerrors++;
936
937 if (error != USB_ERR_CANCELLED) {
938 /* try to clear stall first */
939 usbd_xfer_set_stall(xfer);
940 goto tr_setup;
941 }
942 return;
943
944 }
945}
946
947static void
948axe_tick(struct usb_ether *ue)
949{
950 struct axe_softc *sc = uether_getsc(ue);
951 struct mii_data *mii = GET_MII(sc);
952
953 AXE_LOCK_ASSERT(sc, MA_OWNED);
954
955 mii_tick(mii);
956 if ((sc->sc_flags & AXE_FLAG_LINK) == 0) {
957 axe_miibus_statchg(ue->ue_dev);
958 if ((sc->sc_flags & AXE_FLAG_LINK) != 0)
959 axe_start(ue);
960 }
961}
962
963static void
964axe_start(struct usb_ether *ue)
965{
966 struct axe_softc *sc = uether_getsc(ue);
967
968 /*
969 * start the USB transfers, if not already started:
970 */
971 usbd_transfer_start(sc->sc_xfer[AXE_INTR_DT_RD]);
972 usbd_transfer_start(sc->sc_xfer[AXE_BULK_DT_RD]);
973 usbd_transfer_start(sc->sc_xfer[AXE_BULK_DT_WR]);
974}
975
976static void
977axe_init(struct usb_ether *ue)
978{
979 struct axe_softc *sc = uether_getsc(ue);
980 struct ifnet *ifp = uether_getifp(ue);
981 uint16_t rxmode;
982
983 AXE_LOCK_ASSERT(sc, MA_OWNED);
984
985 /* Cancel pending I/O */
986 axe_stop(ue);
987
988 /* Set MAC address. */
989 if (sc->sc_flags & (AXE_FLAG_178 | AXE_FLAG_772))
990 axe_cmd(sc, AXE_178_CMD_WRITE_NODEID, 0, 0, IF_LLADDR(ifp));
991 else
992 axe_cmd(sc, AXE_172_CMD_WRITE_NODEID, 0, 0, IF_LLADDR(ifp));
993
994 /* Set transmitter IPG values */
995 if (sc->sc_flags & (AXE_FLAG_178 | AXE_FLAG_772)) {
996 axe_cmd(sc, AXE_178_CMD_WRITE_IPG012, sc->sc_ipgs[2],
997 (sc->sc_ipgs[1] << 8) | (sc->sc_ipgs[0]), NULL);
998 } else {
999 axe_cmd(sc, AXE_172_CMD_WRITE_IPG0, 0, sc->sc_ipgs[0], NULL);
1000 axe_cmd(sc, AXE_172_CMD_WRITE_IPG1, 0, sc->sc_ipgs[1], NULL);
1001 axe_cmd(sc, AXE_172_CMD_WRITE_IPG2, 0, sc->sc_ipgs[2], NULL);
1002 }
1003
1004 /* Enable receiver, set RX mode */
1005 rxmode = (AXE_RXCMD_MULTICAST | AXE_RXCMD_ENABLE);
1006 if (sc->sc_flags & (AXE_FLAG_178 | AXE_FLAG_772)) {
1007#if 0
1008 rxmode |= AXE_178_RXCMD_MFB_2048; /* chip default */
1009#else
1010 /*
1011 * Default Rx buffer size is too small to get
1012 * maximum performance.
1013 */
1014 rxmode |= AXE_178_RXCMD_MFB_16384;
1015#endif
1016 } else {
1017 rxmode |= AXE_172_RXCMD_UNICAST;
1018 }
1019
1020 /* If we want promiscuous mode, set the allframes bit. */
1021 if (ifp->if_flags & IFF_PROMISC)
1022 rxmode |= AXE_RXCMD_PROMISC;
1023
1024 if (ifp->if_flags & IFF_BROADCAST)
1025 rxmode |= AXE_RXCMD_BROADCAST;
1026
1027 axe_cmd(sc, AXE_CMD_RXCTL_WRITE, 0, rxmode, NULL);
1028
1029 /* Load the multicast filter. */
1030 axe_setmulti(ue);
1031
1032 usbd_xfer_set_stall(sc->sc_xfer[AXE_BULK_DT_WR]);
1033
1034 ifp->if_drv_flags |= IFF_DRV_RUNNING;
1035 axe_start(ue);
1036}
1037
1038static void
1039axe_setpromisc(struct usb_ether *ue)
1040{
1041 struct axe_softc *sc = uether_getsc(ue);
1042 struct ifnet *ifp = uether_getifp(ue);
1043 uint16_t rxmode;
1044
1045 axe_cmd(sc, AXE_CMD_RXCTL_READ, 0, 0, &rxmode);
1046
1047 rxmode = le16toh(rxmode);
1048
1049 if (ifp->if_flags & IFF_PROMISC) {
1050 rxmode |= AXE_RXCMD_PROMISC;
1051 } else {
1052 rxmode &= ~AXE_RXCMD_PROMISC;
1053 }
1054
1055 axe_cmd(sc, AXE_CMD_RXCTL_WRITE, 0, rxmode, NULL);
1056
1057 axe_setmulti(ue);
1058}
1059
1060static void
1061axe_stop(struct usb_ether *ue)
1062{
1063 struct axe_softc *sc = uether_getsc(ue);
1064 struct ifnet *ifp = uether_getifp(ue);
1065
1066 AXE_LOCK_ASSERT(sc, MA_OWNED);
1067
1068 ifp->if_drv_flags &= ~IFF_DRV_RUNNING;
1069 sc->sc_flags &= ~AXE_FLAG_LINK;
1070
1071 /*
1072 * stop all the transfers, if not already stopped:
1073 */
1074 usbd_transfer_stop(sc->sc_xfer[AXE_BULK_DT_WR]);
1075 usbd_transfer_stop(sc->sc_xfer[AXE_BULK_DT_RD]);
1076 usbd_transfer_stop(sc->sc_xfer[AXE_INTR_DT_RD]);
1077
1078 axe_reset(sc);
1079}
| 260
261static const struct usb_ether_methods axe_ue_methods = {
262 .ue_attach_post = axe_attach_post,
263 .ue_start = axe_start,
264 .ue_init = axe_init,
265 .ue_stop = axe_stop,
266 .ue_tick = axe_tick,
267 .ue_setmulti = axe_setmulti,
268 .ue_setpromisc = axe_setpromisc,
269 .ue_mii_upd = axe_ifmedia_upd,
270 .ue_mii_sts = axe_ifmedia_sts,
271};
272
273static int
274axe_cmd(struct axe_softc *sc, int cmd, int index, int val, void *buf)
275{
276 struct usb_device_request req;
277 usb_error_t err;
278
279 AXE_LOCK_ASSERT(sc, MA_OWNED);
280
281 req.bmRequestType = (AXE_CMD_IS_WRITE(cmd) ?
282 UT_WRITE_VENDOR_DEVICE :
283 UT_READ_VENDOR_DEVICE);
284 req.bRequest = AXE_CMD_CMD(cmd);
285 USETW(req.wValue, val);
286 USETW(req.wIndex, index);
287 USETW(req.wLength, AXE_CMD_LEN(cmd));
288
289 err = uether_do_request(&sc->sc_ue, &req, buf, 1000);
290
291 return (err);
292}
293
294static int
295axe_miibus_readreg(device_t dev, int phy, int reg)
296{
297 struct axe_softc *sc = device_get_softc(dev);
298 uint16_t val;
299 int locked;
300
301 if (sc->sc_phyno != phy)
302 return (0);
303
304 locked = mtx_owned(&sc->sc_mtx);
305 if (!locked)
306 AXE_LOCK(sc);
307
308 axe_cmd(sc, AXE_CMD_MII_OPMODE_SW, 0, 0, NULL);
309 axe_cmd(sc, AXE_CMD_MII_READ_REG, reg, phy, &val);
310 axe_cmd(sc, AXE_CMD_MII_OPMODE_HW, 0, 0, NULL);
311
312 val = le16toh(val);
313 if ((sc->sc_flags & AXE_FLAG_772) != 0 && reg == MII_BMSR) {
314 /*
315 * BMSR of AX88772 indicates that it supports extended
316 * capability but the extended status register is
317 * revered for embedded ethernet PHY. So clear the
318 * extended capability bit of BMSR.
319 */
320 val &= ~BMSR_EXTCAP;
321 }
322
323 if (!locked)
324 AXE_UNLOCK(sc);
325 return (val);
326}
327
328static int
329axe_miibus_writereg(device_t dev, int phy, int reg, int val)
330{
331 struct axe_softc *sc = device_get_softc(dev);
332 int locked;
333
334 val = htole32(val);
335
336 if (sc->sc_phyno != phy)
337 return (0);
338
339 locked = mtx_owned(&sc->sc_mtx);
340 if (!locked)
341 AXE_LOCK(sc);
342
343 axe_cmd(sc, AXE_CMD_MII_OPMODE_SW, 0, 0, NULL);
344 axe_cmd(sc, AXE_CMD_MII_WRITE_REG, reg, phy, &val);
345 axe_cmd(sc, AXE_CMD_MII_OPMODE_HW, 0, 0, NULL);
346
347 if (!locked)
348 AXE_UNLOCK(sc);
349 return (0);
350}
351
352static void
353axe_miibus_statchg(device_t dev)
354{
355 struct axe_softc *sc = device_get_softc(dev);
356 struct mii_data *mii = GET_MII(sc);
357 struct ifnet *ifp;
358 uint16_t val;
359 int err, locked;
360
361 locked = mtx_owned(&sc->sc_mtx);
362 if (!locked)
363 AXE_LOCK(sc);
364
365 ifp = uether_getifp(&sc->sc_ue);
366 if (mii == NULL || ifp == NULL ||
367 (ifp->if_drv_flags & IFF_DRV_RUNNING) == 0)
368 goto done;
369
370 sc->sc_flags &= ~AXE_FLAG_LINK;
371 if ((mii->mii_media_status & (IFM_ACTIVE | IFM_AVALID)) ==
372 (IFM_ACTIVE | IFM_AVALID)) {
373 switch (IFM_SUBTYPE(mii->mii_media_active)) {
374 case IFM_10_T:
375 case IFM_100_TX:
376 sc->sc_flags |= AXE_FLAG_LINK;
377 break;
378 case IFM_1000_T:
379 if ((sc->sc_flags & AXE_FLAG_178) == 0)
380 break;
381 sc->sc_flags |= AXE_FLAG_LINK;
382 break;
383 default:
384 break;
385 }
386 }
387
388 /* Lost link, do nothing. */
389 if ((sc->sc_flags & AXE_FLAG_LINK) == 0)
390 goto done;
391
392 val = 0;
393 if ((IFM_OPTIONS(mii->mii_media_active) & IFM_FDX) != 0)
394 val |= AXE_MEDIA_FULL_DUPLEX;
395 if (sc->sc_flags & (AXE_FLAG_178 | AXE_FLAG_772)) {
396 val |= AXE_178_MEDIA_RX_EN | AXE_178_MEDIA_MAGIC;
397 if ((sc->sc_flags & AXE_FLAG_178) != 0)
398 val |= AXE_178_MEDIA_ENCK;
399 switch (IFM_SUBTYPE(mii->mii_media_active)) {
400 case IFM_1000_T:
401 val |= AXE_178_MEDIA_GMII | AXE_178_MEDIA_ENCK;
402 break;
403 case IFM_100_TX:
404 val |= AXE_178_MEDIA_100TX;
405 break;
406 case IFM_10_T:
407 /* doesn't need to be handled */
408 break;
409 }
410 }
411 err = axe_cmd(sc, AXE_CMD_WRITE_MEDIA, 0, val, NULL);
412 if (err)
413 device_printf(dev, "media change failed, error %d\n", err);
414done:
415 if (!locked)
416 AXE_UNLOCK(sc);
417}
418
419/*
420 * Set media options.
421 */
422static int
423axe_ifmedia_upd(struct ifnet *ifp)
424{
425 struct axe_softc *sc = ifp->if_softc;
426 struct mii_data *mii = GET_MII(sc);
427 int error;
428
429 AXE_LOCK_ASSERT(sc, MA_OWNED);
430
431 if (mii->mii_instance) {
432 struct mii_softc *miisc;
433
434 LIST_FOREACH(miisc, &mii->mii_phys, mii_list)
435 mii_phy_reset(miisc);
436 }
437 error = mii_mediachg(mii);
438 return (error);
439}
440
441/*
442 * Report current media status.
443 */
444static void
445axe_ifmedia_sts(struct ifnet *ifp, struct ifmediareq *ifmr)
446{
447 struct axe_softc *sc = ifp->if_softc;
448 struct mii_data *mii = GET_MII(sc);
449
450 AXE_LOCK(sc);
451 mii_pollstat(mii);
452 AXE_UNLOCK(sc);
453 ifmr->ifm_active = mii->mii_media_active;
454 ifmr->ifm_status = mii->mii_media_status;
455}
456
457static void
458axe_setmulti(struct usb_ether *ue)
459{
460 struct axe_softc *sc = uether_getsc(ue);
461 struct ifnet *ifp = uether_getifp(ue);
462 struct ifmultiaddr *ifma;
463 uint32_t h = 0;
464 uint16_t rxmode;
465 uint8_t hashtbl[8] = { 0, 0, 0, 0, 0, 0, 0, 0 };
466
467 AXE_LOCK_ASSERT(sc, MA_OWNED);
468
469 axe_cmd(sc, AXE_CMD_RXCTL_READ, 0, 0, &rxmode);
470 rxmode = le16toh(rxmode);
471
472 if (ifp->if_flags & (IFF_ALLMULTI | IFF_PROMISC)) {
473 rxmode |= AXE_RXCMD_ALLMULTI;
474 axe_cmd(sc, AXE_CMD_RXCTL_WRITE, 0, rxmode, NULL);
475 return;
476 }
477 rxmode &= ~AXE_RXCMD_ALLMULTI;
478
479 if_maddr_rlock(ifp);
480 TAILQ_FOREACH(ifma, &ifp->if_multiaddrs, ifma_link)
481 {
482 if (ifma->ifma_addr->sa_family != AF_LINK)
483 continue;
484 h = ether_crc32_be(LLADDR((struct sockaddr_dl *)
485 ifma->ifma_addr), ETHER_ADDR_LEN) >> 26;
486 hashtbl[h / 8] |= 1 << (h % 8);
487 }
488 if_maddr_runlock(ifp);
489
490 axe_cmd(sc, AXE_CMD_WRITE_MCAST, 0, 0, (void *)&hashtbl);
491 axe_cmd(sc, AXE_CMD_RXCTL_WRITE, 0, rxmode, NULL);
492}
493
494static int
495axe_get_phyno(struct axe_softc *sc, int sel)
496{
497 int phyno;
498
499 switch (AXE_PHY_TYPE(sc->sc_phyaddrs[sel])) {
500 case PHY_TYPE_100_HOME:
501 case PHY_TYPE_GIG:
502 phyno = AXE_PHY_NO(sc->sc_phyaddrs[sel]);
503 break;
504 case PHY_TYPE_SPECIAL:
505 /* FALLTHROUGH */
506 case PHY_TYPE_RSVD:
507 /* FALLTHROUGH */
508 case PHY_TYPE_NON_SUP:
509 /* FALLTHROUGH */
510 default:
511 phyno = -1;
512 break;
513 }
514
515 return (phyno);
516}
517
518static void
519axe_ax88178_init(struct axe_softc *sc)
520{
521 int gpio0 = 0, phymode = 0;
522 uint16_t eeprom;
523
524 axe_cmd(sc, AXE_CMD_SROM_WR_ENABLE, 0, 0, NULL);
525 /* XXX magic */
526 axe_cmd(sc, AXE_CMD_SROM_READ, 0, 0x0017, &eeprom);
527 eeprom = le16toh(eeprom);
528 axe_cmd(sc, AXE_CMD_SROM_WR_DISABLE, 0, 0, NULL);
529
530 /* if EEPROM is invalid we have to use to GPIO0 */
531 if (eeprom == 0xffff) {
532 phymode = 0;
533 gpio0 = 1;
534 } else {
535 phymode = eeprom & 7;
536 gpio0 = (eeprom & 0x80) ? 0 : 1;
537 }
538
539 axe_cmd(sc, AXE_CMD_WRITE_GPIO, 0, 0x008c, NULL);
540 uether_pause(&sc->sc_ue, hz / 16);
541
542 if ((eeprom >> 8) != 0x01) {
543 axe_cmd(sc, AXE_CMD_WRITE_GPIO, 0, 0x003c, NULL);
544 uether_pause(&sc->sc_ue, hz / 32);
545
546 axe_cmd(sc, AXE_CMD_WRITE_GPIO, 0, 0x001c, NULL);
547 uether_pause(&sc->sc_ue, hz / 3);
548
549 axe_cmd(sc, AXE_CMD_WRITE_GPIO, 0, 0x003c, NULL);
550 uether_pause(&sc->sc_ue, hz / 32);
551 } else {
552 axe_cmd(sc, AXE_CMD_WRITE_GPIO, 0, 0x0004, NULL);
553 uether_pause(&sc->sc_ue, hz / 32);
554
555 axe_cmd(sc, AXE_CMD_WRITE_GPIO, 0, 0x000c, NULL);
556 uether_pause(&sc->sc_ue, hz / 32);
557 }
558
559 /* soft reset */
560 axe_cmd(sc, AXE_CMD_SW_RESET_REG, 0, AXE_SW_RESET_CLEAR, NULL);
561 uether_pause(&sc->sc_ue, hz / 4);
562
563 axe_cmd(sc, AXE_CMD_SW_RESET_REG, 0,
564 AXE_SW_RESET_PRL | AXE_178_RESET_MAGIC, NULL);
565 uether_pause(&sc->sc_ue, hz / 4);
566 /* Enable MII/GMII/RGMII interface to work with external PHY. */
567 axe_cmd(sc, AXE_CMD_SW_PHY_SELECT, 0, 0, NULL);
568 uether_pause(&sc->sc_ue, hz / 4);
569
570 axe_cmd(sc, AXE_CMD_RXCTL_WRITE, 0, 0, NULL);
571}
572
573static void
574axe_ax88772_init(struct axe_softc *sc)
575{
576 axe_cmd(sc, AXE_CMD_WRITE_GPIO, 0, 0x00b0, NULL);
577 uether_pause(&sc->sc_ue, hz / 16);
578
579 if (sc->sc_phyno == AXE_772_PHY_NO_EPHY) {
580 /* ask for the embedded PHY */
581 axe_cmd(sc, AXE_CMD_SW_PHY_SELECT, 0, 0x01, NULL);
582 uether_pause(&sc->sc_ue, hz / 64);
583
584 /* power down and reset state, pin reset state */
585 axe_cmd(sc, AXE_CMD_SW_RESET_REG, 0,
586 AXE_SW_RESET_CLEAR, NULL);
587 uether_pause(&sc->sc_ue, hz / 16);
588
589 /* power down/reset state, pin operating state */
590 axe_cmd(sc, AXE_CMD_SW_RESET_REG, 0,
591 AXE_SW_RESET_IPPD | AXE_SW_RESET_PRL, NULL);
592 uether_pause(&sc->sc_ue, hz / 4);
593
594 /* power up, reset */
595 axe_cmd(sc, AXE_CMD_SW_RESET_REG, 0, AXE_SW_RESET_PRL, NULL);
596
597 /* power up, operating */
598 axe_cmd(sc, AXE_CMD_SW_RESET_REG, 0,
599 AXE_SW_RESET_IPRL | AXE_SW_RESET_PRL, NULL);
600 } else {
601 /* ask for external PHY */
602 axe_cmd(sc, AXE_CMD_SW_PHY_SELECT, 0, 0x00, NULL);
603 uether_pause(&sc->sc_ue, hz / 64);
604
605 /* power down internal PHY */
606 axe_cmd(sc, AXE_CMD_SW_RESET_REG, 0,
607 AXE_SW_RESET_IPPD | AXE_SW_RESET_PRL, NULL);
608 }
609
610 uether_pause(&sc->sc_ue, hz / 4);
611 axe_cmd(sc, AXE_CMD_RXCTL_WRITE, 0, 0, NULL);
612}
613
614static void
615axe_reset(struct axe_softc *sc)
616{
617 struct usb_config_descriptor *cd;
618 usb_error_t err;
619
620 cd = usbd_get_config_descriptor(sc->sc_ue.ue_udev);
621
622 err = usbd_req_set_config(sc->sc_ue.ue_udev, &sc->sc_mtx,
623 cd->bConfigurationValue);
624 if (err)
625 DPRINTF("reset failed (ignored)\n");
626
627 /* Wait a little while for the chip to get its brains in order. */
628 uether_pause(&sc->sc_ue, hz / 100);
629}
630
631static void
632axe_attach_post(struct usb_ether *ue)
633{
634 struct axe_softc *sc = uether_getsc(ue);
635
636 /*
637 * Load PHY indexes first. Needed by axe_xxx_init().
638 */
639 axe_cmd(sc, AXE_CMD_READ_PHYID, 0, 0, sc->sc_phyaddrs);
640#if 1
641 device_printf(sc->sc_ue.ue_dev, "PHYADDR 0x%02x:0x%02x\n",
642 sc->sc_phyaddrs[0], sc->sc_phyaddrs[1]);
643#endif
644 sc->sc_phyno = axe_get_phyno(sc, AXE_PHY_SEL_PRI);
645 if (sc->sc_phyno == -1)
646 sc->sc_phyno = axe_get_phyno(sc, AXE_PHY_SEL_SEC);
647 if (sc->sc_phyno == -1) {
648 device_printf(sc->sc_ue.ue_dev,
649 "no valid PHY address found, assuming PHY address 0\n");
650 sc->sc_phyno = 0;
651 }
652
653 if (sc->sc_flags & AXE_FLAG_178)
654 axe_ax88178_init(sc);
655 else if (sc->sc_flags & AXE_FLAG_772)
656 axe_ax88772_init(sc);
657
658 /*
659 * Get station address.
660 */
661 if (sc->sc_flags & (AXE_FLAG_178 | AXE_FLAG_772))
662 axe_cmd(sc, AXE_178_CMD_READ_NODEID, 0, 0, ue->ue_eaddr);
663 else
664 axe_cmd(sc, AXE_172_CMD_READ_NODEID, 0, 0, ue->ue_eaddr);
665
666 /*
667 * Fetch IPG values.
668 */
669 axe_cmd(sc, AXE_CMD_READ_IPG012, 0, 0, sc->sc_ipgs);
670}
671
672/*
673 * Probe for a AX88172 chip.
674 */
675static int
676axe_probe(device_t dev)
677{
678 struct usb_attach_arg *uaa = device_get_ivars(dev);
679
680 if (uaa->usb_mode != USB_MODE_HOST)
681 return (ENXIO);
682 if (uaa->info.bConfigIndex != AXE_CONFIG_IDX)
683 return (ENXIO);
684 if (uaa->info.bIfaceIndex != AXE_IFACE_IDX)
685 return (ENXIO);
686
687 return (usbd_lookup_id_by_uaa(axe_devs, sizeof(axe_devs), uaa));
688}
689
690/*
691 * Attach the interface. Allocate softc structures, do ifmedia
692 * setup and ethernet/BPF attach.
693 */
694static int
695axe_attach(device_t dev)
696{
697 struct usb_attach_arg *uaa = device_get_ivars(dev);
698 struct axe_softc *sc = device_get_softc(dev);
699 struct usb_ether *ue = &sc->sc_ue;
700 uint8_t iface_index;
701 int error;
702
703 sc->sc_flags = USB_GET_DRIVER_INFO(uaa);
704
705 device_set_usb_desc(dev);
706
707 mtx_init(&sc->sc_mtx, device_get_nameunit(dev), NULL, MTX_DEF);
708
709 iface_index = AXE_IFACE_IDX;
710 error = usbd_transfer_setup(uaa->device, &iface_index, sc->sc_xfer,
711 axe_config, AXE_N_TRANSFER, sc, &sc->sc_mtx);
712 if (error) {
713 device_printf(dev, "allocating USB transfers failed\n");
714 goto detach;
715 }
716
717 ue->ue_sc = sc;
718 ue->ue_dev = dev;
719 ue->ue_udev = uaa->device;
720 ue->ue_mtx = &sc->sc_mtx;
721 ue->ue_methods = &axe_ue_methods;
722
723 error = uether_ifattach(ue);
724 if (error) {
725 device_printf(dev, "could not attach interface\n");
726 goto detach;
727 }
728 return (0); /* success */
729
730detach:
731 axe_detach(dev);
732 return (ENXIO); /* failure */
733}
734
735static int
736axe_detach(device_t dev)
737{
738 struct axe_softc *sc = device_get_softc(dev);
739 struct usb_ether *ue = &sc->sc_ue;
740
741 usbd_transfer_unsetup(sc->sc_xfer, AXE_N_TRANSFER);
742 uether_ifdetach(ue);
743 mtx_destroy(&sc->sc_mtx);
744
745 return (0);
746}
747
748static void
749axe_intr_callback(struct usb_xfer *xfer, usb_error_t error)
750{
751 switch (USB_GET_STATE(xfer)) {
752 case USB_ST_TRANSFERRED:
753 case USB_ST_SETUP:
754tr_setup:
755 usbd_xfer_set_frame_len(xfer, 0, usbd_xfer_max_len(xfer));
756 usbd_transfer_submit(xfer);
757 return;
758
759 default: /* Error */
760 if (error != USB_ERR_CANCELLED) {
761 /* try to clear stall first */
762 usbd_xfer_set_stall(xfer);
763 goto tr_setup;
764 }
765 return;
766 }
767}
768
769#if (AXE_BULK_BUF_SIZE >= 0x10000)
770#error "Please update axe_bulk_read_callback()!"
771#endif
772
773static void
774axe_bulk_read_callback(struct usb_xfer *xfer, usb_error_t error)
775{
776 struct axe_softc *sc = usbd_xfer_softc(xfer);
777 struct usb_ether *ue = &sc->sc_ue;
778 struct ifnet *ifp = uether_getifp(ue);
779 struct axe_sframe_hdr hdr;
780 struct usb_page_cache *pc;
781 int err, pos, len;
782 int actlen;
783
784 usbd_xfer_status(xfer, &actlen, NULL, NULL, NULL);
785
786 switch (USB_GET_STATE(xfer)) {
787 case USB_ST_TRANSFERRED:
788 pos = 0;
789 len = 0;
790 err = 0;
791
792 pc = usbd_xfer_get_frame(xfer, 0);
793 if (sc->sc_flags & (AXE_FLAG_772 | AXE_FLAG_178)) {
794 while (pos < actlen) {
795 if ((pos + sizeof(hdr)) > actlen) {
796 /* too little data */
797 err = EINVAL;
798 break;
799 }
800 usbd_copy_out(pc, pos, &hdr, sizeof(hdr));
801
802 if ((hdr.len ^ hdr.ilen) != 0xFFFF) {
803 /* we lost sync */
804 err = EINVAL;
805 break;
806 }
807 pos += sizeof(hdr);
808
809 len = le16toh(hdr.len);
810 if ((pos + len) > actlen) {
811 /* invalid length */
812 err = EINVAL;
813 break;
814 }
815 err = uether_rxbuf(ue, pc, pos, len);
816
817 pos += len + (len % 2);
818 }
819 } else {
820 err = uether_rxbuf(ue, pc, 0, actlen);
821 }
822
823 if (err != 0)
824 ifp->if_ierrors++;
825
826 /* FALLTHROUGH */
827 case USB_ST_SETUP:
828tr_setup:
829 usbd_xfer_set_frame_len(xfer, 0, usbd_xfer_max_len(xfer));
830 usbd_transfer_submit(xfer);
831 uether_rxflush(ue);
832 return;
833
834 default: /* Error */
835 DPRINTF("bulk read error, %s\n", usbd_errstr(error));
836
837 if (error != USB_ERR_CANCELLED) {
838 /* try to clear stall first */
839 usbd_xfer_set_stall(xfer);
840 goto tr_setup;
841 }
842 return;
843
844 }
845}
846
847#if ((AXE_BULK_BUF_SIZE >= 0x10000) || (AXE_BULK_BUF_SIZE < (MCLBYTES+4)))
848#error "Please update axe_bulk_write_callback()!"
849#endif
850
851static void
852axe_bulk_write_callback(struct usb_xfer *xfer, usb_error_t error)
853{
854 struct axe_softc *sc = usbd_xfer_softc(xfer);
855 struct axe_sframe_hdr hdr;
856 struct ifnet *ifp = uether_getifp(&sc->sc_ue);
857 struct usb_page_cache *pc;
858 struct mbuf *m;
859 int pos;
860
861 switch (USB_GET_STATE(xfer)) {
862 case USB_ST_TRANSFERRED:
863 DPRINTFN(11, "transfer complete\n");
864 ifp->if_opackets++;
865 /* FALLTHROUGH */
866 case USB_ST_SETUP:
867tr_setup:
868 if ((sc->sc_flags & AXE_FLAG_LINK) == 0) {
869 /*
870 * don't send anything if there is no link !
871 */
872 return;
873 }
874 pos = 0;
875 pc = usbd_xfer_get_frame(xfer, 0);
876
877 while (1) {
878
879 IFQ_DRV_DEQUEUE(&ifp->if_snd, m);
880
881 if (m == NULL) {
882 if (pos > 0)
883 break; /* send out data */
884 return;
885 }
886 if (m->m_pkthdr.len > MCLBYTES) {
887 m->m_pkthdr.len = MCLBYTES;
888 }
889 if (sc->sc_flags & (AXE_FLAG_772 | AXE_FLAG_178)) {
890
891 hdr.len = htole16(m->m_pkthdr.len);
892 hdr.ilen = ~hdr.len;
893
894 usbd_copy_in(pc, pos, &hdr, sizeof(hdr));
895
896 pos += sizeof(hdr);
897
898 /*
899 * NOTE: Some drivers force a short packet
900 * by appending a dummy header with zero
901 * length at then end of the USB transfer.
902 * This driver uses the
903 * USB_FORCE_SHORT_XFER flag instead.
904 */
905 }
906 usbd_m_copy_in(pc, pos, m, 0, m->m_pkthdr.len);
907 pos += m->m_pkthdr.len;
908
909 /*
910 * if there's a BPF listener, bounce a copy
911 * of this frame to him:
912 */
913 BPF_MTAP(ifp, m);
914
915 m_freem(m);
916
917 if (sc->sc_flags & (AXE_FLAG_772 | AXE_FLAG_178)) {
918 if (pos > (AXE_BULK_BUF_SIZE - MCLBYTES - sizeof(hdr))) {
919 /* send out frame(s) */
920 break;
921 }
922 } else {
923 /* send out frame */
924 break;
925 }
926 }
927
928 usbd_xfer_set_frame_len(xfer, 0, pos);
929 usbd_transfer_submit(xfer);
930 return;
931
932 default: /* Error */
933 DPRINTFN(11, "transfer error, %s\n",
934 usbd_errstr(error));
935
936 ifp->if_oerrors++;
937
938 if (error != USB_ERR_CANCELLED) {
939 /* try to clear stall first */
940 usbd_xfer_set_stall(xfer);
941 goto tr_setup;
942 }
943 return;
944
945 }
946}
947
948static void
949axe_tick(struct usb_ether *ue)
950{
951 struct axe_softc *sc = uether_getsc(ue);
952 struct mii_data *mii = GET_MII(sc);
953
954 AXE_LOCK_ASSERT(sc, MA_OWNED);
955
956 mii_tick(mii);
957 if ((sc->sc_flags & AXE_FLAG_LINK) == 0) {
958 axe_miibus_statchg(ue->ue_dev);
959 if ((sc->sc_flags & AXE_FLAG_LINK) != 0)
960 axe_start(ue);
961 }
962}
963
964static void
965axe_start(struct usb_ether *ue)
966{
967 struct axe_softc *sc = uether_getsc(ue);
968
969 /*
970 * start the USB transfers, if not already started:
971 */
972 usbd_transfer_start(sc->sc_xfer[AXE_INTR_DT_RD]);
973 usbd_transfer_start(sc->sc_xfer[AXE_BULK_DT_RD]);
974 usbd_transfer_start(sc->sc_xfer[AXE_BULK_DT_WR]);
975}
976
977static void
978axe_init(struct usb_ether *ue)
979{
980 struct axe_softc *sc = uether_getsc(ue);
981 struct ifnet *ifp = uether_getifp(ue);
982 uint16_t rxmode;
983
984 AXE_LOCK_ASSERT(sc, MA_OWNED);
985
986 /* Cancel pending I/O */
987 axe_stop(ue);
988
989 /* Set MAC address. */
990 if (sc->sc_flags & (AXE_FLAG_178 | AXE_FLAG_772))
991 axe_cmd(sc, AXE_178_CMD_WRITE_NODEID, 0, 0, IF_LLADDR(ifp));
992 else
993 axe_cmd(sc, AXE_172_CMD_WRITE_NODEID, 0, 0, IF_LLADDR(ifp));
994
995 /* Set transmitter IPG values */
996 if (sc->sc_flags & (AXE_FLAG_178 | AXE_FLAG_772)) {
997 axe_cmd(sc, AXE_178_CMD_WRITE_IPG012, sc->sc_ipgs[2],
998 (sc->sc_ipgs[1] << 8) | (sc->sc_ipgs[0]), NULL);
999 } else {
1000 axe_cmd(sc, AXE_172_CMD_WRITE_IPG0, 0, sc->sc_ipgs[0], NULL);
1001 axe_cmd(sc, AXE_172_CMD_WRITE_IPG1, 0, sc->sc_ipgs[1], NULL);
1002 axe_cmd(sc, AXE_172_CMD_WRITE_IPG2, 0, sc->sc_ipgs[2], NULL);
1003 }
1004
1005 /* Enable receiver, set RX mode */
1006 rxmode = (AXE_RXCMD_MULTICAST | AXE_RXCMD_ENABLE);
1007 if (sc->sc_flags & (AXE_FLAG_178 | AXE_FLAG_772)) {
1008#if 0
1009 rxmode |= AXE_178_RXCMD_MFB_2048; /* chip default */
1010#else
1011 /*
1012 * Default Rx buffer size is too small to get
1013 * maximum performance.
1014 */
1015 rxmode |= AXE_178_RXCMD_MFB_16384;
1016#endif
1017 } else {
1018 rxmode |= AXE_172_RXCMD_UNICAST;
1019 }
1020
1021 /* If we want promiscuous mode, set the allframes bit. */
1022 if (ifp->if_flags & IFF_PROMISC)
1023 rxmode |= AXE_RXCMD_PROMISC;
1024
1025 if (ifp->if_flags & IFF_BROADCAST)
1026 rxmode |= AXE_RXCMD_BROADCAST;
1027
1028 axe_cmd(sc, AXE_CMD_RXCTL_WRITE, 0, rxmode, NULL);
1029
1030 /* Load the multicast filter. */
1031 axe_setmulti(ue);
1032
1033 usbd_xfer_set_stall(sc->sc_xfer[AXE_BULK_DT_WR]);
1034
1035 ifp->if_drv_flags |= IFF_DRV_RUNNING;
1036 axe_start(ue);
1037}
1038
1039static void
1040axe_setpromisc(struct usb_ether *ue)
1041{
1042 struct axe_softc *sc = uether_getsc(ue);
1043 struct ifnet *ifp = uether_getifp(ue);
1044 uint16_t rxmode;
1045
1046 axe_cmd(sc, AXE_CMD_RXCTL_READ, 0, 0, &rxmode);
1047
1048 rxmode = le16toh(rxmode);
1049
1050 if (ifp->if_flags & IFF_PROMISC) {
1051 rxmode |= AXE_RXCMD_PROMISC;
1052 } else {
1053 rxmode &= ~AXE_RXCMD_PROMISC;
1054 }
1055
1056 axe_cmd(sc, AXE_CMD_RXCTL_WRITE, 0, rxmode, NULL);
1057
1058 axe_setmulti(ue);
1059}
1060
1061static void
1062axe_stop(struct usb_ether *ue)
1063{
1064 struct axe_softc *sc = uether_getsc(ue);
1065 struct ifnet *ifp = uether_getifp(ue);
1066
1067 AXE_LOCK_ASSERT(sc, MA_OWNED);
1068
1069 ifp->if_drv_flags &= ~IFF_DRV_RUNNING;
1070 sc->sc_flags &= ~AXE_FLAG_LINK;
1071
1072 /*
1073 * stop all the transfers, if not already stopped:
1074 */
1075 usbd_transfer_stop(sc->sc_xfer[AXE_BULK_DT_WR]);
1076 usbd_transfer_stop(sc->sc_xfer[AXE_BULK_DT_RD]);
1077 usbd_transfer_stop(sc->sc_xfer[AXE_INTR_DT_RD]);
1078
1079 axe_reset(sc);
1080}
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