| if_auereg.h (190749) | if_auereg.h (192984) |
|---|---|
| 1/*- 2 * Copyright (c) 1997, 1998, 1999 3 * Bill Paul <wpaul@ee.columbia.edu>. All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright --- 15 unchanged lines hidden (view full) --- 24 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 25 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 26 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 27 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 28 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 29 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF 30 * THE POSSIBILITY OF SUCH DAMAGE. 31 * | 1/*- 2 * Copyright (c) 1997, 1998, 1999 3 * Bill Paul <wpaul@ee.columbia.edu>. All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright --- 15 unchanged lines hidden (view full) --- 24 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 25 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 26 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 27 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 28 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 29 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF 30 * THE POSSIBILITY OF SUCH DAMAGE. 31 * |
| 32 * $FreeBSD: head/sys/dev/usb/net/if_auereg.h 190749 2009-04-05 21:24:15Z piso $ | 32 * $FreeBSD: head/sys/dev/usb/net/if_auereg.h 192984 2009-05-28 17:36:36Z thompsa $ |
| 33 */ 34 35/* 36 * Register definitions for ADMtek Pegasus AN986 USB to Ethernet 37 * chip. The Pegasus uses a total of four USB endpoints: the control 38 * endpoint (0), a bulk read endpoint for receiving packets (1), 39 * a bulk write endpoint for sending packets (2) and an interrupt 40 * endpoint for passing RX and TX status (3). Endpoint 0 is used --- 156 unchanged lines hidden (view full) --- 197 198struct aue_rxpkt { 199 uint16_t aue_pktlen; 200 uint8_t aue_rxstat; 201 uint8_t pad; 202} __packed; 203 204struct aue_softc { | 33 */ 34 35/* 36 * Register definitions for ADMtek Pegasus AN986 USB to Ethernet 37 * chip. The Pegasus uses a total of four USB endpoints: the control 38 * endpoint (0), a bulk read endpoint for receiving packets (1), 39 * a bulk write endpoint for sending packets (2) and an interrupt 40 * endpoint for passing RX and TX status (3). Endpoint 0 is used --- 156 unchanged lines hidden (view full) --- 197 198struct aue_rxpkt { 199 uint16_t aue_pktlen; 200 uint8_t aue_rxstat; 201 uint8_t pad; 202} __packed; 203 204struct aue_softc { |
| 205 struct usb2_ether sc_ue; | 205 struct usb_ether sc_ue; |
| 206 struct mtx sc_mtx; | 206 struct mtx sc_mtx; |
| 207 struct usb2_xfer *sc_xfer[AUE_N_TRANSFER]; | 207 struct usb_xfer *sc_xfer[AUE_N_TRANSFER]; |
| 208 209 int sc_flags; 210#define AUE_FLAG_LSYS 0x0001 /* use Linksys reset */ 211#define AUE_FLAG_PNA 0x0002 /* has Home PNA */ 212#define AUE_FLAG_PII 0x0004 /* Pegasus II chip */ 213#define AUE_FLAG_LINK 0x0008 /* wait for link to come up */ 214#define AUE_FLAG_VER_2 0x0200 /* chip is version 2 */ 215#define AUE_FLAG_DUAL_PHY 0x0400 /* chip has two transcivers */ 216}; 217 218#define AUE_LOCK(_sc) mtx_lock(&(_sc)->sc_mtx) 219#define AUE_UNLOCK(_sc) mtx_unlock(&(_sc)->sc_mtx) 220#define AUE_LOCK_ASSERT(_sc, t) mtx_assert(&(_sc)->sc_mtx, t) | 208 209 int sc_flags; 210#define AUE_FLAG_LSYS 0x0001 /* use Linksys reset */ 211#define AUE_FLAG_PNA 0x0002 /* has Home PNA */ 212#define AUE_FLAG_PII 0x0004 /* Pegasus II chip */ 213#define AUE_FLAG_LINK 0x0008 /* wait for link to come up */ 214#define AUE_FLAG_VER_2 0x0200 /* chip is version 2 */ 215#define AUE_FLAG_DUAL_PHY 0x0400 /* chip has two transcivers */ 216}; 217 218#define AUE_LOCK(_sc) mtx_lock(&(_sc)->sc_mtx) 219#define AUE_UNLOCK(_sc) mtx_unlock(&(_sc)->sc_mtx) 220#define AUE_LOCK_ASSERT(_sc, t) mtx_assert(&(_sc)->sc_mtx, t) |