2/*- 3 * Copyright (c) 1998 The NetBSD Foundation, Inc. 4 * All rights reserved. 5 * 6 * This code is derived from software contributed to The NetBSD Foundation 7 * by Lennart Augustsson (lennart@augustsson.net) at 8 * Carlstedt Research & Technology. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. All advertising materials mentioning features or use of this software 19 * must display the following acknowledgement: 20 * This product includes software developed by the NetBSD 21 * Foundation, Inc. and its contributors. 22 * 4. Neither the name of The NetBSD Foundation nor the names of its 23 * contributors may be used to endorse or promote products derived 24 * from this software without specific prior written permission. 25 * 26 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 27 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 28 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 29 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 30 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 31 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 32 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 33 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 34 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 35 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 36 * POSSIBILITY OF SUCH DAMAGE. 37 */ 38 39#ifndef _UHCI_H_ 40#define _UHCI_H_ 41 42#define UHCI_MAX_DEVICES MIN(USB_MAX_DEVICES, 128) 43
| 2/*- 3 * Copyright (c) 1998 The NetBSD Foundation, Inc. 4 * All rights reserved. 5 * 6 * This code is derived from software contributed to The NetBSD Foundation 7 * by Lennart Augustsson (lennart@augustsson.net) at 8 * Carlstedt Research & Technology. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. All advertising materials mentioning features or use of this software 19 * must display the following acknowledgement: 20 * This product includes software developed by the NetBSD 21 * Foundation, Inc. and its contributors. 22 * 4. Neither the name of The NetBSD Foundation nor the names of its 23 * contributors may be used to endorse or promote products derived 24 * from this software without specific prior written permission. 25 * 26 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 27 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 28 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 29 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 30 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 31 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 32 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 33 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 34 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 35 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 36 * POSSIBILITY OF SUCH DAMAGE. 37 */ 38 39#ifndef _UHCI_H_ 40#define _UHCI_H_ 41 42#define UHCI_MAX_DEVICES MIN(USB_MAX_DEVICES, 128) 43
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123/* 124 * The Queue Heads (QH) and Transfer Descriptors (TD) are accessed by 125 * both the CPU and the USB-controller which run concurrently. Great 126 * care must be taken. When the data-structures are linked into the 127 * USB controller's frame list, the USB-controller "owns" the 128 * td_status and qh_elink fields, which will not be written by the 129 * CPU. 130 * 131 */ 132 133struct uhci_td { 134/* 135 * Data used by the UHCI controller. 136 * volatile is used in order to mantain struct members ordering. 137 */ 138 volatile uint32_t td_next; 139 volatile uint32_t td_status; 140#define UHCI_TD_GET_ACTLEN(s) (((s) + 1) & 0x3ff) 141#define UHCI_TD_ZERO_ACTLEN(t) ((t) | 0x3ff) 142#define UHCI_TD_BITSTUFF 0x00020000 143#define UHCI_TD_CRCTO 0x00040000 144#define UHCI_TD_NAK 0x00080000 145#define UHCI_TD_BABBLE 0x00100000 146#define UHCI_TD_DBUFFER 0x00200000 147#define UHCI_TD_STALLED 0x00400000 148#define UHCI_TD_ACTIVE 0x00800000 149#define UHCI_TD_IOC 0x01000000 150#define UHCI_TD_IOS 0x02000000 151#define UHCI_TD_LS 0x04000000 152#define UHCI_TD_GET_ERRCNT(s) (((s) >> 27) & 3) 153#define UHCI_TD_SET_ERRCNT(n) ((n) << 27) 154#define UHCI_TD_SPD 0x20000000 155 volatile uint32_t td_token; 156#define UHCI_TD_PID 0x000000ff 157#define UHCI_TD_PID_IN 0x00000069 158#define UHCI_TD_PID_OUT 0x000000e1 159#define UHCI_TD_PID_SETUP 0x0000002d 160#define UHCI_TD_GET_PID(s) ((s) & 0xff) 161#define UHCI_TD_SET_DEVADDR(a) ((a) << 8) 162#define UHCI_TD_GET_DEVADDR(s) (((s) >> 8) & 0x7f) 163#define UHCI_TD_SET_ENDPT(e) (((e) & 0xf) << 15) 164#define UHCI_TD_GET_ENDPT(s) (((s) >> 15) & 0xf) 165#define UHCI_TD_SET_DT(t) ((t) << 19) 166#define UHCI_TD_GET_DT(s) (((s) >> 19) & 1) 167#define UHCI_TD_SET_MAXLEN(l) (((l)-1) << 21) 168#define UHCI_TD_GET_MAXLEN(s) ((((s) >> 21) + 1) & 0x7ff) 169#define UHCI_TD_MAXLEN_MASK 0xffe00000 170 volatile uint32_t td_buffer; 171/* 172 * Extra information needed: 173 */ 174 struct uhci_td *next; 175 struct uhci_td *prev; 176 struct uhci_td *obj_next; 177 struct usb_page_cache *page_cache; 178 struct usb_page_cache *fix_pc; 179 uint32_t td_self; 180 uint16_t len; 181} __aligned(UHCI_TD_ALIGN); 182 183typedef struct uhci_td uhci_td_t; 184 185#define UHCI_TD_ERROR (UHCI_TD_BITSTUFF | UHCI_TD_CRCTO | \ 186 UHCI_TD_BABBLE | UHCI_TD_DBUFFER | UHCI_TD_STALLED) 187 188#define UHCI_TD_SETUP(len, endp, dev) (UHCI_TD_SET_MAXLEN(len) | \ 189 UHCI_TD_SET_ENDPT(endp) | \ 190 UHCI_TD_SET_DEVADDR(dev) | \ 191 UHCI_TD_PID_SETUP) 192 193#define UHCI_TD_OUT(len, endp, dev, dt) (UHCI_TD_SET_MAXLEN(len) | \ 194 UHCI_TD_SET_ENDPT(endp) | \ 195 UHCI_TD_SET_DEVADDR(dev) | \ 196 UHCI_TD_PID_OUT | UHCI_TD_SET_DT(dt)) 197 198#define UHCI_TD_IN(len, endp, dev, dt) (UHCI_TD_SET_MAXLEN(len) | \ 199 UHCI_TD_SET_ENDPT(endp) | \ 200 UHCI_TD_SET_DEVADDR(dev) | \ 201 UHCI_TD_PID_IN | UHCI_TD_SET_DT(dt)) 202 203struct uhci_qh { 204/* 205 * Data used by the UHCI controller. 206 */ 207 volatile uint32_t qh_h_next; 208 volatile uint32_t qh_e_next; 209/* 210 * Extra information needed: 211 */ 212 struct uhci_qh *h_next; 213 struct uhci_qh *h_prev; 214 struct uhci_qh *obj_next; 215 struct uhci_td *e_next; 216 struct usb_page_cache *page_cache; 217 uint32_t qh_self; 218 uint16_t intr_pos; 219} __aligned(UHCI_QH_ALIGN); 220 221typedef struct uhci_qh uhci_qh_t; 222 223/* Maximum number of isochronous TD's and QH's interrupt */ 224#define UHCI_VFRAMELIST_COUNT 128 225#define UHCI_IFRAMELIST_COUNT (2 * UHCI_VFRAMELIST_COUNT) 226 227#if (((UHCI_VFRAMELIST_COUNT & (UHCI_VFRAMELIST_COUNT-1)) != 0) || \ 228 (UHCI_VFRAMELIST_COUNT > UHCI_FRAMELIST_COUNT)) 229#error "UHCI_VFRAMELIST_COUNT is not power of two" 230#error "or UHCI_VFRAMELIST_COUNT > UHCI_FRAMELIST_COUNT" 231#endif 232 233#if (UHCI_VFRAMELIST_COUNT < USB_MAX_FS_ISOC_FRAMES_PER_XFER) 234#error "maximum number of full-speed isochronous frames is higher than supported!" 235#endif 236 237struct uhci_config_desc { 238 struct usb_config_descriptor confd; 239 struct usb_interface_descriptor ifcd; 240 struct usb_endpoint_descriptor endpd; 241} __packed; 242 243union uhci_hub_desc { 244 struct usb_status stat; 245 struct usb_port_status ps; 246 uint8_t temp[128]; 247}; 248 249struct uhci_hw_softc { 250 struct usb_page_cache pframes_pc; 251 struct usb_page_cache isoc_start_pc[UHCI_VFRAMELIST_COUNT]; 252 struct usb_page_cache intr_start_pc[UHCI_IFRAMELIST_COUNT]; 253 struct usb_page_cache ls_ctl_start_pc; 254 struct usb_page_cache fs_ctl_start_pc; 255 struct usb_page_cache bulk_start_pc; 256 struct usb_page_cache last_qh_pc; 257 struct usb_page_cache last_td_pc; 258 259 struct usb_page pframes_pg; 260 struct usb_page isoc_start_pg[UHCI_VFRAMELIST_COUNT]; 261 struct usb_page intr_start_pg[UHCI_IFRAMELIST_COUNT]; 262 struct usb_page ls_ctl_start_pg; 263 struct usb_page fs_ctl_start_pg; 264 struct usb_page bulk_start_pg; 265 struct usb_page last_qh_pg; 266 struct usb_page last_td_pg; 267}; 268 269typedef struct uhci_softc { 270 struct uhci_hw_softc sc_hw; 271 struct usb_bus sc_bus; /* base device */ 272 union uhci_hub_desc sc_hub_desc; 273 struct usb_callout sc_root_intr; 274 275 struct usb_device *sc_devices[UHCI_MAX_DEVICES]; 276 /* pointer to last TD for isochronous */ 277 struct uhci_td *sc_isoc_p_last[UHCI_VFRAMELIST_COUNT]; 278 /* pointer to last QH for interrupt */ 279 struct uhci_qh *sc_intr_p_last[UHCI_IFRAMELIST_COUNT]; 280 /* pointer to last QH for low speed control */ 281 struct uhci_qh *sc_ls_ctl_p_last; 282 /* pointer to last QH for full speed control */ 283 struct uhci_qh *sc_fs_ctl_p_last; 284 /* pointer to last QH for bulk */ 285 struct uhci_qh *sc_bulk_p_last; 286 struct uhci_qh *sc_reclaim_qh_p; 287 struct uhci_qh *sc_last_qh_p; 288 struct uhci_td *sc_last_td_p; 289 struct resource *sc_io_res; 290 struct resource *sc_irq_res; 291 void *sc_intr_hdl; 292 device_t sc_dev; 293 bus_size_t sc_io_size; 294 bus_space_tag_t sc_io_tag; 295 bus_space_handle_t sc_io_hdl; 296 297 uint32_t sc_loops; /* number of QHs that wants looping */ 298 299 uint16_t sc_intr_stat[UHCI_IFRAMELIST_COUNT]; 300 uint16_t sc_saved_frnum; 301 302 uint8_t sc_addr; /* device address */ 303 uint8_t sc_conf; /* device configuration */ 304 uint8_t sc_isreset; /* bits set if a root hub is reset */ 305 uint8_t sc_isresumed; /* bits set if a port was resumed */ 306 uint8_t sc_saved_sof; 307 uint8_t sc_hub_idata[1]; 308 309 char sc_vendor[16]; /* vendor string for root hub */ 310} uhci_softc_t; 311 312usb_bus_mem_cb_t uhci_iterate_hw_softc; 313 314usb_error_t uhci_init(uhci_softc_t *sc); 315void uhci_suspend(uhci_softc_t *sc); 316void uhci_resume(uhci_softc_t *sc); 317void uhci_reset(uhci_softc_t *sc); 318void uhci_interrupt(uhci_softc_t *sc); 319 320#endif /* _UHCI_H_ */
| 63/* 64 * The Queue Heads (QH) and Transfer Descriptors (TD) are accessed by 65 * both the CPU and the USB-controller which run concurrently. Great 66 * care must be taken. When the data-structures are linked into the 67 * USB controller's frame list, the USB-controller "owns" the 68 * td_status and qh_elink fields, which will not be written by the 69 * CPU. 70 * 71 */ 72 73struct uhci_td { 74/* 75 * Data used by the UHCI controller. 76 * volatile is used in order to mantain struct members ordering. 77 */ 78 volatile uint32_t td_next; 79 volatile uint32_t td_status; 80#define UHCI_TD_GET_ACTLEN(s) (((s) + 1) & 0x3ff) 81#define UHCI_TD_ZERO_ACTLEN(t) ((t) | 0x3ff) 82#define UHCI_TD_BITSTUFF 0x00020000 83#define UHCI_TD_CRCTO 0x00040000 84#define UHCI_TD_NAK 0x00080000 85#define UHCI_TD_BABBLE 0x00100000 86#define UHCI_TD_DBUFFER 0x00200000 87#define UHCI_TD_STALLED 0x00400000 88#define UHCI_TD_ACTIVE 0x00800000 89#define UHCI_TD_IOC 0x01000000 90#define UHCI_TD_IOS 0x02000000 91#define UHCI_TD_LS 0x04000000 92#define UHCI_TD_GET_ERRCNT(s) (((s) >> 27) & 3) 93#define UHCI_TD_SET_ERRCNT(n) ((n) << 27) 94#define UHCI_TD_SPD 0x20000000 95 volatile uint32_t td_token; 96#define UHCI_TD_PID 0x000000ff 97#define UHCI_TD_PID_IN 0x00000069 98#define UHCI_TD_PID_OUT 0x000000e1 99#define UHCI_TD_PID_SETUP 0x0000002d 100#define UHCI_TD_GET_PID(s) ((s) & 0xff) 101#define UHCI_TD_SET_DEVADDR(a) ((a) << 8) 102#define UHCI_TD_GET_DEVADDR(s) (((s) >> 8) & 0x7f) 103#define UHCI_TD_SET_ENDPT(e) (((e) & 0xf) << 15) 104#define UHCI_TD_GET_ENDPT(s) (((s) >> 15) & 0xf) 105#define UHCI_TD_SET_DT(t) ((t) << 19) 106#define UHCI_TD_GET_DT(s) (((s) >> 19) & 1) 107#define UHCI_TD_SET_MAXLEN(l) (((l)-1) << 21) 108#define UHCI_TD_GET_MAXLEN(s) ((((s) >> 21) + 1) & 0x7ff) 109#define UHCI_TD_MAXLEN_MASK 0xffe00000 110 volatile uint32_t td_buffer; 111/* 112 * Extra information needed: 113 */ 114 struct uhci_td *next; 115 struct uhci_td *prev; 116 struct uhci_td *obj_next; 117 struct usb_page_cache *page_cache; 118 struct usb_page_cache *fix_pc; 119 uint32_t td_self; 120 uint16_t len; 121} __aligned(UHCI_TD_ALIGN); 122 123typedef struct uhci_td uhci_td_t; 124 125#define UHCI_TD_ERROR (UHCI_TD_BITSTUFF | UHCI_TD_CRCTO | \ 126 UHCI_TD_BABBLE | UHCI_TD_DBUFFER | UHCI_TD_STALLED) 127 128#define UHCI_TD_SETUP(len, endp, dev) (UHCI_TD_SET_MAXLEN(len) | \ 129 UHCI_TD_SET_ENDPT(endp) | \ 130 UHCI_TD_SET_DEVADDR(dev) | \ 131 UHCI_TD_PID_SETUP) 132 133#define UHCI_TD_OUT(len, endp, dev, dt) (UHCI_TD_SET_MAXLEN(len) | \ 134 UHCI_TD_SET_ENDPT(endp) | \ 135 UHCI_TD_SET_DEVADDR(dev) | \ 136 UHCI_TD_PID_OUT | UHCI_TD_SET_DT(dt)) 137 138#define UHCI_TD_IN(len, endp, dev, dt) (UHCI_TD_SET_MAXLEN(len) | \ 139 UHCI_TD_SET_ENDPT(endp) | \ 140 UHCI_TD_SET_DEVADDR(dev) | \ 141 UHCI_TD_PID_IN | UHCI_TD_SET_DT(dt)) 142 143struct uhci_qh { 144/* 145 * Data used by the UHCI controller. 146 */ 147 volatile uint32_t qh_h_next; 148 volatile uint32_t qh_e_next; 149/* 150 * Extra information needed: 151 */ 152 struct uhci_qh *h_next; 153 struct uhci_qh *h_prev; 154 struct uhci_qh *obj_next; 155 struct uhci_td *e_next; 156 struct usb_page_cache *page_cache; 157 uint32_t qh_self; 158 uint16_t intr_pos; 159} __aligned(UHCI_QH_ALIGN); 160 161typedef struct uhci_qh uhci_qh_t; 162 163/* Maximum number of isochronous TD's and QH's interrupt */ 164#define UHCI_VFRAMELIST_COUNT 128 165#define UHCI_IFRAMELIST_COUNT (2 * UHCI_VFRAMELIST_COUNT) 166 167#if (((UHCI_VFRAMELIST_COUNT & (UHCI_VFRAMELIST_COUNT-1)) != 0) || \ 168 (UHCI_VFRAMELIST_COUNT > UHCI_FRAMELIST_COUNT)) 169#error "UHCI_VFRAMELIST_COUNT is not power of two" 170#error "or UHCI_VFRAMELIST_COUNT > UHCI_FRAMELIST_COUNT" 171#endif 172 173#if (UHCI_VFRAMELIST_COUNT < USB_MAX_FS_ISOC_FRAMES_PER_XFER) 174#error "maximum number of full-speed isochronous frames is higher than supported!" 175#endif 176 177struct uhci_config_desc { 178 struct usb_config_descriptor confd; 179 struct usb_interface_descriptor ifcd; 180 struct usb_endpoint_descriptor endpd; 181} __packed; 182 183union uhci_hub_desc { 184 struct usb_status stat; 185 struct usb_port_status ps; 186 uint8_t temp[128]; 187}; 188 189struct uhci_hw_softc { 190 struct usb_page_cache pframes_pc; 191 struct usb_page_cache isoc_start_pc[UHCI_VFRAMELIST_COUNT]; 192 struct usb_page_cache intr_start_pc[UHCI_IFRAMELIST_COUNT]; 193 struct usb_page_cache ls_ctl_start_pc; 194 struct usb_page_cache fs_ctl_start_pc; 195 struct usb_page_cache bulk_start_pc; 196 struct usb_page_cache last_qh_pc; 197 struct usb_page_cache last_td_pc; 198 199 struct usb_page pframes_pg; 200 struct usb_page isoc_start_pg[UHCI_VFRAMELIST_COUNT]; 201 struct usb_page intr_start_pg[UHCI_IFRAMELIST_COUNT]; 202 struct usb_page ls_ctl_start_pg; 203 struct usb_page fs_ctl_start_pg; 204 struct usb_page bulk_start_pg; 205 struct usb_page last_qh_pg; 206 struct usb_page last_td_pg; 207}; 208 209typedef struct uhci_softc { 210 struct uhci_hw_softc sc_hw; 211 struct usb_bus sc_bus; /* base device */ 212 union uhci_hub_desc sc_hub_desc; 213 struct usb_callout sc_root_intr; 214 215 struct usb_device *sc_devices[UHCI_MAX_DEVICES]; 216 /* pointer to last TD for isochronous */ 217 struct uhci_td *sc_isoc_p_last[UHCI_VFRAMELIST_COUNT]; 218 /* pointer to last QH for interrupt */ 219 struct uhci_qh *sc_intr_p_last[UHCI_IFRAMELIST_COUNT]; 220 /* pointer to last QH for low speed control */ 221 struct uhci_qh *sc_ls_ctl_p_last; 222 /* pointer to last QH for full speed control */ 223 struct uhci_qh *sc_fs_ctl_p_last; 224 /* pointer to last QH for bulk */ 225 struct uhci_qh *sc_bulk_p_last; 226 struct uhci_qh *sc_reclaim_qh_p; 227 struct uhci_qh *sc_last_qh_p; 228 struct uhci_td *sc_last_td_p; 229 struct resource *sc_io_res; 230 struct resource *sc_irq_res; 231 void *sc_intr_hdl; 232 device_t sc_dev; 233 bus_size_t sc_io_size; 234 bus_space_tag_t sc_io_tag; 235 bus_space_handle_t sc_io_hdl; 236 237 uint32_t sc_loops; /* number of QHs that wants looping */ 238 239 uint16_t sc_intr_stat[UHCI_IFRAMELIST_COUNT]; 240 uint16_t sc_saved_frnum; 241 242 uint8_t sc_addr; /* device address */ 243 uint8_t sc_conf; /* device configuration */ 244 uint8_t sc_isreset; /* bits set if a root hub is reset */ 245 uint8_t sc_isresumed; /* bits set if a port was resumed */ 246 uint8_t sc_saved_sof; 247 uint8_t sc_hub_idata[1]; 248 249 char sc_vendor[16]; /* vendor string for root hub */ 250} uhci_softc_t; 251 252usb_bus_mem_cb_t uhci_iterate_hw_softc; 253 254usb_error_t uhci_init(uhci_softc_t *sc); 255void uhci_suspend(uhci_softc_t *sc); 256void uhci_resume(uhci_softc_t *sc); 257void uhci_reset(uhci_softc_t *sc); 258void uhci_interrupt(uhci_softc_t *sc); 259 260#endif /* _UHCI_H_ */
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