1/*- 2 * Copyright (c) 2008 Sam Leffler. All rights reserved. 3 * 4 * Redistribution and use in source and binary forms, with or without 5 * modification, are permitted provided that the following conditions 6 * are met: 7 * 1. Redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer. 9 * 2. Redistributions in binary form must reproduce the above copyright 10 * notice, this list of conditions and the following disclaimer in the 11 * documentation and/or other materials provided with the distribution. 12 * 13 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 14 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 15 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 16 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 17 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 18 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 19 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 20 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 21 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 22 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 23 */ 24 25/* 26 * IXP435 attachment driver for the USB Enhanced Host Controller. 27 */ 28 29#include <sys/cdefs.h>
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30__FBSDID("$FreeBSD: head/sys/dev/usb/controller/ehci_ixp4xx.c 190755 2009-04-06 00:32:54Z thompsa $");
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30__FBSDID("$FreeBSD: head/sys/dev/usb/controller/ehci_ixp4xx.c 194228 2009-06-15 01:02:43Z thompsa $"); |
31 32#include "opt_bus.h" 33 34#include <dev/usb/usb_mfunc.h> 35#include <dev/usb/usb.h> 36 37#include <dev/usb/usb_core.h> 38#include <dev/usb/usb_busdma.h> 39#include <dev/usb/usb_process.h> 40#include <dev/usb/usb_util.h> 41 42#include <dev/usb/usb_controller.h> 43#include <dev/usb/usb_bus.h> 44#include <dev/usb/controller/ehci.h> 45 46#include <arm/xscale/ixp425/ixp425reg.h> 47#include <arm/xscale/ixp425/ixp425var.h> 48 49#define EHCI_VENDORID_IXP4XX 0x42fa05 50#define EHCI_HC_DEVSTR "IXP4XX Integrated USB 2.0 controller" 51 52struct ixp_ehci_softc { 53 ehci_softc_t base; /* storage for EHCI code */ 54 bus_space_tag_t iot; 55 bus_space_handle_t ioh; 56 struct bus_space tag; /* tag for private bus space ops */ 57}; 58 59static device_attach_t ehci_ixp_attach; 60static device_detach_t ehci_ixp_detach; 61static device_shutdown_t ehci_ixp_shutdown; 62static device_suspend_t ehci_ixp_suspend; 63static device_resume_t ehci_ixp_resume; 64 65static uint8_t ehci_bs_r_1(void *, bus_space_handle_t, bus_size_t); 66static void ehci_bs_w_1(void *, bus_space_handle_t, bus_size_t, u_int8_t); 67static uint16_t ehci_bs_r_2(void *, bus_space_handle_t, bus_size_t); 68static void ehci_bs_w_2(void *, bus_space_handle_t, bus_size_t, uint16_t); 69static uint32_t ehci_bs_r_4(void *, bus_space_handle_t, bus_size_t); 70static void ehci_bs_w_4(void *, bus_space_handle_t, bus_size_t, uint32_t); 71 72static int 73ehci_ixp_suspend(device_t self) 74{ 75 ehci_softc_t *sc = device_get_softc(self); 76 int err; 77 78 err = bus_generic_suspend(self); 79 if (err) 80 return (err); 81 ehci_suspend(sc); 82 return (0); 83} 84 85static int 86ehci_ixp_resume(device_t self) 87{ 88 ehci_softc_t *sc = device_get_softc(self); 89 90 ehci_resume(sc); 91 92 bus_generic_resume(self); 93 94 return (0); 95} 96 97static int 98ehci_ixp_shutdown(device_t self) 99{ 100 ehci_softc_t *sc = device_get_softc(self); 101 int err; 102 103 err = bus_generic_shutdown(self); 104 if (err) 105 return (err); 106 ehci_shutdown(sc); 107 108 return (0); 109} 110 111static int 112ehci_ixp_probe(device_t self) 113{ 114 115 device_set_desc(self, EHCI_HC_DEVSTR); 116 117 return (BUS_PROBE_DEFAULT); 118} 119 120static int 121ehci_ixp_attach(device_t self) 122{ 123 struct ixp_ehci_softc *isc = device_get_softc(self); 124 ehci_softc_t *sc = &isc->base; 125 int err; 126 int rid; 127 128 /* initialise some bus fields */ 129 sc->sc_bus.parent = self; 130 sc->sc_bus.devices = sc->sc_devices; 131 sc->sc_bus.devices_max = EHCI_MAX_DEVICES; 132 133 /* get all DMA memory */
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134 if (usb2_bus_mem_alloc_all(&sc->sc_bus,
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134 if (usb_bus_mem_alloc_all(&sc->sc_bus, |
135 USB_GET_DMA_TAG(self), &ehci_iterate_hw_softc)) { 136 return (ENOMEM); 137 } 138 139 sc->sc_bus.usbrev = USB_REV_2_0; 140 141 /* NB: hints fix the memory location and irq */ 142 143 rid = 0; 144 sc->sc_io_res = bus_alloc_resource_any(self, SYS_RES_MEMORY, &rid, RF_ACTIVE); 145 if (!sc->sc_io_res) { 146 device_printf(self, "Could not map memory\n"); 147 goto error; 148 } 149 150 /* 151 * Craft special resource for bus space ops that handle 152 * byte-alignment of non-word addresses. Also, since 153 * we're already intercepting bus space ops we handle 154 * the register window offset that could otherwise be 155 * done with bus_space_subregion. 156 */ 157 isc->iot = rman_get_bustag(sc->sc_io_res); 158 isc->tag.bs_cookie = isc->iot; 159 /* read single */ 160 isc->tag.bs_r_1 = ehci_bs_r_1, 161 isc->tag.bs_r_2 = ehci_bs_r_2, 162 isc->tag.bs_r_4 = ehci_bs_r_4, 163 /* write (single) */ 164 isc->tag.bs_w_1 = ehci_bs_w_1, 165 isc->tag.bs_w_2 = ehci_bs_w_2, 166 isc->tag.bs_w_4 = ehci_bs_w_4, 167 168 sc->sc_io_tag = &isc->tag; 169 sc->sc_io_hdl = rman_get_bushandle(sc->sc_io_res); 170 sc->sc_io_size = IXP435_USB1_SIZE - 0x100; 171 172 rid = 0; 173 sc->sc_irq_res = bus_alloc_resource_any(self, SYS_RES_IRQ, &rid, 174 RF_ACTIVE); 175 if (sc->sc_irq_res == NULL) { 176 device_printf(self, "Could not allocate irq\n"); 177 goto error; 178 } 179 sc->sc_bus.bdev = device_add_child(self, "usbus", -1); 180 if (!sc->sc_bus.bdev) { 181 device_printf(self, "Could not add USB device\n"); 182 goto error; 183 } 184 device_set_ivars(sc->sc_bus.bdev, &sc->sc_bus); 185 device_set_desc(sc->sc_bus.bdev, EHCI_HC_DEVSTR); 186 187 sprintf(sc->sc_vendor, "Intel"); 188 189 190 err = bus_setup_intr(self, sc->sc_irq_res, INTR_TYPE_BIO | INTR_MPSAFE, 191 NULL, (driver_intr_t *)ehci_interrupt, sc, &sc->sc_intr_hdl); 192 if (err) { 193 device_printf(self, "Could not setup irq, %d\n", err); 194 sc->sc_intr_hdl = NULL; 195 goto error; 196 } 197 198 /* 199 * Arrange to force Host mode, select big-endian byte alignment, 200 * and arrange to not terminate reset operations (the adapter 201 * will ignore it if we do but might as well save a reg write). 202 * Also, the controller has an embedded Transaction Translator 203 * which means port speed must be read from the Port Status 204 * register following a port enable. 205 */ 206 sc->sc_flags |= EHCI_SCFLG_TT 207 | EHCI_SCFLG_SETMODE 208 | EHCI_SCFLG_BIGEDESC 209 | EHCI_SCFLG_BIGEMMIO 210 | EHCI_SCFLG_NORESTERM 211 ; 212 (void) ehci_reset(sc); 213 214 err = ehci_init(sc); 215 if (!err) { 216 err = device_probe_and_attach(sc->sc_bus.bdev); 217 } 218 if (err) { 219 device_printf(self, "USB init failed err=%d\n", err); 220 goto error; 221 } 222 return (0); 223 224error: 225 ehci_ixp_detach(self); 226 return (ENXIO); 227} 228 229static int 230ehci_ixp_detach(device_t self) 231{ 232 struct ixp_ehci_softc *isc = device_get_softc(self); 233 ehci_softc_t *sc = &isc->base; 234 device_t bdev; 235 int err; 236 237 if (sc->sc_bus.bdev) { 238 bdev = sc->sc_bus.bdev; 239 device_detach(bdev); 240 device_delete_child(self, bdev); 241 } 242 /* during module unload there are lots of children leftover */ 243 device_delete_all_children(self); 244 245 /* 246 * disable interrupts that might have been switched on in ehci_init 247 */ 248 if (sc->sc_io_res) { 249 EWRITE4(sc, EHCI_USBINTR, 0); 250 } 251 252 if (sc->sc_irq_res && sc->sc_intr_hdl) { 253 /* 254 * only call ehci_detach() after ehci_init() 255 */ 256 ehci_detach(sc); 257 258 err = bus_teardown_intr(self, sc->sc_irq_res, sc->sc_intr_hdl); 259 260 if (err) 261 /* XXX or should we panic? */ 262 device_printf(self, "Could not tear down irq, %d\n", 263 err); 264 sc->sc_intr_hdl = NULL; 265 } 266 267 if (sc->sc_irq_res) { 268 bus_release_resource(self, SYS_RES_IRQ, 0, sc->sc_irq_res); 269 sc->sc_irq_res = NULL; 270 } 271 if (sc->sc_io_res) { 272 bus_release_resource(self, SYS_RES_MEMORY, 0, 273 sc->sc_io_res); 274 sc->sc_io_res = NULL; 275 }
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276 usb2_bus_mem_free_all(&sc->sc_bus, &ehci_iterate_hw_softc);
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276 usb_bus_mem_free_all(&sc->sc_bus, &ehci_iterate_hw_softc); |
277 278 return (0); 279} 280 281/* 282 * Bus space accessors for PIO operations. 283 */ 284 285static uint8_t 286ehci_bs_r_1(void *t, bus_space_handle_t h, bus_size_t o) 287{ 288 return bus_space_read_1((bus_space_tag_t) t, h, 289 0x100 + (o &~ 3) + (3 - (o & 3))); 290} 291 292static void 293ehci_bs_w_1(void *t, bus_space_handle_t h, bus_size_t o, u_int8_t v) 294{ 295 panic("%s", __func__); 296} 297 298static uint16_t 299ehci_bs_r_2(void *t, bus_space_handle_t h, bus_size_t o) 300{ 301 return bus_space_read_2((bus_space_tag_t) t, h, 302 0x100 + (o &~ 3) + (2 - (o & 3))); 303} 304 305static void 306ehci_bs_w_2(void *t, bus_space_handle_t h, bus_size_t o, uint16_t v) 307{ 308 panic("%s", __func__); 309} 310 311static uint32_t 312ehci_bs_r_4(void *t, bus_space_handle_t h, bus_size_t o) 313{ 314 return bus_space_read_4((bus_space_tag_t) t, h, 0x100 + o); 315} 316 317static void 318ehci_bs_w_4(void *t, bus_space_handle_t h, bus_size_t o, uint32_t v) 319{ 320 bus_space_write_4((bus_space_tag_t) t, h, 0x100 + o, v); 321} 322 323static device_method_t ehci_methods[] = { 324 /* Device interface */ 325 DEVMETHOD(device_probe, ehci_ixp_probe), 326 DEVMETHOD(device_attach, ehci_ixp_attach), 327 DEVMETHOD(device_detach, ehci_ixp_detach), 328 DEVMETHOD(device_suspend, ehci_ixp_suspend), 329 DEVMETHOD(device_resume, ehci_ixp_resume), 330 DEVMETHOD(device_shutdown, ehci_ixp_shutdown), 331 332 /* Bus interface */ 333 DEVMETHOD(bus_print_child, bus_generic_print_child), 334 335 {0, 0} 336}; 337 338static driver_t ehci_driver = { 339 "ehci", 340 ehci_methods, 341 sizeof(struct ixp_ehci_softc), 342}; 343 344static devclass_t ehci_devclass; 345 346DRIVER_MODULE(ehci, ixp, ehci_driver, ehci_devclass, 0, 0); 347MODULE_DEPEND(ehci, usb, 1, 1, 1);
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