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avr32dci.c (227461) avr32dci.c (228483)
1#include <sys/cdefs.h>
1#include <sys/cdefs.h>
2__FBSDID("$FreeBSD: head/sys/dev/usb/controller/avr32dci.c 227461 2011-11-12 08:16:45Z hselasky $");
2__FBSDID("$FreeBSD: head/sys/dev/usb/controller/avr32dci.c 228483 2011-12-14 00:28:54Z hselasky $");
3
4/*-
5 * Copyright (c) 2009 Hans Petter Selasky. All rights reserved.
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
9 * are met:
10 * 1. Redistributions of source code must retain the above copyright

--- 249 unchanged lines hidden (view full) ---

260 /* hardware should have cleared RMWKUP bit */
261}
262
263static void
264avr32dci_set_address(struct avr32dci_softc *sc, uint8_t addr)
265{
266 DPRINTFN(5, "addr=%d\n", addr);
267
3
4/*-
5 * Copyright (c) 2009 Hans Petter Selasky. All rights reserved.
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
9 * are met:
10 * 1. Redistributions of source code must retain the above copyright

--- 249 unchanged lines hidden (view full) ---

260 /* hardware should have cleared RMWKUP bit */
261}
262
263static void
264avr32dci_set_address(struct avr32dci_softc *sc, uint8_t addr)
265{
266 DPRINTFN(5, "addr=%d\n", addr);
267
268 avr32dci_mod_ctrl(sc, AVR32_UDADDR_ADDEN | addr, 0);
268 avr32dci_mod_ctrl(sc, AVR32_CTRL_DEV_FADDR_EN | addr, 0);
269}
270
271static uint8_t
272avr32dci_setup_rx(struct avr32dci_td *td)
273{
274 struct avr32dci_softc *sc;
275 struct usb_device_request req;
276 uint16_t count;

--- 219 unchanged lines hidden (view full) ---

496 buf_res.buffer, buf_res.length);
497 /* update counters */
498 count -= buf_res.length;
499 td->offset += buf_res.length;
500 td->remainder -= buf_res.length;
501 }
502
503 /* allocate FIFO bank */
269}
270
271static uint8_t
272avr32dci_setup_rx(struct avr32dci_td *td)
273{
274 struct avr32dci_softc *sc;
275 struct usb_device_request req;
276 uint16_t count;

--- 219 unchanged lines hidden (view full) ---

496 buf_res.buffer, buf_res.length);
497 /* update counters */
498 count -= buf_res.length;
499 td->offset += buf_res.length;
500 td->remainder -= buf_res.length;
501 }
502
503 /* allocate FIFO bank */
504 AVR32_WRITE_4(sc, AVR32_EPTCLRSTA(td->ep_no), AVR32_EPTSTA_TX_BK_RDY);
504 AVR32_WRITE_4(sc, AVR32_EPTCTL(td->ep_no), AVR32_EPTCTL_TX_PK_RDY);
505
506 /* check remainder */
507 if (td->remainder == 0) {
508 if (td->short_pkt) {
509 return (0); /* complete */
510 }
511 /* else we need to transmit a short packet */
512 }

--- 236 unchanged lines hidden (view full) ---

749 struct avr32dci_std_temp temp;
750 struct avr32dci_softc *sc;
751 struct avr32dci_td *td;
752 uint32_t x;
753 uint8_t ep_no;
754 uint8_t need_sync;
755
756 DPRINTFN(9, "addr=%d endpt=%d sumlen=%d speed=%d\n",
505
506 /* check remainder */
507 if (td->remainder == 0) {
508 if (td->short_pkt) {
509 return (0); /* complete */
510 }
511 /* else we need to transmit a short packet */
512 }

--- 236 unchanged lines hidden (view full) ---

749 struct avr32dci_std_temp temp;
750 struct avr32dci_softc *sc;
751 struct avr32dci_td *td;
752 uint32_t x;
753 uint8_t ep_no;
754 uint8_t need_sync;
755
756 DPRINTFN(9, "addr=%d endpt=%d sumlen=%d speed=%d\n",
757 xfer->address, UE_GET_ADDR(xfer->endpoint),
757 xfer->address, UE_GET_ADDR(xfer->endpointno),
758 xfer->sumlen, usbd_get_speed(xfer->xroot->udev));
759
760 temp.max_frame_size = xfer->max_frame_size;
761
762 td = xfer->td_start[0];
763 xfer->td_transfer_first = td;
764 xfer->td_transfer_cache = td;
765
766 /* setup temp */
767
768 temp.pc = NULL;
769 temp.td = NULL;
770 temp.td_next = xfer->td_start[0];
771 temp.offset = 0;
772 temp.setup_alt_next = xfer->flags_int.short_frames_ok;
773 temp.did_stall = !xfer->flags_int.control_stall;
774
775 sc = AVR32_BUS2SC(xfer->xroot->bus);
758 xfer->sumlen, usbd_get_speed(xfer->xroot->udev));
759
760 temp.max_frame_size = xfer->max_frame_size;
761
762 td = xfer->td_start[0];
763 xfer->td_transfer_first = td;
764 xfer->td_transfer_cache = td;
765
766 /* setup temp */
767
768 temp.pc = NULL;
769 temp.td = NULL;
770 temp.td_next = xfer->td_start[0];
771 temp.offset = 0;
772 temp.setup_alt_next = xfer->flags_int.short_frames_ok;
773 temp.did_stall = !xfer->flags_int.control_stall;
774
775 sc = AVR32_BUS2SC(xfer->xroot->bus);
776 ep_no = (xfer->endpoint & UE_ADDR);
776 ep_no = (xfer->endpointno & UE_ADDR);
777
778 /* check if we should prepend a setup message */
779
780 if (xfer->flags_int.control_xfr) {
781 if (xfer->flags_int.control_hdr) {
782
783 temp.func = &avr32dci_setup_rx;
784 temp.len = xfer->frlengths[0];

--- 8 unchanged lines hidden (view full) ---

793 avr32dci_setup_standard_chain_sub(&temp);
794 }
795 x = 1;
796 } else {
797 x = 0;
798 }
799
800 if (x != xfer->nframes) {
777
778 /* check if we should prepend a setup message */
779
780 if (xfer->flags_int.control_xfr) {
781 if (xfer->flags_int.control_hdr) {
782
783 temp.func = &avr32dci_setup_rx;
784 temp.len = xfer->frlengths[0];

--- 8 unchanged lines hidden (view full) ---

793 avr32dci_setup_standard_chain_sub(&temp);
794 }
795 x = 1;
796 } else {
797 x = 0;
798 }
799
800 if (x != xfer->nframes) {
801 if (xfer->endpoint & UE_DIR_IN) {
801 if (xfer->endpointno & UE_DIR_IN) {
802 temp.func = &avr32dci_data_tx;
803 need_sync = 1;
804 } else {
805 temp.func = &avr32dci_data_rx;
806 need_sync = 0;
807 }
808
809 /* setup "pc" pointer */

--- 57 unchanged lines hidden (view full) ---

867 }
868 /* check if we should append a status stage */
869 if (!xfer->flags_int.control_act) {
870
871 /*
872 * Send a DATA1 message and invert the current
873 * endpoint direction.
874 */
802 temp.func = &avr32dci_data_tx;
803 need_sync = 1;
804 } else {
805 temp.func = &avr32dci_data_rx;
806 need_sync = 0;
807 }
808
809 /* setup "pc" pointer */

--- 57 unchanged lines hidden (view full) ---

867 }
868 /* check if we should append a status stage */
869 if (!xfer->flags_int.control_act) {
870
871 /*
872 * Send a DATA1 message and invert the current
873 * endpoint direction.
874 */
875 if (xfer->endpoint & UE_DIR_IN) {
875 if (xfer->endpointno & UE_DIR_IN) {
876 temp.func = &avr32dci_data_rx;
877 need_sync = 0;
878 } else {
879 temp.func = &avr32dci_data_tx;
880 need_sync = 1;
881 }
882
883 avr32dci_setup_standard_chain_sub(&temp);

--- 24 unchanged lines hidden (view full) ---

908
909static void
910avr32dci_start_standard_chain(struct usb_xfer *xfer)
911{
912 DPRINTFN(9, "\n");
913
914 /* poll one time - will turn on interrupts */
915 if (avr32dci_xfer_do_fifo(xfer)) {
876 temp.func = &avr32dci_data_rx;
877 need_sync = 0;
878 } else {
879 temp.func = &avr32dci_data_tx;
880 need_sync = 1;
881 }
882
883 avr32dci_setup_standard_chain_sub(&temp);

--- 24 unchanged lines hidden (view full) ---

908
909static void
910avr32dci_start_standard_chain(struct usb_xfer *xfer)
911{
912 DPRINTFN(9, "\n");
913
914 /* poll one time - will turn on interrupts */
915 if (avr32dci_xfer_do_fifo(xfer)) {
916 uint8_t ep_no = xfer->endpoint & UE_ADDR_MASK;
916 uint8_t ep_no = xfer->endpointno & UE_ADDR;
917 struct avr32dci_softc *sc = AVR32_BUS2SC(xfer->xroot->bus);
917
918 avr32dci_mod_ien(sc, AVR32_INT_EPT_INT(ep_no), 0);
919
920 /* put transfer on interrupt queue */
921 usbd_transfer_enqueue(&xfer->xroot->bus->intr_q, xfer);
922
923 /* start timeout, if any */
924 if (xfer->timeout != 0) {

--- 82 unchanged lines hidden (view full) ---

1007}
1008
1009static void
1010avr32dci_standard_done(struct usb_xfer *xfer)
1011{
1012 usb_error_t err = 0;
1013
1014 DPRINTFN(13, "xfer=%p pipe=%p transfer done\n",
918
919 avr32dci_mod_ien(sc, AVR32_INT_EPT_INT(ep_no), 0);
920
921 /* put transfer on interrupt queue */
922 usbd_transfer_enqueue(&xfer->xroot->bus->intr_q, xfer);
923
924 /* start timeout, if any */
925 if (xfer->timeout != 0) {

--- 82 unchanged lines hidden (view full) ---

1008}
1009
1010static void
1011avr32dci_standard_done(struct usb_xfer *xfer)
1012{
1013 usb_error_t err = 0;
1014
1015 DPRINTFN(13, "xfer=%p pipe=%p transfer done\n",
1015 xfer, xfer->pipe);
1016 xfer, xfer->endpoint);
1016
1017 /* reset scanner */
1018
1019 xfer->td_transfer_cache = xfer->td_transfer_first;
1020
1021 if (xfer->flags_int.control_xfr) {
1022
1023 if (xfer->flags_int.control_hdr) {

--- 35 unchanged lines hidden (view full) ---

1059avr32dci_device_done(struct usb_xfer *xfer, usb_error_t error)
1060{
1061 struct avr32dci_softc *sc = AVR32_BUS2SC(xfer->xroot->bus);
1062 uint8_t ep_no;
1063
1064 USB_BUS_LOCK_ASSERT(&sc->sc_bus, MA_OWNED);
1065
1066 DPRINTFN(9, "xfer=%p, pipe=%p, error=%d\n",
1017
1018 /* reset scanner */
1019
1020 xfer->td_transfer_cache = xfer->td_transfer_first;
1021
1022 if (xfer->flags_int.control_xfr) {
1023
1024 if (xfer->flags_int.control_hdr) {

--- 35 unchanged lines hidden (view full) ---

1060avr32dci_device_done(struct usb_xfer *xfer, usb_error_t error)
1061{
1062 struct avr32dci_softc *sc = AVR32_BUS2SC(xfer->xroot->bus);
1063 uint8_t ep_no;
1064
1065 USB_BUS_LOCK_ASSERT(&sc->sc_bus, MA_OWNED);
1066
1067 DPRINTFN(9, "xfer=%p, pipe=%p, error=%d\n",
1067 xfer, xfer->pipe, error);
1068 xfer, xfer->endpoint, error);
1068
1069 if (xfer->flags_int.usb_mode == USB_MODE_DEVICE) {
1069
1070 if (xfer->flags_int.usb_mode == USB_MODE_DEVICE) {
1070 ep_no = (xfer->endpoint & UE_ADDR);
1071 ep_no = (xfer->endpointno & UE_ADDR);
1071
1072 /* disable endpoint interrupt */
1073 avr32dci_mod_ien(sc, 0, AVR32_INT_EPT_INT(ep_no));
1074
1075 DPRINTFN(15, "disabled interrupts!\n");
1076 }
1077 /* dequeue transfer and start next transfer */
1078 usbd_transfer_done(xfer, error);
1079}
1080
1081static void
1082avr32dci_set_stall(struct usb_device *udev, struct usb_xfer *xfer,
1072
1073 /* disable endpoint interrupt */
1074 avr32dci_mod_ien(sc, 0, AVR32_INT_EPT_INT(ep_no));
1075
1076 DPRINTFN(15, "disabled interrupts!\n");
1077 }
1078 /* dequeue transfer and start next transfer */
1079 usbd_transfer_done(xfer, error);
1080}
1081
1082static void
1083avr32dci_set_stall(struct usb_device *udev, struct usb_xfer *xfer,
1083 struct usb_endpoint *ep, uint8_t *did_stall)
1084 struct usb_endpoint *pipe, uint8_t *did_stall)
1084{
1085 struct avr32dci_softc *sc;
1086 uint8_t ep_no;
1087
1088 USB_BUS_LOCK_ASSERT(udev->bus, MA_OWNED);
1089
1090 DPRINTFN(5, "pipe=%p\n", pipe);
1091

--- 69 unchanged lines hidden (view full) ---

1161 device_printf(sc->sc_bus.bdev, "Chip rejected configuration\n");
1162 } else {
1163 AVR32_WRITE_4(sc, AVR32_EPTCTLENB(ep_no),
1164 AVR32_EPTCTL_EPT_ENABL);
1165 }
1166}
1167
1168static void
1085{
1086 struct avr32dci_softc *sc;
1087 uint8_t ep_no;
1088
1089 USB_BUS_LOCK_ASSERT(udev->bus, MA_OWNED);
1090
1091 DPRINTFN(5, "pipe=%p\n", pipe);
1092

--- 69 unchanged lines hidden (view full) ---

1162 device_printf(sc->sc_bus.bdev, "Chip rejected configuration\n");
1163 } else {
1164 AVR32_WRITE_4(sc, AVR32_EPTCTLENB(ep_no),
1165 AVR32_EPTCTL_EPT_ENABL);
1166 }
1167}
1168
1169static void
1169avr32dci_clear_stall(struct usb_device *udev, struct usb_endpoint *ep)
1170avr32dci_clear_stall(struct usb_device *udev, struct usb_endpoint *pipe)
1170{
1171 struct avr32dci_softc *sc;
1172 struct usb_endpoint_descriptor *ed;
1173
1174 DPRINTFN(5, "pipe=%p\n", pipe);
1175
1176 USB_BUS_LOCK_ASSERT(udev->bus, MA_OWNED);
1177

--- 43 unchanged lines hidden (view full) ---

1221 /* disable interrupts */
1222 avr32dci_mod_ien(sc, 0, 0xFFFFFFFF);
1223
1224 /* enable interrupts */
1225 avr32dci_mod_ien(sc, AVR32_INT_DET_SUSPD |
1226 AVR32_INT_ENDRESET, 0);
1227
1228 /* reset all endpoints */
1171{
1172 struct avr32dci_softc *sc;
1173 struct usb_endpoint_descriptor *ed;
1174
1175 DPRINTFN(5, "pipe=%p\n", pipe);
1176
1177 USB_BUS_LOCK_ASSERT(udev->bus, MA_OWNED);
1178

--- 43 unchanged lines hidden (view full) ---

1222 /* disable interrupts */
1223 avr32dci_mod_ien(sc, 0, 0xFFFFFFFF);
1224
1225 /* enable interrupts */
1226 avr32dci_mod_ien(sc, AVR32_INT_DET_SUSPD |
1227 AVR32_INT_ENDRESET, 0);
1228
1229 /* reset all endpoints */
1229/**INDENT** Warning@1207: Extra ) */
1230 AVR32_WRITE_4(sc, AVR32_EPTRST, (1 << AVR32_EP_MAX) - 1));
1230 AVR32_WRITE_4(sc, AVR32_EPTRST, (1 << AVR32_EP_MAX) - 1);
1231
1232 /* disable all endpoints */
1233 for (n = 0; n != AVR32_EP_MAX; n++) {
1234 /* disable endpoint */
1235 AVR32_WRITE_4(sc, AVR32_EPTCTLDIS(n), AVR32_EPTCTL_EPT_ENABL);
1236 }
1237
1238 /* turn off clocks */

--- 18 unchanged lines hidden (view full) ---

1257
1258 /* turn on clocks */
1259 (sc->sc_clocks_on) (&sc->sc_bus);
1260
1261 /* disable interrupts */
1262 avr32dci_mod_ien(sc, 0, 0xFFFFFFFF);
1263
1264 /* reset all endpoints */
1231
1232 /* disable all endpoints */
1233 for (n = 0; n != AVR32_EP_MAX; n++) {
1234 /* disable endpoint */
1235 AVR32_WRITE_4(sc, AVR32_EPTCTLDIS(n), AVR32_EPTCTL_EPT_ENABL);
1236 }
1237
1238 /* turn off clocks */

--- 18 unchanged lines hidden (view full) ---

1257
1258 /* turn on clocks */
1259 (sc->sc_clocks_on) (&sc->sc_bus);
1260
1261 /* disable interrupts */
1262 avr32dci_mod_ien(sc, 0, 0xFFFFFFFF);
1263
1264 /* reset all endpoints */
1265/**INDENT** Warning@1242: Extra ) */
1266 AVR32_WRITE_4(sc, AVR32_EPTRST, (1 << AVR32_EP_MAX) - 1));
1265 AVR32_WRITE_4(sc, AVR32_EPTRST, (1 << AVR32_EP_MAX) - 1);
1267
1268 /* disable all endpoints */
1269 for (n = 0; n != AVR32_EP_MAX; n++) {
1270 /* disable endpoint */
1271 AVR32_WRITE_4(sc, AVR32_EPTCTLDIS(n), AVR32_EPTCTL_EPT_ENABL);
1272 }
1273
1274 sc->sc_flags.port_powered = 0;

--- 4 unchanged lines hidden (view full) ---

1279 sc->sc_flags.change_connect = 1;
1280
1281 avr32dci_pull_down(sc);
1282 avr32dci_clocks_off(sc);
1283
1284 USB_BUS_UNLOCK(&sc->sc_bus);
1285}
1286
1266
1267 /* disable all endpoints */
1268 for (n = 0; n != AVR32_EP_MAX; n++) {
1269 /* disable endpoint */
1270 AVR32_WRITE_4(sc, AVR32_EPTCTLDIS(n), AVR32_EPTCTL_EPT_ENABL);
1271 }
1272
1273 sc->sc_flags.port_powered = 0;

--- 4 unchanged lines hidden (view full) ---

1278 sc->sc_flags.change_connect = 1;
1279
1280 avr32dci_pull_down(sc);
1281 avr32dci_clocks_off(sc);
1282
1283 USB_BUS_UNLOCK(&sc->sc_bus);
1284}
1285
1287void
1286static void
1288avr32dci_suspend(struct avr32dci_softc *sc)
1289{
1287avr32dci_suspend(struct avr32dci_softc *sc)
1288{
1290 return;
1289 /* TODO */
1291}
1292
1290}
1291
1293void
1292static void
1294avr32dci_resume(struct avr32dci_softc *sc)
1295{
1293avr32dci_resume(struct avr32dci_softc *sc)
1294{
1296 return;
1295 /* TODO */
1297}
1298
1299static void
1300avr32dci_do_poll(struct usb_bus *bus)
1301{
1302 struct avr32dci_softc *sc = AVR32_BUS2SC(bus);
1303
1304 USB_BUS_LOCK(&sc->sc_bus);

--- 59 unchanged lines hidden (view full) ---

1364avr32dci_device_isoc_fs_enter(struct usb_xfer *xfer)
1365{
1366 struct avr32dci_softc *sc = AVR32_BUS2SC(xfer->xroot->bus);
1367 uint32_t temp;
1368 uint32_t nframes;
1369 uint8_t ep_no;
1370
1371 DPRINTFN(6, "xfer=%p next=%d nframes=%d\n",
1296}
1297
1298static void
1299avr32dci_do_poll(struct usb_bus *bus)
1300{
1301 struct avr32dci_softc *sc = AVR32_BUS2SC(bus);
1302
1303 USB_BUS_LOCK(&sc->sc_bus);

--- 59 unchanged lines hidden (view full) ---

1363avr32dci_device_isoc_fs_enter(struct usb_xfer *xfer)
1364{
1365 struct avr32dci_softc *sc = AVR32_BUS2SC(xfer->xroot->bus);
1366 uint32_t temp;
1367 uint32_t nframes;
1368 uint8_t ep_no;
1369
1370 DPRINTFN(6, "xfer=%p next=%d nframes=%d\n",
1372 xfer, xfer->pipe->isoc_next, xfer->nframes);
1371 xfer, xfer->endpoint->isoc_next, xfer->nframes);
1373
1374 /* get the current frame index */
1372
1373 /* get the current frame index */
1375 ep_no = xfer->endpoint & UE_ADDR_MASK;
1374 ep_no = xfer->endpointno & UE_ADDR;
1376 nframes = (AVR32_READ_4(sc, AVR32_FNUM) / 8);
1377
1378 nframes &= AVR32_FRAME_MASK;
1379
1380 /*
1381 * check if the frame index is within the window where the frames
1382 * will be inserted
1383 */
1375 nframes = (AVR32_READ_4(sc, AVR32_FNUM) / 8);
1376
1377 nframes &= AVR32_FRAME_MASK;
1378
1379 /*
1380 * check if the frame index is within the window where the frames
1381 * will be inserted
1382 */
1384 temp = (nframes - xfer->pipe->isoc_next) & AVR32_FRAME_MASK;
1383 temp = (nframes - xfer->endpoint->isoc_next) & AVR32_FRAME_MASK;
1385
1384
1386 if ((xfer->pipe->is_synced == 0) ||
1385 if ((xfer->endpoint->is_synced == 0) ||
1387 (temp < xfer->nframes)) {
1388 /*
1389 * If there is data underflow or the pipe queue is
1390 * empty we schedule the transfer a few frames ahead
1391 * of the current frame position. Else two isochronous
1392 * transfers might overlap.
1393 */
1386 (temp < xfer->nframes)) {
1387 /*
1388 * If there is data underflow or the pipe queue is
1389 * empty we schedule the transfer a few frames ahead
1390 * of the current frame position. Else two isochronous
1391 * transfers might overlap.
1392 */
1394 xfer->pipe->isoc_next = (nframes + 3) & AVR32_FRAME_MASK;
1395 xfer->pipe->is_synced = 1;
1396 DPRINTFN(3, "start next=%d\n", xfer->pipe->isoc_next);
1393 xfer->endpoint->isoc_next = (nframes + 3) & AVR32_FRAME_MASK;
1394 xfer->endpoint->is_synced = 1;
1395 DPRINTFN(3, "start next=%d\n", xfer->endpoint->isoc_next);
1397 }
1398 /*
1399 * compute how many milliseconds the insertion is ahead of the
1400 * current frame position:
1401 */
1396 }
1397 /*
1398 * compute how many milliseconds the insertion is ahead of the
1399 * current frame position:
1400 */
1402 temp = (xfer->pipe->isoc_next - nframes) & AVR32_FRAME_MASK;
1401 temp = (xfer->endpoint->isoc_next - nframes) & AVR32_FRAME_MASK;
1403
1404 /*
1405 * pre-compute when the isochronous transfer will be finished:
1406 */
1407 xfer->isoc_time_complete =
1408 usb_isoc_time_expand(&sc->sc_bus, nframes) + temp +
1409 xfer->nframes;
1410
1411 /* compute frame number for next insertion */
1402
1403 /*
1404 * pre-compute when the isochronous transfer will be finished:
1405 */
1406 xfer->isoc_time_complete =
1407 usb_isoc_time_expand(&sc->sc_bus, nframes) + temp +
1408 xfer->nframes;
1409
1410 /* compute frame number for next insertion */
1412 xfer->pipe->isoc_next += xfer->nframes;
1411 xfer->endpoint->isoc_next += xfer->nframes;
1413
1414 /* setup TDs */
1415 avr32dci_setup_standard_chain(xfer);
1416}
1417
1418static void
1419avr32dci_device_isoc_fs_start(struct usb_xfer *xfer)
1420{

--- 406 unchanged lines hidden (view full) ---

1827
1828 /* reset data toggle */
1829 AVR32_WRITE_4(sc, AVR32_EPTCLRSTA(0), AVR32_EPTSTA_TOGGLESQ);
1830
1831 /* clear stall */
1832 AVR32_WRITE_4(sc, AVR32_EPTCLRSTA(0), AVR32_EPTSTA_FRCESTALL);
1833
1834 /* configure */
1412
1413 /* setup TDs */
1414 avr32dci_setup_standard_chain(xfer);
1415}
1416
1417static void
1418avr32dci_device_isoc_fs_start(struct usb_xfer *xfer)
1419{

--- 406 unchanged lines hidden (view full) ---

1826
1827 /* reset data toggle */
1828 AVR32_WRITE_4(sc, AVR32_EPTCLRSTA(0), AVR32_EPTSTA_TOGGLESQ);
1829
1830 /* clear stall */
1831 AVR32_WRITE_4(sc, AVR32_EPTCLRSTA(0), AVR32_EPTSTA_FRCESTALL);
1832
1833 /* configure */
1835 AVR32_WRITE_4(sc, AVR32_EPTCFG(0), AVR32_EPTCFG_TYPE_CONTROL |
1834 AVR32_WRITE_4(sc, AVR32_EPTCFG(0), AVR32_EPTCFG_TYPE_CTRL |
1836 AVR32_EPTCFG_NBANK(1) | AVR32_EPTCFG_EPSIZE(6));
1837
1838 temp = AVR32_READ_4(sc, AVR32_EPTCFG(0));
1839
1840 if (!(temp & AVR32_EPTCFG_EPT_MAPD)) {
1841 device_printf(sc->sc_bus.bdev,
1842 "Chip rejected configuration\n");
1843 } else {

--- 125 unchanged lines hidden (view full) ---

1969 parm->hc_max_packet_count = 1;
1970 parm->hc_max_frame_size = 0x400;
1971
1972 usbd_transfer_setup_sub(parm);
1973
1974 /*
1975 * compute maximum number of TDs
1976 */
1835 AVR32_EPTCFG_NBANK(1) | AVR32_EPTCFG_EPSIZE(6));
1836
1837 temp = AVR32_READ_4(sc, AVR32_EPTCFG(0));
1838
1839 if (!(temp & AVR32_EPTCFG_EPT_MAPD)) {
1840 device_printf(sc->sc_bus.bdev,
1841 "Chip rejected configuration\n");
1842 } else {

--- 125 unchanged lines hidden (view full) ---

1968 parm->hc_max_packet_count = 1;
1969 parm->hc_max_frame_size = 0x400;
1970
1971 usbd_transfer_setup_sub(parm);
1972
1973 /*
1974 * compute maximum number of TDs
1975 */
1977 if ((xfer->pipe->edesc->bmAttributes & UE_XFERTYPE) == UE_CONTROL) {
1976 if ((xfer->endpoint->edesc->bmAttributes & UE_XFERTYPE) == UE_CONTROL) {
1978
1979 ntd = xfer->nframes + 1 /* STATUS */ + 1 /* SYNC 1 */
1980 + 1 /* SYNC 2 */ ;
1981 } else {
1982
1983 ntd = xfer->nframes + 1 /* SYNC */ ;
1984 }
1985

--- 6 unchanged lines hidden (view full) ---

1992 /*
1993 * allocate transfer descriptors
1994 */
1995 last_obj = NULL;
1996
1997 /*
1998 * get profile stuff
1999 */
1977
1978 ntd = xfer->nframes + 1 /* STATUS */ + 1 /* SYNC 1 */
1979 + 1 /* SYNC 2 */ ;
1980 } else {
1981
1982 ntd = xfer->nframes + 1 /* SYNC */ ;
1983 }
1984

--- 6 unchanged lines hidden (view full) ---

1991 /*
1992 * allocate transfer descriptors
1993 */
1994 last_obj = NULL;
1995
1996 /*
1997 * get profile stuff
1998 */
2000 ep_no = xfer->endpoint & UE_ADDR;
1999 ep_no = xfer->endpointno & UE_ADDR;
2001 avr32dci_get_hw_ep_profile(parm->udev, &pf, ep_no);
2002
2003 if (pf == NULL) {
2004 /* should not happen */
2005 parm->err = USB_ERR_INVAL;
2006 return;
2007 }
2008 /* align data */

--- 31 unchanged lines hidden (view full) ---

2040static void
2041avr32dci_xfer_unsetup(struct usb_xfer *xfer)
2042{
2043 return;
2044}
2045
2046static void
2047avr32dci_ep_init(struct usb_device *udev, struct usb_endpoint_descriptor *edesc,
2000 avr32dci_get_hw_ep_profile(parm->udev, &pf, ep_no);
2001
2002 if (pf == NULL) {
2003 /* should not happen */
2004 parm->err = USB_ERR_INVAL;
2005 return;
2006 }
2007 /* align data */

--- 31 unchanged lines hidden (view full) ---

2039static void
2040avr32dci_xfer_unsetup(struct usb_xfer *xfer)
2041{
2042 return;
2043}
2044
2045static void
2046avr32dci_ep_init(struct usb_device *udev, struct usb_endpoint_descriptor *edesc,
2048 struct usb_endpoint *ep)
2047 struct usb_endpoint *pipe)
2049{
2050 struct avr32dci_softc *sc = AVR32_BUS2SC(udev->bus);
2051
2052 DPRINTFN(2, "pipe=%p, addr=%d, endpt=%d, mode=%d (%d,%d)\n",
2053 pipe, udev->address,
2054 edesc->bEndpointAddress, udev->flags.usb_mode,
2055 sc->sc_rt_addr, udev->device_index);
2056

--- 10 unchanged lines hidden (view full) ---

2067 }
2068 if ((edesc->bmAttributes & UE_XFERTYPE) == UE_ISOCHRONOUS)
2069 pipe->methods = &avr32dci_device_isoc_fs_methods;
2070 else
2071 pipe->methods = &avr32dci_device_non_isoc_methods;
2072 }
2073}
2074
2048{
2049 struct avr32dci_softc *sc = AVR32_BUS2SC(udev->bus);
2050
2051 DPRINTFN(2, "pipe=%p, addr=%d, endpt=%d, mode=%d (%d,%d)\n",
2052 pipe, udev->address,
2053 edesc->bEndpointAddress, udev->flags.usb_mode,
2054 sc->sc_rt_addr, udev->device_index);
2055

--- 10 unchanged lines hidden (view full) ---

2066 }
2067 if ((edesc->bmAttributes & UE_XFERTYPE) == UE_ISOCHRONOUS)
2068 pipe->methods = &avr32dci_device_isoc_fs_methods;
2069 else
2070 pipe->methods = &avr32dci_device_non_isoc_methods;
2071 }
2072}
2073
2074static void
2075avr32dci_set_hw_power_sleep(struct usb_bus *bus, uint32_t state)
2076{
2077 struct avr32dci_softc *sc = AVR32_BUS2SC(bus);
2078
2079 switch (state) {
2080 case USB_HW_POWER_SUSPEND:
2081 avr32dci_suspend(sc);
2082 break;
2083 case USB_HW_POWER_SHUTDOWN:
2084 avr32dci_uninit(sc);
2085 break;
2086 case USB_HW_POWER_RESUME:
2087 avr32dci_resume(sc);
2088 break;
2089 default:
2090 break;
2091 }
2092}
2093
2075struct usb_bus_methods avr32dci_bus_methods =
2076{
2077 .endpoint_init = &avr32dci_ep_init,
2078 .xfer_setup = &avr32dci_xfer_setup,
2079 .xfer_unsetup = &avr32dci_xfer_unsetup,
2080 .get_hw_ep_profile = &avr32dci_get_hw_ep_profile,
2081 .set_stall = &avr32dci_set_stall,
2082 .clear_stall = &avr32dci_clear_stall,
2083 .roothub_exec = &avr32dci_roothub_exec,
2084 .xfer_poll = &avr32dci_do_poll,
2094struct usb_bus_methods avr32dci_bus_methods =
2095{
2096 .endpoint_init = &avr32dci_ep_init,
2097 .xfer_setup = &avr32dci_xfer_setup,
2098 .xfer_unsetup = &avr32dci_xfer_unsetup,
2099 .get_hw_ep_profile = &avr32dci_get_hw_ep_profile,
2100 .set_stall = &avr32dci_set_stall,
2101 .clear_stall = &avr32dci_clear_stall,
2102 .roothub_exec = &avr32dci_roothub_exec,
2103 .xfer_poll = &avr32dci_do_poll,
2104 .set_hw_power_sleep = &avr32dci_set_hw_power_sleep,
2085};
2105};