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if_tx.c (148654) if_tx.c (148887)
1/*-
2 * Copyright (c) 1997 Semen Ustimenko (semenu@FreeBSD.org)
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright

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20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
24 * SUCH DAMAGE.
25 */
26
27#include <sys/cdefs.h>
1/*-
2 * Copyright (c) 1997 Semen Ustimenko (semenu@FreeBSD.org)
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright

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20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
24 * SUCH DAMAGE.
25 */
26
27#include <sys/cdefs.h>
28__FBSDID("$FreeBSD: head/sys/dev/tx/if_tx.c 148654 2005-08-03 00:18:35Z rwatson $");
28__FBSDID("$FreeBSD: head/sys/dev/tx/if_tx.c 148887 2005-08-09 10:20:02Z rwatson $");
29
30/*
31 * EtherPower II 10/100 Fast Ethernet (SMC 9432 serie)
32 *
33 * These cards are based on SMC83c17x (EPIC) chip and one of the various
34 * PHYs (QS6612, AC101 and LXT970 were seen). The media support depends on
35 * card model. All cards support 10baseT/UTP and 100baseTX half- and full-
36 * duplex (SMB9432TX). SMC9432BTX also supports 10baseT/BNC. SMC9432FTX also

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562 break;
563
564 case SIOCSIFFLAGS:
565 /*
566 * If the interface is marked up and stopped, then start it.
567 * If it is marked down and running, then stop it.
568 */
569 if (ifp->if_flags & IFF_UP) {
29
30/*
31 * EtherPower II 10/100 Fast Ethernet (SMC 9432 serie)
32 *
33 * These cards are based on SMC83c17x (EPIC) chip and one of the various
34 * PHYs (QS6612, AC101 and LXT970 were seen). The media support depends on
35 * card model. All cards support 10baseT/UTP and 100baseTX half- and full-
36 * duplex (SMB9432TX). SMC9432BTX also supports 10baseT/BNC. SMC9432FTX also

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562 break;
563
564 case SIOCSIFFLAGS:
565 /*
566 * If the interface is marked up and stopped, then start it.
567 * If it is marked down and running, then stop it.
568 */
569 if (ifp->if_flags & IFF_UP) {
570 if ((ifp->if_flags & IFF_RUNNING) == 0) {
570 if ((ifp->if_drv_flags & IFF_DRV_RUNNING) == 0) {
571 epic_init(sc);
572 break;
573 }
574 } else {
571 epic_init(sc);
572 break;
573 }
574 } else {
575 if (ifp->if_flags & IFF_RUNNING) {
575 if (ifp->if_drv_flags & IFF_DRV_RUNNING) {
576 epic_stop(sc);
577 break;
578 }
579 }
580
581 /* Handle IFF_PROMISC and IFF_ALLMULTI flags. */
582 epic_stop_activity(sc);
583 epic_set_mc_table(sc);

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714 CSR_WRITE_4(sc, COMMAND, COMMAND_TXQUEUED);
715
716 /* Set watchdog timer. */
717 ifp->if_timer = 8;
718
719 BPF_MTAP(ifp, m0);
720 }
721
576 epic_stop(sc);
577 break;
578 }
579 }
580
581 /* Handle IFF_PROMISC and IFF_ALLMULTI flags. */
582 epic_stop_activity(sc);
583 epic_set_mc_table(sc);

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714 CSR_WRITE_4(sc, COMMAND, COMMAND_TXQUEUED);
715
716 /* Set watchdog timer. */
717 ifp->if_timer = 8;
718
719 BPF_MTAP(ifp, m0);
720 }
721
722 ifp->if_flags |= IFF_OACTIVE;
722 ifp->if_drv_flags |= IFF_DRV_OACTIVE;
723}
724
725/*
726 * Synopsis: Finish all received frames.
727 */
728static void
729epic_rx_done(sc)
730 epic_softc_t *sc;

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847#ifdef EPIC_DIAG
848 if ((status & 0x1001) == 0x1001)
849 device_printf(sc->dev,
850 "Tx ERROR: excessive coll. number\n");
851#endif
852 }
853
854 if (sc->pending_txs < TX_RING_SIZE)
723}
724
725/*
726 * Synopsis: Finish all received frames.
727 */
728static void
729epic_rx_done(sc)
730 epic_softc_t *sc;

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847#ifdef EPIC_DIAG
848 if ((status & 0x1001) == 0x1001)
849 device_printf(sc->dev,
850 "Tx ERROR: excessive coll. number\n");
851#endif
852 }
853
854 if (sc->pending_txs < TX_RING_SIZE)
855 sc->ifp->if_flags &= ~IFF_OACTIVE;
855 sc->ifp->if_drv_flags &= ~IFF_DRV_OACTIVE;
856 bus_dmamap_sync(sc->ttag, sc->tmap,
857 BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE);
858}
859
860/*
861 * Interrupt function
862 */
863static void

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1262{
1263 epic_softc_t *sc = xsc;
1264 struct ifnet *ifp = sc->ifp;
1265 int s, i;
1266
1267 s = splimp();
1268
1269 /* If interface is already running, then we need not do anything. */
856 bus_dmamap_sync(sc->ttag, sc->tmap,
857 BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE);
858}
859
860/*
861 * Interrupt function
862 */
863static void

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1262{
1263 epic_softc_t *sc = xsc;
1264 struct ifnet *ifp = sc->ifp;
1265 int s, i;
1266
1267 s = splimp();
1268
1269 /* If interface is already running, then we need not do anything. */
1270 if (ifp->if_flags & IFF_RUNNING) {
1270 if (ifp->if_drv_flags & IFF_DRV_RUNNING) {
1271 splx(s);
1272 return;
1273 }
1274
1275 /* Soft reset the chip (we have to power up card before). */
1276 CSR_WRITE_4(sc, GENCTL, 0);
1277 CSR_WRITE_4(sc, GENCTL, GENCTL_SOFT_RESET);
1278

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1318
1319 /* Enable interrupts, set for PCI read multiple and etc */
1320 CSR_WRITE_4(sc, GENCTL,
1321 GENCTL_ENABLE_INTERRUPT | GENCTL_MEMORY_READ_MULTIPLE |
1322 GENCTL_ONECOPY | GENCTL_RECEIVE_FIFO_THRESHOLD64);
1323
1324 /* Mark interface running ... */
1325 if (ifp->if_flags & IFF_UP)
1271 splx(s);
1272 return;
1273 }
1274
1275 /* Soft reset the chip (we have to power up card before). */
1276 CSR_WRITE_4(sc, GENCTL, 0);
1277 CSR_WRITE_4(sc, GENCTL, GENCTL_SOFT_RESET);
1278

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1318
1319 /* Enable interrupts, set for PCI read multiple and etc */
1320 CSR_WRITE_4(sc, GENCTL,
1321 GENCTL_ENABLE_INTERRUPT | GENCTL_MEMORY_READ_MULTIPLE |
1322 GENCTL_ONECOPY | GENCTL_RECEIVE_FIFO_THRESHOLD64);
1323
1324 /* Mark interface running ... */
1325 if (ifp->if_flags & IFF_UP)
1326 ifp->if_flags |= IFF_RUNNING;
1326 ifp->if_drv_flags |= IFF_DRV_RUNNING;
1327 else
1327 else
1328 ifp->if_flags &= ~IFF_RUNNING;
1328 ifp->if_drv_flags &= ~IFF_DRV_RUNNING;
1329
1330 /* ... and free */
1329
1330 /* ... and free */
1331 ifp->if_flags &= ~IFF_OACTIVE;
1331 ifp->if_drv_flags &= ~IFF_DRV_OACTIVE;
1332
1333 /* Start Rx process */
1334 epic_start_activity(sc);
1335
1336 /* Set appropriate media */
1337 epic_ifmedia_upd(ifp);
1338
1339 sc->stat_ch = timeout((timeout_t *)epic_stats_update, sc, hz);

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1585 /* Reset chip */
1586 CSR_WRITE_4(sc, GENCTL, GENCTL_SOFT_RESET);
1587 DELAY(1000);
1588
1589 /* Make chip go to bed */
1590 CSR_WRITE_4(sc, GENCTL, GENCTL_POWER_DOWN);
1591
1592 /* Mark as stoped */
1332
1333 /* Start Rx process */
1334 epic_start_activity(sc);
1335
1336 /* Set appropriate media */
1337 epic_ifmedia_upd(ifp);
1338
1339 sc->stat_ch = timeout((timeout_t *)epic_stats_update, sc, hz);

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1585 /* Reset chip */
1586 CSR_WRITE_4(sc, GENCTL, GENCTL_SOFT_RESET);
1587 DELAY(1000);
1588
1589 /* Make chip go to bed */
1590 CSR_WRITE_4(sc, GENCTL, GENCTL_POWER_DOWN);
1591
1592 /* Mark as stoped */
1593 sc->ifp->if_flags &= ~IFF_RUNNING;
1593 sc->ifp->if_drv_flags &= ~IFF_DRV_RUNNING;
1594
1595 splx(s);
1596}
1597
1598/*
1599 * Synopsis: This function should free all memory allocated for rings.
1600 */
1601static void

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1595 splx(s);
1596}
1597
1598/*
1599 * Synopsis: This function should free all memory allocated for rings.
1600 */
1601static void

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