tw_osl.h (169742) | tw_osl.h (172496) |
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1/* 2 * Copyright (c) 2004-07 Applied Micro Circuits Corporation. 3 * Copyright (c) 2004-05 Vinod Kashyap. 4 * All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: --- 10 unchanged lines hidden (view full) --- 19 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 20 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 21 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 23 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 25 * SUCH DAMAGE. 26 * | 1/* 2 * Copyright (c) 2004-07 Applied Micro Circuits Corporation. 3 * Copyright (c) 2004-05 Vinod Kashyap. 4 * All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: --- 10 unchanged lines hidden (view full) --- 19 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 20 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 21 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 23 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 25 * SUCH DAMAGE. 26 * |
27 * $FreeBSD: head/sys/dev/twa/tw_osl.h 169742 2007-05-19 10:12:58Z scottl $ | 27 * $FreeBSD: head/sys/dev/twa/tw_osl.h 172496 2007-10-09 17:43:57Z scottl $ |
28 */ 29 30/* 31 * AMCC'S 3ware driver for 9000 series storage controllers. 32 * 33 * Author: Vinod Kashyap 34 * Modifications by: Adam Radford | 28 */ 29 30/* 31 * AMCC'S 3ware driver for 9000 series storage controllers. 32 * 33 * Author: Vinod Kashyap 34 * Modifications by: Adam Radford |
35 * Modifications by: Manjunath Ranganathaiah |
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35 */ 36 37 38 39#ifndef TW_OSL_H 40 41#define TW_OSL_H 42 --- 4 unchanged lines hidden (view full) --- 47 48 49#define TW_OSLI_DEVICE_NAME "3ware 9000 series Storage Controller" 50 51#define TW_OSLI_MALLOC_CLASS M_TWA 52#define TW_OSLI_MAX_NUM_IOS TW_CL_MAX_SIMULTANEOUS_REQUESTS 53#define TW_OSLI_MAX_NUM_AENS 0x100 54 | 36 */ 37 38 39 40#ifndef TW_OSL_H 41 42#define TW_OSL_H 43 --- 4 unchanged lines hidden (view full) --- 48 49 50#define TW_OSLI_DEVICE_NAME "3ware 9000 series Storage Controller" 51 52#define TW_OSLI_MALLOC_CLASS M_TWA 53#define TW_OSLI_MAX_NUM_IOS TW_CL_MAX_SIMULTANEOUS_REQUESTS 54#define TW_OSLI_MAX_NUM_AENS 0x100 55 |
55//#define TW_OSLI_DEFERRED_INTR_USED | 56#define TW_OSLI_DEFERRED_INTR_USED |
56 57/* Possible values of req->state. */ 58#define TW_OSLI_REQ_STATE_INIT 0x0 /* being initialized */ 59#define TW_OSLI_REQ_STATE_BUSY 0x1 /* submitted to CL */ 60#define TW_OSLI_REQ_STATE_PENDING 0x2 /* in pending queue */ 61#define TW_OSLI_REQ_STATE_COMPLETE 0x3 /* completed by CL */ 62 63/* Possible values of req->flags. */ --- 74 unchanged lines hidden (view full) --- 138 /* Request queues and arrays. */ 139 struct tw_cl_link req_q_head[TW_OSLI_Q_COUNT]; 140 141 struct task deferred_intr_callback;/* taskqueue function */ 142 struct mtx io_lock_handle;/* general purpose lock */ 143 struct mtx *io_lock;/* ptr to general purpose lock */ 144 struct mtx q_lock_handle; /* queue manipulation lock */ 145 struct mtx *q_lock;/* ptr to queue manipulation lock */ | 57 58/* Possible values of req->state. */ 59#define TW_OSLI_REQ_STATE_INIT 0x0 /* being initialized */ 60#define TW_OSLI_REQ_STATE_BUSY 0x1 /* submitted to CL */ 61#define TW_OSLI_REQ_STATE_PENDING 0x2 /* in pending queue */ 62#define TW_OSLI_REQ_STATE_COMPLETE 0x3 /* completed by CL */ 63 64/* Possible values of req->flags. */ --- 74 unchanged lines hidden (view full) --- 139 /* Request queues and arrays. */ 140 struct tw_cl_link req_q_head[TW_OSLI_Q_COUNT]; 141 142 struct task deferred_intr_callback;/* taskqueue function */ 143 struct mtx io_lock_handle;/* general purpose lock */ 144 struct mtx *io_lock;/* ptr to general purpose lock */ 145 struct mtx q_lock_handle; /* queue manipulation lock */ 146 struct mtx *q_lock;/* ptr to queue manipulation lock */ |
147 struct mtx sim_lock_handle;/* sim lock shared with cam */ 148 struct mtx *sim_lock;/* ptr to sim lock */ |
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146 147#ifdef TW_OSL_DEBUG 148 struct tw_osli_q_stats q_stats[TW_OSLI_Q_COUNT];/* queue statistics */ 149#endif /* TW_OSL_DEBUG */ 150 151 device_t bus_dev; /* bus device */ 152 struct cdev *ctrl_dev; /* control device */ 153 struct resource *reg_res; /* register interface window */ --- 158 unchanged lines hidden --- | 149 150#ifdef TW_OSL_DEBUG 151 struct tw_osli_q_stats q_stats[TW_OSLI_Q_COUNT];/* queue statistics */ 152#endif /* TW_OSL_DEBUG */ 153 154 device_t bus_dev; /* bus device */ 155 struct cdev *ctrl_dev; /* control device */ 156 struct resource *reg_res; /* register interface window */ --- 158 unchanged lines hidden --- |