1/* 2 * Copyright (c) 2004-07 Applied Micro Circuits Corporation. 3 * Copyright (c) 2004-05 Vinod Kashyap. 4 * All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 16 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 17 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 18 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 19 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 20 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 21 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 23 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 25 * SUCH DAMAGE. 26 *
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27 * $FreeBSD: head/sys/dev/twa/tw_osl.h 169742 2007-05-19 10:12:58Z scottl $
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27 * $FreeBSD: head/sys/dev/twa/tw_osl.h 172496 2007-10-09 17:43:57Z scottl $ |
28 */ 29 30/* 31 * AMCC'S 3ware driver for 9000 series storage controllers. 32 * 33 * Author: Vinod Kashyap 34 * Modifications by: Adam Radford
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35 * Modifications by: Manjunath Ranganathaiah |
36 */ 37 38 39 40#ifndef TW_OSL_H 41 42#define TW_OSL_H 43 44 45/* 46 * OS Layer internal macros, structures and functions. 47 */ 48 49 50#define TW_OSLI_DEVICE_NAME "3ware 9000 series Storage Controller" 51 52#define TW_OSLI_MALLOC_CLASS M_TWA 53#define TW_OSLI_MAX_NUM_IOS TW_CL_MAX_SIMULTANEOUS_REQUESTS 54#define TW_OSLI_MAX_NUM_AENS 0x100 55
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55//#define TW_OSLI_DEFERRED_INTR_USED
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56#define TW_OSLI_DEFERRED_INTR_USED |
57 58/* Possible values of req->state. */ 59#define TW_OSLI_REQ_STATE_INIT 0x0 /* being initialized */ 60#define TW_OSLI_REQ_STATE_BUSY 0x1 /* submitted to CL */ 61#define TW_OSLI_REQ_STATE_PENDING 0x2 /* in pending queue */ 62#define TW_OSLI_REQ_STATE_COMPLETE 0x3 /* completed by CL */ 63 64/* Possible values of req->flags. */ 65#define TW_OSLI_REQ_FLAGS_DATA_IN (1<<0) /* read request */ 66#define TW_OSLI_REQ_FLAGS_DATA_OUT (1<<1) /* write request */ 67#define TW_OSLI_REQ_FLAGS_DATA_COPY_NEEDED (1<<2)/* data in ccb is misaligned, 68 have to copy to/from private buffer */ 69#define TW_OSLI_REQ_FLAGS_MAPPED (1<<3) /* request has been mapped */ 70#define TW_OSLI_REQ_FLAGS_IN_PROGRESS (1<<4) /* bus_dmamap_load returned 71 EINPROGRESS */ 72#define TW_OSLI_REQ_FLAGS_PASSTHRU (1<<5) /* pass through request */ 73#define TW_OSLI_REQ_FLAGS_SLEEPING (1<<6) /* owner sleeping on this cmd */ 74 75/* Possible values of sc->state. */ 76#define TW_OSLI_CTLR_STATE_OPEN (1<<0) /* control device is open */ 77#define TW_OSLI_CTLR_STATE_SIMQ_FROZEN (1<<1) /* simq frozen */ 78 79 80#ifdef TW_OSL_DEBUG 81struct tw_osli_q_stats { 82 TW_UINT32 cur_len; /* current # of items in q */ 83 TW_UINT32 max_len; /* max value reached by q_length */ 84}; 85#endif /* TW_OSL_DEBUG */ 86 87 88/* Queues of OSL internal request context packets. */ 89#define TW_OSLI_FREE_Q 0 /* free q */ 90#define TW_OSLI_BUSY_Q 1 /* q of reqs submitted to CL */ 91#define TW_OSLI_Q_COUNT 2 /* total number of queues */ 92 93/* Driver's request packet. */ 94struct tw_osli_req_context { 95 struct tw_cl_req_handle req_handle;/* tag to track req b/w OSL & CL */ 96 struct twa_softc *ctlr; /* ptr to OSL's controller context */ 97 TW_VOID *data; /* ptr to data being passed to CL */ 98 TW_UINT32 length; /* length of buf being passed to CL */ 99 100 /* 101 * ptr to, and length of data passed to us from above, in case a buffer 102 * copy was done due to non-compliance to alignment requirements 103 */ 104 TW_VOID *real_data; 105 TW_UINT32 real_length; 106 107 TW_UINT32 state; /* request state */ 108 TW_UINT32 flags; /* request flags */ 109 110 /* error encountered before request submission to CL */ 111 TW_UINT32 error_code; 112 113 /* ptr to orig req for use during callback */ 114 TW_VOID *orig_req; 115 116 struct tw_cl_link link; /* to link this request in a list */ 117 bus_dmamap_t dma_map;/* DMA map for data */ 118 struct tw_cl_req_packet req_pkt;/* req pkt understood by CL */ 119}; 120 121 122/* Per-controller structure. */ 123struct twa_softc { 124 struct tw_cl_ctlr_handle ctlr_handle; 125 struct tw_osli_req_context *req_ctxt_buf; 126 127 /* Controller state. */ 128 TW_UINT32 state; 129 TW_UINT32 flags; 130 131 TW_INT32 device_id; 132 TW_UINT32 alignment; 133 TW_UINT32 sg_size_factor; 134 135 TW_VOID *non_dma_mem; 136 TW_VOID *dma_mem; 137 TW_UINT64 dma_mem_phys; 138 139 /* Request queues and arrays. */ 140 struct tw_cl_link req_q_head[TW_OSLI_Q_COUNT]; 141 142 struct task deferred_intr_callback;/* taskqueue function */ 143 struct mtx io_lock_handle;/* general purpose lock */ 144 struct mtx *io_lock;/* ptr to general purpose lock */ 145 struct mtx q_lock_handle; /* queue manipulation lock */ 146 struct mtx *q_lock;/* ptr to queue manipulation lock */
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147 struct mtx sim_lock_handle;/* sim lock shared with cam */ 148 struct mtx *sim_lock;/* ptr to sim lock */ |
149 150#ifdef TW_OSL_DEBUG 151 struct tw_osli_q_stats q_stats[TW_OSLI_Q_COUNT];/* queue statistics */ 152#endif /* TW_OSL_DEBUG */ 153 154 device_t bus_dev; /* bus device */ 155 struct cdev *ctrl_dev; /* control device */ 156 struct resource *reg_res; /* register interface window */ 157 TW_INT32 reg_res_id; /* register resource id */ 158 bus_space_handle_t bus_handle; /* bus space handle */ 159 bus_space_tag_t bus_tag; /* bus space tag */ 160 bus_dma_tag_t parent_tag; /* parent DMA tag */ 161 bus_dma_tag_t cmd_tag; /* DMA tag for CL's DMA'able mem */ 162 bus_dma_tag_t dma_tag; /* data buffer DMA tag */ 163 bus_dma_tag_t ioctl_tag; /* ioctl data buffer DMA tag */ 164 bus_dmamap_t cmd_map; /* DMA map for CL's DMA'able mem */ 165 bus_dmamap_t ioctl_map; /* DMA map for ioctl data buffers */ 166 struct resource *irq_res; /* interrupt resource */ 167 TW_INT32 irq_res_id; /* register resource id */ 168 TW_VOID *intr_handle; /* interrupt handle */ 169 170 struct sysctl_ctx_list sysctl_ctxt; /* sysctl context */ 171 struct sysctl_oid *sysctl_tree; /* sysctl oid */ 172 173 struct cam_sim *sim; /* sim for this controller */ 174 struct cam_path *path; /* peripheral, path, tgt, lun 175 associated with this controller */ 176}; 177 178 179 180/* 181 * Queue primitives. 182 */ 183 184#ifdef TW_OSL_DEBUG 185 186#define TW_OSLI_Q_INIT(sc, q_type) do { \ 187 (sc)->q_stats[q_type].cur_len = 0; \ 188 (sc)->q_stats[q_type].max_len = 0; \ 189} while(0) 190 191 192#define TW_OSLI_Q_INSERT(sc, q_type) do { \ 193 struct tw_osli_q_stats *q_stats = &((sc)->q_stats[q_type]); \ 194 \ 195 if (++(q_stats->cur_len) > q_stats->max_len) \ 196 q_stats->max_len = q_stats->cur_len; \ 197} while(0) 198 199 200#define TW_OSLI_Q_REMOVE(sc, q_type) \ 201 (sc)->q_stats[q_type].cur_len-- 202 203 204#else /* TW_OSL_DEBUG */ 205 206#define TW_OSLI_Q_INIT(sc, q_index) 207#define TW_OSLI_Q_INSERT(sc, q_index) 208#define TW_OSLI_Q_REMOVE(sc, q_index) 209 210#endif /* TW_OSL_DEBUG */ 211 212 213 214/* Initialize a queue of requests. */ 215static __inline TW_VOID 216tw_osli_req_q_init(struct twa_softc *sc, TW_UINT8 q_type) 217{ 218 TW_CL_Q_INIT(&(sc->req_q_head[q_type])); 219 TW_OSLI_Q_INIT(sc, q_type); 220} 221 222 223 224/* Insert the given request at the head of the given queue (q_type). */ 225static __inline TW_VOID 226tw_osli_req_q_insert_head(struct tw_osli_req_context *req, TW_UINT8 q_type) 227{ 228 mtx_lock_spin(req->ctlr->q_lock); 229 TW_CL_Q_INSERT_HEAD(&(req->ctlr->req_q_head[q_type]), &(req->link)); 230 TW_OSLI_Q_INSERT(req->ctlr, q_type); 231 mtx_unlock_spin(req->ctlr->q_lock); 232} 233 234 235 236/* Insert the given request at the tail of the given queue (q_type). */ 237static __inline TW_VOID 238tw_osli_req_q_insert_tail(struct tw_osli_req_context *req, TW_UINT8 q_type) 239{ 240 mtx_lock_spin(req->ctlr->q_lock); 241 TW_CL_Q_INSERT_TAIL(&(req->ctlr->req_q_head[q_type]), &(req->link)); 242 TW_OSLI_Q_INSERT(req->ctlr, q_type); 243 mtx_unlock_spin(req->ctlr->q_lock); 244} 245 246 247 248/* Remove and return the request at the head of the given queue (q_type). */ 249static __inline struct tw_osli_req_context * 250tw_osli_req_q_remove_head(struct twa_softc *sc, TW_UINT8 q_type) 251{ 252 struct tw_osli_req_context *req = NULL; 253 struct tw_cl_link *link; 254 255 mtx_lock_spin(sc->q_lock); 256 if ((link = TW_CL_Q_FIRST_ITEM(&(sc->req_q_head[q_type]))) != 257 TW_CL_NULL) { 258 req = TW_CL_STRUCT_HEAD(link, 259 struct tw_osli_req_context, link); 260 TW_CL_Q_REMOVE_ITEM(&(sc->req_q_head[q_type]), &(req->link)); 261 TW_OSLI_Q_REMOVE(sc, q_type); 262 } 263 mtx_unlock_spin(sc->q_lock); 264 return(req); 265} 266 267 268 269/* Remove the given request from the given queue (q_type). */ 270static __inline TW_VOID 271tw_osli_req_q_remove_item(struct tw_osli_req_context *req, TW_UINT8 q_type) 272{ 273 mtx_lock_spin(req->ctlr->q_lock); 274 TW_CL_Q_REMOVE_ITEM(&(req->ctlr->req_q_head[q_type]), &(req->link)); 275 TW_OSLI_Q_REMOVE(req->ctlr, q_type); 276 mtx_unlock_spin(req->ctlr->q_lock); 277} 278 279 280 281#ifdef TW_OSL_DEBUG 282 283extern TW_INT32 TW_DEBUG_LEVEL_FOR_OSL; 284 285#define tw_osli_dbg_dprintf(dbg_level, sc, fmt, args...) \ 286 if (dbg_level <= TW_DEBUG_LEVEL_FOR_OSL) \ 287 device_printf(sc->bus_dev, "%s: " fmt "\n", \ 288 __func__, ##args) 289 290 291#define tw_osli_dbg_printf(dbg_level, fmt, args...) \ 292 if (dbg_level <= TW_DEBUG_LEVEL_FOR_OSL) \ 293 printf("%s: " fmt "\n", __func__, ##args) 294 295#else /* TW_OSL_DEBUG */ 296 297#define tw_osli_dbg_dprintf(dbg_level, sc, fmt, args...) 298#define tw_osli_dbg_printf(dbg_level, fmt, args...) 299 300#endif /* TW_OSL_DEBUG */ 301 302 303/* For regular printing. */ 304#define twa_printf(sc, fmt, args...) \ 305 device_printf(((struct twa_softc *)(sc))->bus_dev, fmt, ##args) 306 307/* For printing in the "consistent error reporting" format. */ 308#define tw_osli_printf(sc, err_specific_desc, args...) \ 309 device_printf((sc)->bus_dev, \ 310 "%s: (0x%02X: 0x%04X): %s: " err_specific_desc "\n", ##args) 311 312 313 314#endif /* TW_OSL_H */
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