| tw_cl_io.c (169400) | tw_cl_io.c (172496) |
|---|---|
| 1/* 2 * Copyright (c) 2004-07 Applied Micro Circuits Corporation. 3 * Copyright (c) 2004-05 Vinod Kashyap 4 * All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: --- 10 unchanged lines hidden (view full) --- 19 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 20 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 21 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 23 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 25 * SUCH DAMAGE. 26 * | 1/* 2 * Copyright (c) 2004-07 Applied Micro Circuits Corporation. 3 * Copyright (c) 2004-05 Vinod Kashyap 4 * All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: --- 10 unchanged lines hidden (view full) --- 19 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 20 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 21 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 23 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 25 * SUCH DAMAGE. 26 * |
| 27 * $FreeBSD: head/sys/dev/twa/tw_cl_io.c 169400 2007-05-09 04:16:32Z scottl $ | 27 * $FreeBSD: head/sys/dev/twa/tw_cl_io.c 172496 2007-10-09 17:43:57Z scottl $ |
| 28 */ 29 30/* 31 * AMCC'S 3ware driver for 9000 series storage controllers. 32 * 33 * Author: Vinod Kashyap 34 * Modifications by: Adam Radford | 28 */ 29 30/* 31 * AMCC'S 3ware driver for 9000 series storage controllers. 32 * 33 * Author: Vinod Kashyap 34 * Modifications by: Adam Radford |
| 35 * Modifications by: Manjunath Ranganathaiah |
|
| 35 */ 36 37 38/* 39 * Common Layer I/O functions. 40 */ 41 42 --- 130 unchanged lines hidden (view full) --- 173 TW_UINT8 notify_osl_of_ctlr_busy = TW_CL_FALSE; 174 175 tw_cli_dbg_printf(10, ctlr_handle, tw_osl_cur_func(), "entered"); 176 177 /* Serialize access to the controller cmd queue. */ 178 tw_osl_get_lock(ctlr_handle, ctlr->io_lock); 179 180 /* For 9650SE first write low 4 bytes */ | 36 */ 37 38 39/* 40 * Common Layer I/O functions. 41 */ 42 43 --- 130 unchanged lines hidden (view full) --- 174 TW_UINT8 notify_osl_of_ctlr_busy = TW_CL_FALSE; 175 176 tw_cli_dbg_printf(10, ctlr_handle, tw_osl_cur_func(), "entered"); 177 178 /* Serialize access to the controller cmd queue. */ 179 tw_osl_get_lock(ctlr_handle, ctlr->io_lock); 180 181 /* For 9650SE first write low 4 bytes */ |
| 181 if (ctlr->device_id == TW_CL_DEVICE_ID_9K_E) | 182 if ((ctlr->device_id == TW_CL_DEVICE_ID_9K_E) || 183 (ctlr->device_id == TW_CL_DEVICE_ID_9K_SA)) |
| 182 tw_osl_write_reg(ctlr_handle, 183 TWA_COMMAND_QUEUE_OFFSET_LOW, 184 (TW_UINT32)(req->cmd_pkt_phys + sizeof(struct tw_cl_command_header)), 4); 185 186 /* Check to see if we can post a command. */ 187 status_reg = TW_CLI_READ_STATUS_REGISTER(ctlr_handle); 188 if ((error = tw_cli_check_ctlr_state(ctlr, status_reg))) 189 goto out; --- 25 unchanged lines hidden (view full) --- 215 } else { 216 tw_cli_dbg_printf(10, ctlr_handle, tw_osl_cur_func(), 217 "Submitting command"); 218 219 /* Insert command into busy queue */ 220 req->state = TW_CLI_REQ_STATE_BUSY; 221 tw_cli_req_q_insert_tail(req, TW_CLI_BUSY_Q); 222 | 184 tw_osl_write_reg(ctlr_handle, 185 TWA_COMMAND_QUEUE_OFFSET_LOW, 186 (TW_UINT32)(req->cmd_pkt_phys + sizeof(struct tw_cl_command_header)), 4); 187 188 /* Check to see if we can post a command. */ 189 status_reg = TW_CLI_READ_STATUS_REGISTER(ctlr_handle); 190 if ((error = tw_cli_check_ctlr_state(ctlr, status_reg))) 191 goto out; --- 25 unchanged lines hidden (view full) --- 217 } else { 218 tw_cli_dbg_printf(10, ctlr_handle, tw_osl_cur_func(), 219 "Submitting command"); 220 221 /* Insert command into busy queue */ 222 req->state = TW_CLI_REQ_STATE_BUSY; 223 tw_cli_req_q_insert_tail(req, TW_CLI_BUSY_Q); 224 |
| 223 if (ctlr->device_id == TW_CL_DEVICE_ID_9K_E) { | 225 if ((ctlr->device_id == TW_CL_DEVICE_ID_9K_E) || 226 (ctlr->device_id == TW_CL_DEVICE_ID_9K_SA)) { |
| 224 /* Now write the high 4 bytes */ 225 tw_osl_write_reg(ctlr_handle, 226 TWA_COMMAND_QUEUE_OFFSET_HIGH, 227 (TW_UINT32)(((TW_UINT64)(req->cmd_pkt_phys + sizeof(struct tw_cl_command_header)))>>32), 4); 228 } else { 229 if (ctlr->flags & TW_CL_64BIT_ADDRESSES) { 230 /* First write the low 4 bytes, then the high 4. */ 231 tw_osl_write_reg(ctlr_handle, --- 115 unchanged lines hidden (view full) --- 347 } else { 348 tw_cli_dbg_printf(5, ctlr_handle, tw_osl_cur_func(), 349 "passthru: 7k cmd pkt"); 350 cmd_7k = &(req->cmd_pkt->command.cmd_pkt_7k); 351 cmd_7k->generic.request_id = 352 (TW_UINT8)(TW_CL_SWAP16(req->request_id)); 353 if ((sgl_offset = 354 GET_SGL_OFF(cmd_7k->generic.sgl_off__opcode))) { | 227 /* Now write the high 4 bytes */ 228 tw_osl_write_reg(ctlr_handle, 229 TWA_COMMAND_QUEUE_OFFSET_HIGH, 230 (TW_UINT32)(((TW_UINT64)(req->cmd_pkt_phys + sizeof(struct tw_cl_command_header)))>>32), 4); 231 } else { 232 if (ctlr->flags & TW_CL_64BIT_ADDRESSES) { 233 /* First write the low 4 bytes, then the high 4. */ 234 tw_osl_write_reg(ctlr_handle, --- 115 unchanged lines hidden (view full) --- 350 } else { 351 tw_cli_dbg_printf(5, ctlr_handle, tw_osl_cur_func(), 352 "passthru: 7k cmd pkt"); 353 cmd_7k = &(req->cmd_pkt->command.cmd_pkt_7k); 354 cmd_7k->generic.request_id = 355 (TW_UINT8)(TW_CL_SWAP16(req->request_id)); 356 if ((sgl_offset = 357 GET_SGL_OFF(cmd_7k->generic.sgl_off__opcode))) { |
| 355 sgl = (((TW_UINT32 *)cmd_7k) + sgl_offset); | 358 if (ctlr->device_id == TW_CL_DEVICE_ID_9K_SA) 359 sgl = (((TW_UINT32 *)cmd_7k) + cmd_7k->generic.size); 360 else 361 sgl = (((TW_UINT32 *)cmd_7k) + sgl_offset); |
| 356 cmd_7k->generic.size += pt_req->sgl_entries * 357 ((ctlr->flags & TW_CL_64BIT_ADDRESSES) ? 3 : 2); 358 } 359 } 360 361 if (sgl) 362 tw_cli_fill_sg_list(ctlr, pt_req->sg_list, 363 sgl, pt_req->sgl_entries); --- 804 unchanged lines hidden (view full) --- 1168 " "); 1169 1170 /* Don't let any new commands get submitted to the controller. */ 1171 tw_osl_get_lock(ctlr_handle, ctlr->io_lock); 1172 1173 TW_CLI_SOFT_RESET(ctlr_handle); 1174 1175 if ((ctlr->device_id == TW_CL_DEVICE_ID_9K_X) || | 362 cmd_7k->generic.size += pt_req->sgl_entries * 363 ((ctlr->flags & TW_CL_64BIT_ADDRESSES) ? 3 : 2); 364 } 365 } 366 367 if (sgl) 368 tw_cli_fill_sg_list(ctlr, pt_req->sg_list, 369 sgl, pt_req->sgl_entries); --- 804 unchanged lines hidden (view full) --- 1174 " "); 1175 1176 /* Don't let any new commands get submitted to the controller. */ 1177 tw_osl_get_lock(ctlr_handle, ctlr->io_lock); 1178 1179 TW_CLI_SOFT_RESET(ctlr_handle); 1180 1181 if ((ctlr->device_id == TW_CL_DEVICE_ID_9K_X) || |
| 1176 (ctlr->device_id == TW_CL_DEVICE_ID_9K_E)) { | 1182 (ctlr->device_id == TW_CL_DEVICE_ID_9K_E) || 1183 (ctlr->device_id == TW_CL_DEVICE_ID_9K_SA)) { |
| 1177 /* 1178 * There's a hardware bug in the G133 ASIC, which can lead to 1179 * PCI parity errors and hangs, if the host accesses any 1180 * registers when the firmware is resetting the hardware, as 1181 * part of a hard/soft reset. The window of time when the 1182 * problem can occur is about 10 ms. Here, we will handshake 1183 * with the firmware to find out when the firmware is pulling 1184 * down the hardware reset pin, and wait for about 500 ms to --- 234 unchanged lines hidden --- | 1184 /* 1185 * There's a hardware bug in the G133 ASIC, which can lead to 1186 * PCI parity errors and hangs, if the host accesses any 1187 * registers when the firmware is resetting the hardware, as 1188 * part of a hard/soft reset. The window of time when the 1189 * problem can occur is about 10 ms. Here, we will handshake 1190 * with the firmware to find out when the firmware is pulling 1191 * down the hardware reset pin, and wait for about 500 ms to --- 234 unchanged lines hidden --- |