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tw_cl_init.c (169400) tw_cl_init.c (172496)
1/*
2 * Copyright (c) 2004-07 Applied Micro Circuits Corporation.
3 * Copyright (c) 2004-05 Vinod Kashyap
4 * All rights reserved.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions
8 * are met:

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19 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
20 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
21 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
23 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
25 * SUCH DAMAGE.
26 *
1/*
2 * Copyright (c) 2004-07 Applied Micro Circuits Corporation.
3 * Copyright (c) 2004-05 Vinod Kashyap
4 * All rights reserved.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions
8 * are met:

--- 10 unchanged lines hidden (view full) ---

19 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
20 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
21 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
23 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
25 * SUCH DAMAGE.
26 *
27 * $FreeBSD: head/sys/dev/twa/tw_cl_init.c 169400 2007-05-09 04:16:32Z scottl $
27 * $FreeBSD: head/sys/dev/twa/tw_cl_init.c 172496 2007-10-09 17:43:57Z scottl $
28 */
29
30/*
31 * AMCC'S 3ware driver for 9000 series storage controllers.
32 *
33 * Author: Vinod Kashyap
34 * Modifications by: Adam Radford
28 */
29
30/*
31 * AMCC'S 3ware driver for 9000 series storage controllers.
32 *
33 * Author: Vinod Kashyap
34 * Modifications by: Adam Radford
35 * Modifications by: Manjunath Ranganathaiah
35 */
36
37
38/*
39 * Common Layer initialization functions.
40 */
41
42

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60 * TW_CL_FALSE-- controller not supported
61 */
62TW_INT32
63tw_cl_ctlr_supported(TW_INT32 vendor_id, TW_INT32 device_id)
64{
65 if ((vendor_id == TW_CL_VENDOR_ID) &&
66 ((device_id == TW_CL_DEVICE_ID_9K) ||
67 (device_id == TW_CL_DEVICE_ID_9K_X) ||
36 */
37
38
39/*
40 * Common Layer initialization functions.
41 */
42
43

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61 * TW_CL_FALSE-- controller not supported
62 */
63TW_INT32
64tw_cl_ctlr_supported(TW_INT32 vendor_id, TW_INT32 device_id)
65{
66 if ((vendor_id == TW_CL_VENDOR_ID) &&
67 ((device_id == TW_CL_DEVICE_ID_9K) ||
68 (device_id == TW_CL_DEVICE_ID_9K_X) ||
68 (device_id == TW_CL_DEVICE_ID_9K_E)))
69 (device_id == TW_CL_DEVICE_ID_9K_E) ||
70 (device_id == TW_CL_DEVICE_ID_9K_SA)))
69 return(TW_CL_TRUE);
70 return(TW_CL_FALSE);
71}
72
73
74
75/*
76 * Function name: tw_cl_get_pci_bar_info

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111 *bar0_offset = 0xC;
112 *bar_size = 8;
113 break;
114 }
115 break;
116
117 case TW_CL_DEVICE_ID_9K_X:
118 case TW_CL_DEVICE_ID_9K_E:
71 return(TW_CL_TRUE);
72 return(TW_CL_FALSE);
73}
74
75
76
77/*
78 * Function name: tw_cl_get_pci_bar_info

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113 *bar0_offset = 0xC;
114 *bar_size = 8;
115 break;
116 }
117 break;
118
119 case TW_CL_DEVICE_ID_9K_X:
120 case TW_CL_DEVICE_ID_9K_E:
121 case TW_CL_DEVICE_ID_9K_SA:
119 switch(bar_type) {
120 case TW_CL_BAR_TYPE_IO:
121 *bar_num = 2;
122 *bar0_offset = 0x10;
123 *bar_size = 4;
124 break;
125
126 case TW_CL_BAR_TYPE_MEM:

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327 * address. It will then interpret the value written to the control
328 * register as the low cmd pkt address. So, for this case, we will
329 * make a note that we will need to synchronize control register writes
330 * with command register writes.
331 */
332 if ((ctlr->flags & TW_CL_64BIT_ADDRESSES) &&
333 ((ctlr->device_id == TW_CL_DEVICE_ID_9K) ||
334 (ctlr->device_id == TW_CL_DEVICE_ID_9K_X) ||
122 switch(bar_type) {
123 case TW_CL_BAR_TYPE_IO:
124 *bar_num = 2;
125 *bar0_offset = 0x10;
126 *bar_size = 4;
127 break;
128
129 case TW_CL_BAR_TYPE_MEM:

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330 * address. It will then interpret the value written to the control
331 * register as the low cmd pkt address. So, for this case, we will
332 * make a note that we will need to synchronize control register writes
333 * with command register writes.
334 */
335 if ((ctlr->flags & TW_CL_64BIT_ADDRESSES) &&
336 ((ctlr->device_id == TW_CL_DEVICE_ID_9K) ||
337 (ctlr->device_id == TW_CL_DEVICE_ID_9K_X) ||
335 (ctlr->device_id == TW_CL_DEVICE_ID_9K_E))) {
338 (ctlr->device_id == TW_CL_DEVICE_ID_9K_E) ||
339 (ctlr->device_id == TW_CL_DEVICE_ID_9K_SA))) {
336 ctlr->state |= TW_CLI_CTLR_STATE_G66_WORKAROUND_NEEDED;
337 ctlr->intr_lock = ctlr->io_lock;
338 } else {
339 ctlr->intr_lock = &(ctlr->intr_lock_handle);
340 tw_osl_init_lock(ctlr_handle, "tw_cl_intr_lock",
341 ctlr->intr_lock);
342 }
343

--- 397 unchanged lines hidden --- 		340 ctlr->state |= TW_CLI_CTLR_STATE_G66_WORKAROUND_NEEDED;
341 ctlr->intr_lock = ctlr->io_lock;
342 } else {
343 ctlr->intr_lock = &(ctlr->intr_lock_handle);
344 tw_osl_init_lock(ctlr_handle, "tw_cl_intr_lock",
345 ctlr->intr_lock);
346 }
347

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