92
93#define MEM_MAP_REG 0x14
94
95/* PCI IDs of supported chips */
96#define ES1370_PCI_ID 0x50001274
97#define ES1371_PCI_ID 0x13711274
98#define ES1371_PCI_ID2 0x13713274
99#define CT5880_PCI_ID 0x58801274
100#define CT4730_PCI_ID 0x89381102
101
102#define ES1371REV_ES1371_A 0x02
103#define ES1371REV_ES1371_B 0x09
104
105#define ES1371REV_ES1373_8 0x08
106#define ES1371REV_ES1373_A 0x04
107#define ES1371REV_ES1373_B 0x06
108
109#define ES1371REV_CT5880_A 0x07
110
111#define CT5880REV_CT5880_C 0x02
112#define CT5880REV_CT5880_D 0x03
113#define CT5880REV_CT5880_E 0x04
114
115#define CT4730REV_CT4730_A 0x00
116
117#define ES_DEFAULT_BUFSZ 4096
118
119/* 2 DAC for playback, 1 ADC for record */
120#define ES_DAC1 0
121#define ES_DAC2 1
122#define ES_ADC 2
123#define ES_NCHANS 3
124
125#define ES_DMA_SEGS_MIN 2
126#define ES_DMA_SEGS_MAX 256
127#define ES_BLK_MIN 64
128#define ES_BLK_ALIGN (~(ES_BLK_MIN - 1))
129
130#define ES1370_DAC1_MINSPEED 5512
131#define ES1370_DAC1_MAXSPEED 44100
132
133/* device private data */
134struct es_info;
135
136struct es_chinfo {
137 struct es_info *parent;
138 struct pcm_channel *channel;
139 struct snd_dbuf *buffer;
140 struct pcmchan_caps caps;
141 int dir, num, index;
142 uint32_t fmt, blksz, blkcnt, bufsz;
143 uint32_t ptr, prevptr;
144 int active;
145};
146
147/*
148 * 32bit Ensoniq Configuration (es->escfg).
149 * ----------------------------------------
150 *
151 * +-------+--------+------+------+---------+--------+---------+---------+
152 * len | 16 | 1 | 1 | 1 | 2 | 2 | 1 | 8 |
153 * +-------+--------+------+------+---------+--------+---------+---------+
154 * | fixed | single | | | | | is | general |
155 * | rate | pcm | DACx | DACy | numplay | numrec | es1370? | purpose |
156 * | | mixer | | | | | | |
157 * +-------+--------+------+------+---------+--------+---------+---------+
158 */
159#define ES_FIXED_RATE(cfgv) \
160 (((cfgv) & 0xffff0000) >> 16)
161#define ES_SET_FIXED_RATE(cfgv, nv) \
162 (((cfgv) & ~0xffff0000) | (((nv) & 0xffff) << 16))
163#define ES_SINGLE_PCM_MIX(cfgv) \
164 (((cfgv) & 0x8000) >> 15)
165#define ES_SET_SINGLE_PCM_MIX(cfgv, nv) \
166 (((cfgv) & ~0x8000) | (((nv) ? 1 : 0) << 15))
167#define ES_DAC_FIRST(cfgv) \
168 (((cfgv) & 0x4000) >> 14)
169#define ES_SET_DAC_FIRST(cfgv, nv) \
170 (((cfgv) & ~0x4000) | (((nv) & 0x1) << 14))
171#define ES_DAC_SECOND(cfgv) \
172 (((cfgv) & 0x2000) >> 13)
173#define ES_SET_DAC_SECOND(cfgv, nv) \
174 (((cfgv) & ~0x2000) | (((nv) & 0x1) << 13))
175#define ES_NUMPLAY(cfgv) \
176 (((cfgv) & 0x1800) >> 11)
177#define ES_SET_NUMPLAY(cfgv, nv) \
178 (((cfgv) & ~0x1800) | (((nv) & 0x3) << 11))
179#define ES_NUMREC(cfgv) \
180 (((cfgv) & 0x600) >> 9)
181#define ES_SET_NUMREC(cfgv, nv) \
182 (((cfgv) & ~0x600) | (((nv) & 0x3) << 9))
183#define ES_IS_ES1370(cfgv) \
184 (((cfgv) & 0x100) >> 8)
185#define ES_SET_IS_ES1370(cfgv, nv) \
186 (((cfgv) & ~0x100) | (((nv) ? 1 : 0) << 8))
187#define ES_GP(cfgv) \
188 ((cfgv) & 0xff)
189#define ES_SET_GP(cfgv, nv) \
190 (((cfgv) & ~0xff) | ((nv) & 0xff))
191
192#define ES_DAC1_ENABLED(cfgv) \
193 (ES_NUMPLAY(cfgv) > 1 || \
194 (ES_NUMPLAY(cfgv) == 1 && ES_DAC_FIRST(cfgv) == ES_DAC1))
195#define ES_DAC2_ENABLED(cfgv) \
196 (ES_NUMPLAY(cfgv) > 1 || \
197 (ES_NUMPLAY(cfgv) == 1 && ES_DAC_FIRST(cfgv) == ES_DAC2))
198
199/*
200 * DAC 1/2 configuration through kernel hint - hint.pcm.<unit>.dac="val"
201 *
202 * 0 = Enable both DACs - Default
203 * 1 = Enable single DAC (DAC1)
204 * 2 = Enable single DAC (DAC2)
205 * 3 = Enable both DACs, swap position (DAC2 comes first instead of DAC1)
206 */
207#define ES_DEFAULT_DAC_CFG 0
208
209struct es_info {
210 bus_space_tag_t st;
211 bus_space_handle_t sh;
212 bus_dma_tag_t parent_dmat;
213
214 struct resource *reg, *irq;
215 int regtype, regid, irqid;
216 void *ih;
217
218 device_t dev;
219 int num;
220 unsigned int bufsz, blkcnt;
221
222 /* Contents of board's registers */
223 uint32_t ctrl;
224 uint32_t sctrl;
225 uint32_t escfg;
226 struct es_chinfo ch[ES_NCHANS];
227 struct mtx *lock;
228 struct callout poll_timer;
229 int poll_ticks, polling;
230};
231
232#define ES_LOCK(sc) snd_mtxlock((sc)->lock)
233#define ES_UNLOCK(sc) snd_mtxunlock((sc)->lock)
234#define ES_LOCK_ASSERT(sc) snd_mtxassert((sc)->lock)
235
236/* prototypes */
237static void es_intr(void *);
238static uint32_t es1371_wait_src_ready(struct es_info *);
239static void es1371_src_write(struct es_info *,
240 unsigned short, unsigned short);
241static unsigned int es1371_adc_rate(struct es_info *, unsigned int, int);
242static unsigned int es1371_dac_rate(struct es_info *, unsigned int, int);
243static int es1371_init(struct es_info *);
244static int es1370_init(struct es_info *);
245static int es1370_wrcodec(struct es_info *, unsigned char, unsigned char);
246
247static uint32_t es_fmt[] = {
248 SND_FORMAT(AFMT_U8, 1, 0),
249 SND_FORMAT(AFMT_U8, 2, 0),
250 SND_FORMAT(AFMT_S16_LE, 1, 0),
251 SND_FORMAT(AFMT_S16_LE, 2, 0),
252 0
253};
254static struct pcmchan_caps es_caps = {4000, 48000, es_fmt, 0};
255
256static const struct {
257 unsigned volidx:4;
258 unsigned left:4;
259 unsigned right:4;
260 unsigned stereo:1;
261 unsigned recmask:13;
262 unsigned avail:1;
263} mixtable[SOUND_MIXER_NRDEVICES] = {
264 [SOUND_MIXER_VOLUME] = { 0, 0x0, 0x1, 1, 0x1f7f, 1 },
265 [SOUND_MIXER_PCM] = { 1, 0x2, 0x3, 1, 0x0400, 1 },
266 [SOUND_MIXER_SYNTH] = { 2, 0x4, 0x5, 1, 0x0060, 1 },
267 [SOUND_MIXER_CD] = { 3, 0x6, 0x7, 1, 0x0006, 1 },
268 [SOUND_MIXER_LINE] = { 4, 0x8, 0x9, 1, 0x0018, 1 },
269 [SOUND_MIXER_LINE1] = { 5, 0xa, 0xb, 1, 0x1800, 1 },
270 [SOUND_MIXER_LINE2] = { 6, 0xc, 0x0, 0, 0x0100, 1 },
271 [SOUND_MIXER_LINE3] = { 7, 0xd, 0x0, 0, 0x0200, 1 },
272 [SOUND_MIXER_MIC] = { 8, 0xe, 0x0, 0, 0x0001, 1 },
273 [SOUND_MIXER_OGAIN] = { 9, 0xf, 0x0, 0, 0x0000, 1 }
274};
275
276static __inline uint32_t
277es_rd(struct es_info *es, int regno, int size)
278{
279 switch (size) {
280 case 1:
281 return (bus_space_read_1(es->st, es->sh, regno));
282 case 2:
283 return (bus_space_read_2(es->st, es->sh, regno));
284 case 4:
285 return (bus_space_read_4(es->st, es->sh, regno));
286 default:
287 return (0xFFFFFFFF);
288 }
289}
290
291static __inline void
292es_wr(struct es_info *es, int regno, uint32_t data, int size)
293{
294
295 switch (size) {
296 case 1:
297 bus_space_write_1(es->st, es->sh, regno, data);
298 break;
299 case 2:
300 bus_space_write_2(es->st, es->sh, regno, data);
301 break;
302 case 4:
303 bus_space_write_4(es->st, es->sh, regno, data);
304 break;
305 }
306}
307
308/* -------------------------------------------------------------------- */
309/* The es1370 mixer interface */
310
311static int
312es1370_mixinit(struct snd_mixer *m)
313{
314 struct es_info *es;
315 int i;
316 uint32_t v;
317
318 es = mix_getdevinfo(m);
319 v = 0;
320 for (i = 0; i < SOUND_MIXER_NRDEVICES; i++) {
321 if (mixtable[i].avail)
322 v |= (1 << i);
323 }
324 /*
325 * Each DAC1/2 for ES1370 can be controlled independently
326 * DAC1 = controlled by synth
327 * DAC2 = controlled by pcm
328 * This is indeed can confuse user if DAC1 become primary playback
329 * channel. Try to be smart and combine both if necessary.
330 */
331 if (ES_SINGLE_PCM_MIX(es->escfg))
332 v &= ~(1 << SOUND_MIXER_SYNTH);
333 mix_setdevs(m, v);
334 v = 0;
335 for (i = 0; i < SOUND_MIXER_NRDEVICES; i++) {
336 if (mixtable[i].recmask)
337 v |= (1 << i);
338 }
339 if (ES_SINGLE_PCM_MIX(es->escfg)) /* ditto */
340 v &= ~(1 << SOUND_MIXER_SYNTH);
341 mix_setrecdevs(m, v);
342 return (0);
343}
344
345static int
346es1370_mixset(struct snd_mixer *m, unsigned dev, unsigned left, unsigned right)
347{
348 struct es_info *es;
349 int l, r, rl, rr, set_dac1;
350
351 if (!mixtable[dev].avail)
352 return (-1);
353 l = left;
354 r = (mixtable[dev].stereo) ? right : l;
355 if (mixtable[dev].left == 0xf)
356 rl = (l < 2) ? 0x80 : 7 - (l - 2) / 14;
357 else
| 92
93#define MEM_MAP_REG 0x14
94
95/* PCI IDs of supported chips */
96#define ES1370_PCI_ID 0x50001274
97#define ES1371_PCI_ID 0x13711274
98#define ES1371_PCI_ID2 0x13713274
99#define CT5880_PCI_ID 0x58801274
100#define CT4730_PCI_ID 0x89381102
101
102#define ES1371REV_ES1371_A 0x02
103#define ES1371REV_ES1371_B 0x09
104
105#define ES1371REV_ES1373_8 0x08
106#define ES1371REV_ES1373_A 0x04
107#define ES1371REV_ES1373_B 0x06
108
109#define ES1371REV_CT5880_A 0x07
110
111#define CT5880REV_CT5880_C 0x02
112#define CT5880REV_CT5880_D 0x03
113#define CT5880REV_CT5880_E 0x04
114
115#define CT4730REV_CT4730_A 0x00
116
117#define ES_DEFAULT_BUFSZ 4096
118
119/* 2 DAC for playback, 1 ADC for record */
120#define ES_DAC1 0
121#define ES_DAC2 1
122#define ES_ADC 2
123#define ES_NCHANS 3
124
125#define ES_DMA_SEGS_MIN 2
126#define ES_DMA_SEGS_MAX 256
127#define ES_BLK_MIN 64
128#define ES_BLK_ALIGN (~(ES_BLK_MIN - 1))
129
130#define ES1370_DAC1_MINSPEED 5512
131#define ES1370_DAC1_MAXSPEED 44100
132
133/* device private data */
134struct es_info;
135
136struct es_chinfo {
137 struct es_info *parent;
138 struct pcm_channel *channel;
139 struct snd_dbuf *buffer;
140 struct pcmchan_caps caps;
141 int dir, num, index;
142 uint32_t fmt, blksz, blkcnt, bufsz;
143 uint32_t ptr, prevptr;
144 int active;
145};
146
147/*
148 * 32bit Ensoniq Configuration (es->escfg).
149 * ----------------------------------------
150 *
151 * +-------+--------+------+------+---------+--------+---------+---------+
152 * len | 16 | 1 | 1 | 1 | 2 | 2 | 1 | 8 |
153 * +-------+--------+------+------+---------+--------+---------+---------+
154 * | fixed | single | | | | | is | general |
155 * | rate | pcm | DACx | DACy | numplay | numrec | es1370? | purpose |
156 * | | mixer | | | | | | |
157 * +-------+--------+------+------+---------+--------+---------+---------+
158 */
159#define ES_FIXED_RATE(cfgv) \
160 (((cfgv) & 0xffff0000) >> 16)
161#define ES_SET_FIXED_RATE(cfgv, nv) \
162 (((cfgv) & ~0xffff0000) | (((nv) & 0xffff) << 16))
163#define ES_SINGLE_PCM_MIX(cfgv) \
164 (((cfgv) & 0x8000) >> 15)
165#define ES_SET_SINGLE_PCM_MIX(cfgv, nv) \
166 (((cfgv) & ~0x8000) | (((nv) ? 1 : 0) << 15))
167#define ES_DAC_FIRST(cfgv) \
168 (((cfgv) & 0x4000) >> 14)
169#define ES_SET_DAC_FIRST(cfgv, nv) \
170 (((cfgv) & ~0x4000) | (((nv) & 0x1) << 14))
171#define ES_DAC_SECOND(cfgv) \
172 (((cfgv) & 0x2000) >> 13)
173#define ES_SET_DAC_SECOND(cfgv, nv) \
174 (((cfgv) & ~0x2000) | (((nv) & 0x1) << 13))
175#define ES_NUMPLAY(cfgv) \
176 (((cfgv) & 0x1800) >> 11)
177#define ES_SET_NUMPLAY(cfgv, nv) \
178 (((cfgv) & ~0x1800) | (((nv) & 0x3) << 11))
179#define ES_NUMREC(cfgv) \
180 (((cfgv) & 0x600) >> 9)
181#define ES_SET_NUMREC(cfgv, nv) \
182 (((cfgv) & ~0x600) | (((nv) & 0x3) << 9))
183#define ES_IS_ES1370(cfgv) \
184 (((cfgv) & 0x100) >> 8)
185#define ES_SET_IS_ES1370(cfgv, nv) \
186 (((cfgv) & ~0x100) | (((nv) ? 1 : 0) << 8))
187#define ES_GP(cfgv) \
188 ((cfgv) & 0xff)
189#define ES_SET_GP(cfgv, nv) \
190 (((cfgv) & ~0xff) | ((nv) & 0xff))
191
192#define ES_DAC1_ENABLED(cfgv) \
193 (ES_NUMPLAY(cfgv) > 1 || \
194 (ES_NUMPLAY(cfgv) == 1 && ES_DAC_FIRST(cfgv) == ES_DAC1))
195#define ES_DAC2_ENABLED(cfgv) \
196 (ES_NUMPLAY(cfgv) > 1 || \
197 (ES_NUMPLAY(cfgv) == 1 && ES_DAC_FIRST(cfgv) == ES_DAC2))
198
199/*
200 * DAC 1/2 configuration through kernel hint - hint.pcm.<unit>.dac="val"
201 *
202 * 0 = Enable both DACs - Default
203 * 1 = Enable single DAC (DAC1)
204 * 2 = Enable single DAC (DAC2)
205 * 3 = Enable both DACs, swap position (DAC2 comes first instead of DAC1)
206 */
207#define ES_DEFAULT_DAC_CFG 0
208
209struct es_info {
210 bus_space_tag_t st;
211 bus_space_handle_t sh;
212 bus_dma_tag_t parent_dmat;
213
214 struct resource *reg, *irq;
215 int regtype, regid, irqid;
216 void *ih;
217
218 device_t dev;
219 int num;
220 unsigned int bufsz, blkcnt;
221
222 /* Contents of board's registers */
223 uint32_t ctrl;
224 uint32_t sctrl;
225 uint32_t escfg;
226 struct es_chinfo ch[ES_NCHANS];
227 struct mtx *lock;
228 struct callout poll_timer;
229 int poll_ticks, polling;
230};
231
232#define ES_LOCK(sc) snd_mtxlock((sc)->lock)
233#define ES_UNLOCK(sc) snd_mtxunlock((sc)->lock)
234#define ES_LOCK_ASSERT(sc) snd_mtxassert((sc)->lock)
235
236/* prototypes */
237static void es_intr(void *);
238static uint32_t es1371_wait_src_ready(struct es_info *);
239static void es1371_src_write(struct es_info *,
240 unsigned short, unsigned short);
241static unsigned int es1371_adc_rate(struct es_info *, unsigned int, int);
242static unsigned int es1371_dac_rate(struct es_info *, unsigned int, int);
243static int es1371_init(struct es_info *);
244static int es1370_init(struct es_info *);
245static int es1370_wrcodec(struct es_info *, unsigned char, unsigned char);
246
247static uint32_t es_fmt[] = {
248 SND_FORMAT(AFMT_U8, 1, 0),
249 SND_FORMAT(AFMT_U8, 2, 0),
250 SND_FORMAT(AFMT_S16_LE, 1, 0),
251 SND_FORMAT(AFMT_S16_LE, 2, 0),
252 0
253};
254static struct pcmchan_caps es_caps = {4000, 48000, es_fmt, 0};
255
256static const struct {
257 unsigned volidx:4;
258 unsigned left:4;
259 unsigned right:4;
260 unsigned stereo:1;
261 unsigned recmask:13;
262 unsigned avail:1;
263} mixtable[SOUND_MIXER_NRDEVICES] = {
264 [SOUND_MIXER_VOLUME] = { 0, 0x0, 0x1, 1, 0x1f7f, 1 },
265 [SOUND_MIXER_PCM] = { 1, 0x2, 0x3, 1, 0x0400, 1 },
266 [SOUND_MIXER_SYNTH] = { 2, 0x4, 0x5, 1, 0x0060, 1 },
267 [SOUND_MIXER_CD] = { 3, 0x6, 0x7, 1, 0x0006, 1 },
268 [SOUND_MIXER_LINE] = { 4, 0x8, 0x9, 1, 0x0018, 1 },
269 [SOUND_MIXER_LINE1] = { 5, 0xa, 0xb, 1, 0x1800, 1 },
270 [SOUND_MIXER_LINE2] = { 6, 0xc, 0x0, 0, 0x0100, 1 },
271 [SOUND_MIXER_LINE3] = { 7, 0xd, 0x0, 0, 0x0200, 1 },
272 [SOUND_MIXER_MIC] = { 8, 0xe, 0x0, 0, 0x0001, 1 },
273 [SOUND_MIXER_OGAIN] = { 9, 0xf, 0x0, 0, 0x0000, 1 }
274};
275
276static __inline uint32_t
277es_rd(struct es_info *es, int regno, int size)
278{
279 switch (size) {
280 case 1:
281 return (bus_space_read_1(es->st, es->sh, regno));
282 case 2:
283 return (bus_space_read_2(es->st, es->sh, regno));
284 case 4:
285 return (bus_space_read_4(es->st, es->sh, regno));
286 default:
287 return (0xFFFFFFFF);
288 }
289}
290
291static __inline void
292es_wr(struct es_info *es, int regno, uint32_t data, int size)
293{
294
295 switch (size) {
296 case 1:
297 bus_space_write_1(es->st, es->sh, regno, data);
298 break;
299 case 2:
300 bus_space_write_2(es->st, es->sh, regno, data);
301 break;
302 case 4:
303 bus_space_write_4(es->st, es->sh, regno, data);
304 break;
305 }
306}
307
308/* -------------------------------------------------------------------- */
309/* The es1370 mixer interface */
310
311static int
312es1370_mixinit(struct snd_mixer *m)
313{
314 struct es_info *es;
315 int i;
316 uint32_t v;
317
318 es = mix_getdevinfo(m);
319 v = 0;
320 for (i = 0; i < SOUND_MIXER_NRDEVICES; i++) {
321 if (mixtable[i].avail)
322 v |= (1 << i);
323 }
324 /*
325 * Each DAC1/2 for ES1370 can be controlled independently
326 * DAC1 = controlled by synth
327 * DAC2 = controlled by pcm
328 * This is indeed can confuse user if DAC1 become primary playback
329 * channel. Try to be smart and combine both if necessary.
330 */
331 if (ES_SINGLE_PCM_MIX(es->escfg))
332 v &= ~(1 << SOUND_MIXER_SYNTH);
333 mix_setdevs(m, v);
334 v = 0;
335 for (i = 0; i < SOUND_MIXER_NRDEVICES; i++) {
336 if (mixtable[i].recmask)
337 v |= (1 << i);
338 }
339 if (ES_SINGLE_PCM_MIX(es->escfg)) /* ditto */
340 v &= ~(1 << SOUND_MIXER_SYNTH);
341 mix_setrecdevs(m, v);
342 return (0);
343}
344
345static int
346es1370_mixset(struct snd_mixer *m, unsigned dev, unsigned left, unsigned right)
347{
348 struct es_info *es;
349 int l, r, rl, rr, set_dac1;
350
351 if (!mixtable[dev].avail)
352 return (-1);
353 l = left;
354 r = (mixtable[dev].stereo) ? right : l;
355 if (mixtable[dev].left == 0xf)
356 rl = (l < 2) ? 0x80 : 7 - (l - 2) / 14;
357 else
|
368 es1370_wrcodec(es, mixtable[dev].right, rr);
369 if (set_dac1 && mixtable[SOUND_MIXER_SYNTH].stereo)
370 es1370_wrcodec(es,
371 mixtable[SOUND_MIXER_SYNTH].right, rr);
372 }
373 es1370_wrcodec(es, mixtable[dev].left, rl);
374 if (set_dac1)
375 es1370_wrcodec(es, mixtable[SOUND_MIXER_SYNTH].left, rl);
376 ES_UNLOCK(es);
377
378 return (l | (r << 8));
379}
380
381static uint32_t
382es1370_mixsetrecsrc(struct snd_mixer *m, uint32_t src)
383{
384 struct es_info *es;
385 int i, j = 0;
386
387 es = mix_getdevinfo(m);
388 if (src == 0) src = 1 << SOUND_MIXER_MIC;
389 src &= mix_getrecdevs(m);
390 for (i = 0; i < SOUND_MIXER_NRDEVICES; i++)
391 if ((src & (1 << i)) != 0) j |= mixtable[i].recmask;
392
393 ES_LOCK(es);
394 if ((src & (1 << SOUND_MIXER_PCM)) && ES_SINGLE_PCM_MIX(es->escfg) &&
395 ES_DAC1_ENABLED(es->escfg))
396 j |= mixtable[SOUND_MIXER_SYNTH].recmask;
397 es1370_wrcodec(es, CODEC_LIMIX1, j & 0x55);
398 es1370_wrcodec(es, CODEC_RIMIX1, j & 0xaa);
399 es1370_wrcodec(es, CODEC_LIMIX2, (j >> 8) & 0x17);
400 es1370_wrcodec(es, CODEC_RIMIX2, (j >> 8) & 0x0f);
401 es1370_wrcodec(es, CODEC_OMIX1, 0x7f);
402 es1370_wrcodec(es, CODEC_OMIX2, 0x3f);
403 ES_UNLOCK(es);
404
405 return (src);
406}
407
408static kobj_method_t es1370_mixer_methods[] = {
409 KOBJMETHOD(mixer_init, es1370_mixinit),
410 KOBJMETHOD(mixer_set, es1370_mixset),
411 KOBJMETHOD(mixer_setrecsrc, es1370_mixsetrecsrc),
412 KOBJMETHOD_END
413};
414MIXER_DECLARE(es1370_mixer);
415
416/* -------------------------------------------------------------------- */
417
418static int
419es1370_wrcodec(struct es_info *es, unsigned char i, unsigned char data)
420{
421 unsigned int t;
422
423 ES_LOCK_ASSERT(es);
424
425 for (t = 0; t < 0x1000; t++) {
426 if ((es_rd(es, ES1370_REG_STATUS, 4) &
427 STAT_CSTAT) == 0) {
428 es_wr(es, ES1370_REG_CODEC,
429 ((unsigned short)i << CODEC_INDEX_SHIFT) | data, 2);
430 return (0);
431 }
432 DELAY(1);
433 }
434 device_printf(es->dev, "%s: timed out\n", __func__);
435 return (-1);
436}
437
438/* -------------------------------------------------------------------- */
439
440/* channel interface */
441static void *
442eschan_init(kobj_t obj, void *devinfo, struct snd_dbuf *b,
443 struct pcm_channel *c, int dir)
444{
445 struct es_info *es = devinfo;
446 struct es_chinfo *ch;
447 uint32_t index;
448
449 ES_LOCK(es);
450
451 if (dir == PCMDIR_PLAY) {
452 index = ES_GP(es->escfg);
453 es->escfg = ES_SET_GP(es->escfg, index + 1);
454 if (index == 0)
455 index = ES_DAC_FIRST(es->escfg);
456 else if (index == 1)
457 index = ES_DAC_SECOND(es->escfg);
458 else {
459 device_printf(es->dev,
460 "Invalid ES_GP index: %d\n", index);
461 ES_UNLOCK(es);
462 return (NULL);
463 }
464 if (!(index == ES_DAC1 || index == ES_DAC2)) {
465 device_printf(es->dev, "Unknown DAC: %d\n", index + 1);
466 ES_UNLOCK(es);
467 return (NULL);
468 }
469 if (es->ch[index].channel != NULL) {
470 device_printf(es->dev, "DAC%d already initialized!\n",
471 index + 1);
472 ES_UNLOCK(es);
473 return (NULL);
474 }
475 } else
476 index = ES_ADC;
477
478 ch = &es->ch[index];
479 ch->index = index;
480 ch->num = es->num++;
481 ch->caps = es_caps;
482 if (ES_IS_ES1370(es->escfg)) {
483 if (ch->index == ES_DAC1) {
484 ch->caps.maxspeed = ES1370_DAC1_MAXSPEED;
485 ch->caps.minspeed = ES1370_DAC1_MINSPEED;
486 } else {
487 uint32_t fixed_rate = ES_FIXED_RATE(es->escfg);
488 if (!(fixed_rate < es_caps.minspeed ||
489 fixed_rate > es_caps.maxspeed)) {
490 ch->caps.maxspeed = fixed_rate;
491 ch->caps.minspeed = fixed_rate;
492 }
493 }
494 }
495 ch->parent = es;
496 ch->channel = c;
497 ch->buffer = b;
498 ch->bufsz = es->bufsz;
499 ch->blkcnt = es->blkcnt;
500 ch->blksz = ch->bufsz / ch->blkcnt;
501 ch->dir = dir;
502 ES_UNLOCK(es);
503 if (sndbuf_alloc(ch->buffer, es->parent_dmat, 0, ch->bufsz) != 0)
504 return (NULL);
505 ES_LOCK(es);
506 if (dir == PCMDIR_PLAY) {
507 if (ch->index == ES_DAC1) {
508 es_wr(es, ES1370_REG_MEMPAGE,
509 ES1370_REG_DAC1_FRAMEADR >> 8, 1);
510 es_wr(es, ES1370_REG_DAC1_FRAMEADR & 0xff,
511 sndbuf_getbufaddr(ch->buffer), 4);
512 es_wr(es, ES1370_REG_DAC1_FRAMECNT & 0xff,
513 (ch->bufsz >> 2) - 1, 4);
514 } else {
515 es_wr(es, ES1370_REG_MEMPAGE,
516 ES1370_REG_DAC2_FRAMEADR >> 8, 1);
517 es_wr(es, ES1370_REG_DAC2_FRAMEADR & 0xff,
518 sndbuf_getbufaddr(ch->buffer), 4);
519 es_wr(es, ES1370_REG_DAC2_FRAMECNT & 0xff,
520 (ch->bufsz >> 2) - 1, 4);
521 }
522 } else {
523 es_wr(es, ES1370_REG_MEMPAGE, ES1370_REG_ADC_FRAMEADR >> 8, 1);
524 es_wr(es, ES1370_REG_ADC_FRAMEADR & 0xff,
525 sndbuf_getbufaddr(ch->buffer), 4);
526 es_wr(es, ES1370_REG_ADC_FRAMECNT & 0xff,
527 (ch->bufsz >> 2) - 1, 4);
528 }
529 ES_UNLOCK(es);
530 return (ch);
531}
532
533static int
534eschan_setformat(kobj_t obj, void *data, uint32_t format)
535{
536 struct es_chinfo *ch = data;
537 struct es_info *es = ch->parent;
538
539 ES_LOCK(es);
540 if (ch->dir == PCMDIR_PLAY) {
541 if (ch->index == ES_DAC1) {
542 es->sctrl &= ~SCTRL_P1FMT;
543 if (format & AFMT_S16_LE)
544 es->sctrl |= SCTRL_P1SEB;
545 if (AFMT_CHANNEL(format) > 1)
546 es->sctrl |= SCTRL_P1SMB;
547 } else {
548 es->sctrl &= ~SCTRL_P2FMT;
549 if (format & AFMT_S16_LE)
550 es->sctrl |= SCTRL_P2SEB;
551 if (AFMT_CHANNEL(format) > 1)
552 es->sctrl |= SCTRL_P2SMB;
553 }
554 } else {
555 es->sctrl &= ~SCTRL_R1FMT;
556 if (format & AFMT_S16_LE)
557 es->sctrl |= SCTRL_R1SEB;
558 if (AFMT_CHANNEL(format) > 1)
559 es->sctrl |= SCTRL_R1SMB;
560 }
561 es_wr(es, ES1370_REG_SERIAL_CONTROL, es->sctrl, 4);
562 ES_UNLOCK(es);
563 ch->fmt = format;
564 return (0);
565}
566
567static uint32_t
568eschan1370_setspeed(kobj_t obj, void *data, uint32_t speed)
569{
570 struct es_chinfo *ch = data;
571 struct es_info *es = ch->parent;
572
573 ES_LOCK(es);
574 /* Fixed rate , do nothing. */
575 if (ch->caps.minspeed == ch->caps.maxspeed) {
576 ES_UNLOCK(es);
577 return (ch->caps.maxspeed);
578 }
579 if (speed < ch->caps.minspeed)
580 speed = ch->caps.minspeed;
581 if (speed > ch->caps.maxspeed)
582 speed = ch->caps.maxspeed;
583 if (ch->index == ES_DAC1) {
584 /*
585 * DAC1 does not support continuous rate settings.
586 * Pick the nearest and use it since FEEDER_RATE will
587 * do the the proper conversion for us.
588 */
589 es->ctrl &= ~CTRL_WTSRSEL;
590 if (speed < 8268) {
591 speed = 5512;
592 es->ctrl |= 0 << CTRL_SH_WTSRSEL;
593 } else if (speed < 16537) {
594 speed = 11025;
595 es->ctrl |= 1 << CTRL_SH_WTSRSEL;
596 } else if (speed < 33075) {
597 speed = 22050;
598 es->ctrl |= 2 << CTRL_SH_WTSRSEL;
599 } else {
600 speed = 44100;
601 es->ctrl |= 3 << CTRL_SH_WTSRSEL;
602 }
603 } else {
604 es->ctrl &= ~CTRL_PCLKDIV;
605 es->ctrl |= DAC2_SRTODIV(speed) << CTRL_SH_PCLKDIV;
606 }
607 es_wr(es, ES1370_REG_CONTROL, es->ctrl, 4);
608 ES_UNLOCK(es);
609 return (speed);
610}
611
612static uint32_t
613eschan1371_setspeed(kobj_t obj, void *data, uint32_t speed)
614{
615 struct es_chinfo *ch = data;
616 struct es_info *es = ch->parent;
617 uint32_t i;
618 int delta;
619
620 ES_LOCK(es);
621 if (ch->dir == PCMDIR_PLAY)
622 i = es1371_dac_rate(es, speed, ch->index); /* play */
623 else
624 i = es1371_adc_rate(es, speed, ch->index); /* record */
625 ES_UNLOCK(es);
626 delta = (speed > i) ? (speed - i) : (i - speed);
627 if (delta < 2)
628 return (speed);
629 return (i);
630}
631
632static int
633eschan_setfragments(kobj_t obj, void *data, uint32_t blksz, uint32_t blkcnt)
634{
635 struct es_chinfo *ch = data;
636 struct es_info *es = ch->parent;
637
638 blksz &= ES_BLK_ALIGN;
639
640 if (blksz > (sndbuf_getmaxsize(ch->buffer) / ES_DMA_SEGS_MIN))
641 blksz = sndbuf_getmaxsize(ch->buffer) / ES_DMA_SEGS_MIN;
642 if (blksz < ES_BLK_MIN)
643 blksz = ES_BLK_MIN;
644 if (blkcnt > ES_DMA_SEGS_MAX)
645 blkcnt = ES_DMA_SEGS_MAX;
646 if (blkcnt < ES_DMA_SEGS_MIN)
647 blkcnt = ES_DMA_SEGS_MIN;
648
649 while ((blksz * blkcnt) > sndbuf_getmaxsize(ch->buffer)) {
650 if ((blkcnt >> 1) >= ES_DMA_SEGS_MIN)
651 blkcnt >>= 1;
652 else if ((blksz >> 1) >= ES_BLK_MIN)
653 blksz >>= 1;
654 else
655 break;
656 }
657
658 if ((sndbuf_getblksz(ch->buffer) != blksz ||
659 sndbuf_getblkcnt(ch->buffer) != blkcnt) &&
660 sndbuf_resize(ch->buffer, blkcnt, blksz) != 0)
661 device_printf(es->dev, "%s: failed blksz=%u blkcnt=%u\n",
662 __func__, blksz, blkcnt);
663
664 ch->bufsz = sndbuf_getsize(ch->buffer);
665 ch->blksz = sndbuf_getblksz(ch->buffer);
666 ch->blkcnt = sndbuf_getblkcnt(ch->buffer);
667
668 return (0);
669}
670
671static uint32_t
672eschan_setblocksize(kobj_t obj, void *data, uint32_t blksz)
673{
674 struct es_chinfo *ch = data;
675 struct es_info *es = ch->parent;
676
677 eschan_setfragments(obj, data, blksz, es->blkcnt);
678
679 return (ch->blksz);
680}
681
682#define es_chan_active(es) ((es)->ch[ES_DAC1].active + \
683 (es)->ch[ES_DAC2].active + \
684 (es)->ch[ES_ADC].active)
685
686static __inline int
687es_poll_channel(struct es_chinfo *ch)
688{
689 struct es_info *es;
690 uint32_t sz, delta;
691 uint32_t reg, ptr;
692
693 if (ch == NULL || ch->channel == NULL || ch->active == 0)
694 return (0);
695
696 es = ch->parent;
697 if (ch->dir == PCMDIR_PLAY) {
698 if (ch->index == ES_DAC1)
699 reg = ES1370_REG_DAC1_FRAMECNT;
700 else
701 reg = ES1370_REG_DAC2_FRAMECNT;
702 } else
703 reg = ES1370_REG_ADC_FRAMECNT;
704 sz = ch->blksz * ch->blkcnt;
705 es_wr(es, ES1370_REG_MEMPAGE, reg >> 8, 4);
706 ptr = es_rd(es, reg & 0x000000ff, 4) >> 16;
707 ptr <<= 2;
708 ch->ptr = ptr;
709 ptr %= sz;
710 ptr &= ~(ch->blksz - 1);
711 delta = (sz + ptr - ch->prevptr) % sz;
712
713 if (delta < ch->blksz)
714 return (0);
715
716 ch->prevptr = ptr;
717
718 return (1);
719}
720
721static void
722es_poll_callback(void *arg)
723{
724 struct es_info *es = arg;
725 uint32_t trigger = 0;
726 int i;
727
728 if (es == NULL)
729 return;
730
731 ES_LOCK(es);
732 if (es->polling == 0 || es_chan_active(es) == 0) {
733 ES_UNLOCK(es);
734 return;
735 }
736
737 for (i = 0; i < ES_NCHANS; i++) {
738 if (es_poll_channel(&es->ch[i]) != 0)
739 trigger |= 1 << i;
740 }
741
742 /* XXX */
743 callout_reset(&es->poll_timer, 1/*es->poll_ticks*/,
744 es_poll_callback, es);
745
746 ES_UNLOCK(es);
747
748 for (i = 0; i < ES_NCHANS; i++) {
749 if (trigger & (1 << i))
750 chn_intr(es->ch[i].channel);
751 }
752}
753
754static int
755eschan_trigger(kobj_t obj, void *data, int go)
756{
757 struct es_chinfo *ch = data;
758 struct es_info *es = ch->parent;
759 uint32_t cnt, b = 0;
760
761 if (!PCMTRIG_COMMON(go))
762 return 0;
763
764 ES_LOCK(es);
765 cnt = (ch->blksz / sndbuf_getalign(ch->buffer)) - 1;
766 if (ch->fmt & AFMT_16BIT)
767 b |= 0x02;
768 if (AFMT_CHANNEL(ch->fmt) > 1)
769 b |= 0x01;
770 if (ch->dir == PCMDIR_PLAY) {
771 if (go == PCMTRIG_START) {
772 if (ch->index == ES_DAC1) {
773 es->ctrl |= CTRL_DAC1_EN;
774 es->sctrl &= ~(SCTRL_P1LOOPSEL |
775 SCTRL_P1PAUSE | SCTRL_P1SCTRLD);
776 if (es->polling == 0)
777 es->sctrl |= SCTRL_P1INTEN;
778 else
779 es->sctrl &= ~SCTRL_P1INTEN;
780 es->sctrl |= b;
781 es_wr(es, ES1370_REG_DAC1_SCOUNT, cnt, 4);
782 /* start at beginning of buffer */
783 es_wr(es, ES1370_REG_MEMPAGE,
784 ES1370_REG_DAC1_FRAMECNT >> 8, 4);
785 es_wr(es, ES1370_REG_DAC1_FRAMECNT & 0xff,
786 (ch->bufsz >> 2) - 1, 4);
787 } else {
788 es->ctrl |= CTRL_DAC2_EN;
789 es->sctrl &= ~(SCTRL_P2ENDINC | SCTRL_P2STINC |
790 SCTRL_P2LOOPSEL | SCTRL_P2PAUSE |
791 SCTRL_P2DACSEN);
792 if (es->polling == 0)
793 es->sctrl |= SCTRL_P2INTEN;
794 else
795 es->sctrl &= ~SCTRL_P2INTEN;
796 es->sctrl |= (b << 2) |
797 ((((b >> 1) & 1) + 1) << SCTRL_SH_P2ENDINC);
798 es_wr(es, ES1370_REG_DAC2_SCOUNT, cnt, 4);
799 /* start at beginning of buffer */
800 es_wr(es, ES1370_REG_MEMPAGE,
801 ES1370_REG_DAC2_FRAMECNT >> 8, 4);
802 es_wr(es, ES1370_REG_DAC2_FRAMECNT & 0xff,
803 (ch->bufsz >> 2) - 1, 4);
804 }
805 } else
806 es->ctrl &= ~((ch->index == ES_DAC1) ?
807 CTRL_DAC1_EN : CTRL_DAC2_EN);
808 } else {
809 if (go == PCMTRIG_START) {
810 es->ctrl |= CTRL_ADC_EN;
811 es->sctrl &= ~SCTRL_R1LOOPSEL;
812 if (es->polling == 0)
813 es->sctrl |= SCTRL_R1INTEN;
814 else
815 es->sctrl &= ~SCTRL_R1INTEN;
816 es->sctrl |= b << 4;
817 es_wr(es, ES1370_REG_ADC_SCOUNT, cnt, 4);
818 /* start at beginning of buffer */
819 es_wr(es, ES1370_REG_MEMPAGE,
820 ES1370_REG_ADC_FRAMECNT >> 8, 4);
821 es_wr(es, ES1370_REG_ADC_FRAMECNT & 0xff,
822 (ch->bufsz >> 2) - 1, 4);
823 } else
824 es->ctrl &= ~CTRL_ADC_EN;
825 }
826 es_wr(es, ES1370_REG_SERIAL_CONTROL, es->sctrl, 4);
827 es_wr(es, ES1370_REG_CONTROL, es->ctrl, 4);
828 if (go == PCMTRIG_START) {
829 if (es->polling != 0) {
830 ch->ptr = 0;
831 ch->prevptr = 0;
832 if (es_chan_active(es) == 0) {
833 es->poll_ticks = 1;
834 callout_reset(&es->poll_timer, 1,
835 es_poll_callback, es);
836 }
837 }
838 ch->active = 1;
839 } else {
840 ch->active = 0;
841 if (es->polling != 0) {
842 if (es_chan_active(es) == 0) {
843 callout_stop(&es->poll_timer);
844 es->poll_ticks = 1;
845 }
846 }
847 }
848 ES_UNLOCK(es);
849 return (0);
850}
851
852static uint32_t
853eschan_getptr(kobj_t obj, void *data)
854{
855 struct es_chinfo *ch = data;
856 struct es_info *es = ch->parent;
857 uint32_t reg, cnt;
858
859 ES_LOCK(es);
860 if (es->polling != 0)
861 cnt = ch->ptr;
862 else {
863 if (ch->dir == PCMDIR_PLAY) {
864 if (ch->index == ES_DAC1)
865 reg = ES1370_REG_DAC1_FRAMECNT;
866 else
867 reg = ES1370_REG_DAC2_FRAMECNT;
868 } else
869 reg = ES1370_REG_ADC_FRAMECNT;
870 es_wr(es, ES1370_REG_MEMPAGE, reg >> 8, 4);
871 cnt = es_rd(es, reg & 0x000000ff, 4) >> 16;
872 /* cnt is longwords */
873 cnt <<= 2;
874 }
875 ES_UNLOCK(es);
876
877 cnt &= ES_BLK_ALIGN;
878
879 return (cnt);
880}
881
882static struct pcmchan_caps *
883eschan_getcaps(kobj_t obj, void *data)
884{
885 struct es_chinfo *ch = data;
886
887 return (&ch->caps);
888}
889
890static kobj_method_t eschan1370_methods[] = {
891 KOBJMETHOD(channel_init, eschan_init),
892 KOBJMETHOD(channel_setformat, eschan_setformat),
893 KOBJMETHOD(channel_setspeed, eschan1370_setspeed),
894 KOBJMETHOD(channel_setblocksize, eschan_setblocksize),
895 KOBJMETHOD(channel_setfragments, eschan_setfragments),
896 KOBJMETHOD(channel_trigger, eschan_trigger),
897 KOBJMETHOD(channel_getptr, eschan_getptr),
898 KOBJMETHOD(channel_getcaps, eschan_getcaps),
899 KOBJMETHOD_END
900};
901CHANNEL_DECLARE(eschan1370);
902
903static kobj_method_t eschan1371_methods[] = {
904 KOBJMETHOD(channel_init, eschan_init),
905 KOBJMETHOD(channel_setformat, eschan_setformat),
906 KOBJMETHOD(channel_setspeed, eschan1371_setspeed),
907 KOBJMETHOD(channel_setblocksize, eschan_setblocksize),
908 KOBJMETHOD(channel_setfragments, eschan_setfragments),
909 KOBJMETHOD(channel_trigger, eschan_trigger),
910 KOBJMETHOD(channel_getptr, eschan_getptr),
911 KOBJMETHOD(channel_getcaps, eschan_getcaps),
912 KOBJMETHOD_END
913};
914CHANNEL_DECLARE(eschan1371);
915
916/* -------------------------------------------------------------------- */
917/* The interrupt handler */
918static void
919es_intr(void *p)
920{
921 struct es_info *es = p;
922 uint32_t intsrc, sctrl;
923
924 ES_LOCK(es);
925 if (es->polling != 0) {
926 ES_UNLOCK(es);
927 return;
928 }
929 intsrc = es_rd(es, ES1370_REG_STATUS, 4);
930 if ((intsrc & STAT_INTR) == 0) {
931 ES_UNLOCK(es);
932 return;
933 }
934
935 sctrl = es->sctrl;
936 if (intsrc & STAT_ADC)
937 sctrl &= ~SCTRL_R1INTEN;
938 if (intsrc & STAT_DAC1)
939 sctrl &= ~SCTRL_P1INTEN;
940 if (intsrc & STAT_DAC2)
941 sctrl &= ~SCTRL_P2INTEN;
942
943 es_wr(es, ES1370_REG_SERIAL_CONTROL, sctrl, 4);
944 es_wr(es, ES1370_REG_SERIAL_CONTROL, es->sctrl, 4);
945 ES_UNLOCK(es);
946
947 if (intsrc & STAT_ADC)
948 chn_intr(es->ch[ES_ADC].channel);
949 if (intsrc & STAT_DAC1)
950 chn_intr(es->ch[ES_DAC1].channel);
951 if (intsrc & STAT_DAC2)
952 chn_intr(es->ch[ES_DAC2].channel);
953}
954
955/* ES1370 specific */
956static int
957es1370_init(struct es_info *es)
958{
959 uint32_t fixed_rate;
960 int r, single_pcm;
961
962 /* ES1370 default to fixed rate operation */
963 if (resource_int_value(device_get_name(es->dev),
964 device_get_unit(es->dev), "fixed_rate", &r) == 0) {
965 fixed_rate = r;
966 if (fixed_rate) {
967 if (fixed_rate < es_caps.minspeed)
968 fixed_rate = es_caps.minspeed;
969 if (fixed_rate > es_caps.maxspeed)
970 fixed_rate = es_caps.maxspeed;
971 }
972 } else
973 fixed_rate = es_caps.maxspeed;
974
975 if (resource_int_value(device_get_name(es->dev),
976 device_get_unit(es->dev), "single_pcm_mixer", &r) == 0)
977 single_pcm = (r != 0) ? 1 : 0;
978 else
979 single_pcm = 1;
980
981 ES_LOCK(es);
982 if (ES_NUMPLAY(es->escfg) == 1)
983 single_pcm = 1;
984 /* This is ES1370 */
985 es->escfg = ES_SET_IS_ES1370(es->escfg, 1);
986 if (fixed_rate)
987 es->escfg = ES_SET_FIXED_RATE(es->escfg, fixed_rate);
988 else {
989 es->escfg = ES_SET_FIXED_RATE(es->escfg, 0);
990 fixed_rate = DSP_DEFAULT_SPEED;
991 }
992 if (single_pcm)
993 es->escfg = ES_SET_SINGLE_PCM_MIX(es->escfg, 1);
994 else
995 es->escfg = ES_SET_SINGLE_PCM_MIX(es->escfg, 0);
996 es->ctrl = CTRL_CDC_EN | CTRL_JYSTK_EN | CTRL_SERR_DIS |
997 (DAC2_SRTODIV(fixed_rate) << CTRL_SH_PCLKDIV);
998 es->ctrl |= 3 << CTRL_SH_WTSRSEL;
999 es_wr(es, ES1370_REG_CONTROL, es->ctrl, 4);
1000
1001 es->sctrl = 0;
1002 es_wr(es, ES1370_REG_SERIAL_CONTROL, es->sctrl, 4);
1003
1004 /* No RST, PD */
1005 es1370_wrcodec(es, CODEC_RES_PD, 3);
1006 /*
1007 * CODEC ADC and CODEC DAC use {LR,B}CLK2 and run off the LRCLK2 PLL;
1008 * program DAC_SYNC=0!
1009 */
1010 es1370_wrcodec(es, CODEC_CSEL, 0);
1011 /* Recording source is mixer */
1012 es1370_wrcodec(es, CODEC_ADSEL, 0);
1013 /* MIC amp is 0db */
1014 es1370_wrcodec(es, CODEC_MGAIN, 0);
1015 ES_UNLOCK(es);
1016
1017 return (0);
1018}
1019
1020/* ES1371 specific */
1021int
1022es1371_init(struct es_info *es)
1023{
1024 uint32_t cssr, devid, revid, subdev;
1025 int idx;
1026
1027 ES_LOCK(es);
1028 /* This is NOT ES1370 */
1029 es->escfg = ES_SET_IS_ES1370(es->escfg, 0);
1030 es->num = 0;
1031 es->sctrl = 0;
1032 cssr = 0;
1033 devid = pci_get_devid(es->dev);
1034 revid = pci_get_revid(es->dev);
1035 subdev = (pci_get_subdevice(es->dev) << 16) |
1036 pci_get_subvendor(es->dev);
1037 /*
1038 * Joyport blacklist. Either we're facing with broken hardware
1039 * or because this hardware need special (unknown) initialization
1040 * procedures.
1041 */
1042 switch (subdev) {
1043 case 0x20001274: /* old Ensoniq */
1044 es->ctrl = 0;
1045 break;
1046 default:
1047 es->ctrl = CTRL_JYSTK_EN;
1048 break;
1049 }
1050 if (devid == CT4730_PCI_ID) {
1051 /* XXX amplifier hack? */
1052 es->ctrl |= (1 << 16);
1053 }
1054 /* initialize the chips */
1055 es_wr(es, ES1370_REG_CONTROL, es->ctrl, 4);
1056 es_wr(es, ES1370_REG_SERIAL_CONTROL, es->sctrl, 4);
1057 es_wr(es, ES1371_REG_LEGACY, 0, 4);
1058 if ((devid == ES1371_PCI_ID && revid == ES1371REV_ES1373_8) ||
1059 (devid == ES1371_PCI_ID && revid == ES1371REV_CT5880_A) ||
1060 (devid == CT5880_PCI_ID && revid == CT5880REV_CT5880_C) ||
1061 (devid == CT5880_PCI_ID && revid == CT5880REV_CT5880_D) ||
1062 (devid == CT5880_PCI_ID && revid == CT5880REV_CT5880_E)) {
1063 cssr = 1 << 29;
1064 es_wr(es, ES1370_REG_STATUS, cssr, 4);
1065 DELAY(20000);
1066 }
1067 /* AC'97 warm reset to start the bitclk */
1068 es_wr(es, ES1370_REG_CONTROL, es->ctrl, 4);
1069 es_wr(es, ES1371_REG_LEGACY, ES1371_SYNC_RES, 4);
1070 DELAY(2000);
1071 es_wr(es, ES1370_REG_CONTROL, es->sctrl, 4);
1072 es1371_wait_src_ready(es);
1073 /* Init the sample rate converter */
1074 es_wr(es, ES1371_REG_SMPRATE, ES1371_DIS_SRC, 4);
1075 for (idx = 0; idx < 0x80; idx++)
1076 es1371_src_write(es, idx, 0);
1077 es1371_src_write(es, ES_SMPREG_DAC1 + ES_SMPREG_TRUNC_N, 16 << 4);
1078 es1371_src_write(es, ES_SMPREG_DAC1 + ES_SMPREG_INT_REGS, 16 << 10);
1079 es1371_src_write(es, ES_SMPREG_DAC2 + ES_SMPREG_TRUNC_N, 16 << 4);
1080 es1371_src_write(es, ES_SMPREG_DAC2 + ES_SMPREG_INT_REGS, 16 << 10);
1081 es1371_src_write(es, ES_SMPREG_VOL_ADC, 1 << 12);
1082 es1371_src_write(es, ES_SMPREG_VOL_ADC + 1, 1 << 12);
1083 es1371_src_write(es, ES_SMPREG_VOL_DAC1, 1 << 12);
1084 es1371_src_write(es, ES_SMPREG_VOL_DAC1 + 1, 1 << 12);
1085 es1371_src_write(es, ES_SMPREG_VOL_DAC2, 1 << 12);
1086 es1371_src_write(es, ES_SMPREG_VOL_DAC2 + 1, 1 << 12);
1087 es1371_adc_rate(es, 22050, ES_ADC);
1088 es1371_dac_rate(es, 22050, ES_DAC1);
1089 es1371_dac_rate(es, 22050, ES_DAC2);
1090 /*
1091 * WARNING:
1092 * enabling the sample rate converter without properly programming
1093 * its parameters causes the chip to lock up (the SRC busy bit will
1094 * be stuck high, and I've found no way to rectify this other than
1095 * power cycle)
1096 */
1097 es1371_wait_src_ready(es);
1098 es_wr(es, ES1371_REG_SMPRATE, 0, 4);
1099 /* try to reset codec directly */
1100 es_wr(es, ES1371_REG_CODEC, 0, 4);
1101 es_wr(es, ES1370_REG_STATUS, cssr, 4);
1102 ES_UNLOCK(es);
1103
1104 return (0);
1105}
1106
1107/* -------------------------------------------------------------------- */
1108
1109static int
1110es1371_wrcd(kobj_t obj, void *s, int addr, uint32_t data)
1111{
1112 uint32_t t, x, orig;
1113 struct es_info *es = (struct es_info*)s;
1114
1115 for (t = 0; t < 0x1000; t++) {
1116 if (!es_rd(es, ES1371_REG_CODEC & CODEC_WIP, 4))
1117 break;
1118 }
1119 /* save the current state for later */
1120 x = orig = es_rd(es, ES1371_REG_SMPRATE, 4);
1121 /* enable SRC state data in SRC mux */
1122 es_wr(es, ES1371_REG_SMPRATE, (x & (ES1371_DIS_SRC | ES1371_DIS_P1 |
1123 ES1371_DIS_P2 | ES1371_DIS_R1)) | 0x00010000, 4);
1124 /* busy wait */
1125 for (t = 0; t < 0x1000; t++) {
1126 if ((es_rd(es, ES1371_REG_SMPRATE, 4) & 0x00870000) ==
1127 0x00000000)
1128 break;
1129 }
1130 /* wait for a SAFE time to write addr/data and then do it, dammit */
1131 for (t = 0; t < 0x1000; t++) {
1132 if ((es_rd(es, ES1371_REG_SMPRATE, 4) & 0x00870000) ==
1133 0x00010000)
1134 break;
1135 }
1136
1137 es_wr(es, ES1371_REG_CODEC, ((addr << CODEC_POADD_SHIFT) &
1138 CODEC_POADD_MASK) | ((data << CODEC_PODAT_SHIFT) &
1139 CODEC_PODAT_MASK), 4);
1140 /* restore SRC reg */
1141 es1371_wait_src_ready(s);
1142 es_wr(es, ES1371_REG_SMPRATE, orig, 4);
1143
1144 return (0);
1145}
1146
1147static int
1148es1371_rdcd(kobj_t obj, void *s, int addr)
1149{
1150 uint32_t t, x, orig;
1151 struct es_info *es = (struct es_info *)s;
1152
1153 for (t = 0; t < 0x1000; t++) {
1154 if (!(x = es_rd(es, ES1371_REG_CODEC, 4) & CODEC_WIP))
1155 break;
1156 }
1157
1158 /* save the current state for later */
1159 x = orig = es_rd(es, ES1371_REG_SMPRATE, 4);
1160 /* enable SRC state data in SRC mux */
1161 es_wr(es, ES1371_REG_SMPRATE, (x & (ES1371_DIS_SRC | ES1371_DIS_P1 |
1162 ES1371_DIS_P2 | ES1371_DIS_R1)) | 0x00010000, 4);
1163 /* busy wait */
1164 for (t = 0; t < 0x1000; t++) {
1165 if ((x = es_rd(es, ES1371_REG_SMPRATE, 4) & 0x00870000) ==
1166 0x00000000)
1167 break;
1168 }
1169 /* wait for a SAFE time to write addr/data and then do it, dammit */
1170 for (t = 0; t < 0x1000; t++) {
1171 if ((x = es_rd(es, ES1371_REG_SMPRATE, 4) & 0x00870000) ==
1172 0x00010000)
1173 break;
1174 }
1175
1176 es_wr(es, ES1371_REG_CODEC, ((addr << CODEC_POADD_SHIFT) &
1177 CODEC_POADD_MASK) | CODEC_PORD, 4);
1178
1179 /* restore SRC reg */
1180 es1371_wait_src_ready(s);
1181 es_wr(es, ES1371_REG_SMPRATE, orig, 4);
1182
1183 /* now wait for the stinkin' data (RDY) */
1184 for (t = 0; t < 0x1000; t++) {
1185 if ((x = es_rd(es, ES1371_REG_CODEC, 4)) & CODEC_RDY)
1186 break;
1187 }
1188
1189 return ((x & CODEC_PIDAT_MASK) >> CODEC_PIDAT_SHIFT);
1190}
1191
1192static kobj_method_t es1371_ac97_methods[] = {
1193 KOBJMETHOD(ac97_read, es1371_rdcd),
1194 KOBJMETHOD(ac97_write, es1371_wrcd),
1195 KOBJMETHOD_END
1196};
1197AC97_DECLARE(es1371_ac97);
1198
1199/* -------------------------------------------------------------------- */
1200
1201static unsigned int
1202es1371_src_read(struct es_info *es, unsigned short reg)
1203{
1204 uint32_t r;
1205
1206 r = es1371_wait_src_ready(es) & (ES1371_DIS_SRC | ES1371_DIS_P1 |
1207 ES1371_DIS_P2 | ES1371_DIS_R1);
1208 r |= ES1371_SRC_RAM_ADDRO(reg);
1209 es_wr(es, ES1371_REG_SMPRATE, r, 4);
1210 return (ES1371_SRC_RAM_DATAI(es1371_wait_src_ready(es)));
1211}
1212
1213static void
1214es1371_src_write(struct es_info *es, unsigned short reg, unsigned short data)
1215{
1216 uint32_t r;
1217
1218 r = es1371_wait_src_ready(es) & (ES1371_DIS_SRC | ES1371_DIS_P1 |
1219 ES1371_DIS_P2 | ES1371_DIS_R1);
1220 r |= ES1371_SRC_RAM_ADDRO(reg) | ES1371_SRC_RAM_DATAO(data);
1221 es_wr(es, ES1371_REG_SMPRATE, r | ES1371_SRC_RAM_WE, 4);
1222}
1223
1224static unsigned int
1225es1371_adc_rate(struct es_info *es, unsigned int rate, int set)
1226{
1227 unsigned int n, truncm, freq, result;
1228
1229 ES_LOCK_ASSERT(es);
1230
1231 if (rate > 48000)
1232 rate = 48000;
1233 if (rate < 4000)
1234 rate = 4000;
1235 n = rate / 3000;
1236 if ((1 << n) & ((1 << 15) | (1 << 13) | (1 << 11) | (1 << 9)))
1237 n--;
1238 truncm = (21 * n - 1) | 1;
1239 freq = ((48000UL << 15) / rate) * n;
1240 result = (48000UL << 15) / (freq / n);
1241 if (set) {
1242 if (rate >= 24000) {
1243 if (truncm > 239)
1244 truncm = 239;
1245 es1371_src_write(es, ES_SMPREG_ADC + ES_SMPREG_TRUNC_N,
1246 (((239 - truncm) >> 1) << 9) | (n << 4));
1247 } else {
1248 if (truncm > 119)
1249 truncm = 119;
1250 es1371_src_write(es, ES_SMPREG_ADC + ES_SMPREG_TRUNC_N,
1251 0x8000 | (((119 - truncm) >> 1) << 9) | (n << 4));
1252 }
1253 es1371_src_write(es, ES_SMPREG_ADC + ES_SMPREG_INT_REGS,
1254 (es1371_src_read(es, ES_SMPREG_ADC + ES_SMPREG_INT_REGS) &
1255 0x00ff) | ((freq >> 5) & 0xfc00));
1256 es1371_src_write(es, ES_SMPREG_ADC + ES_SMPREG_VFREQ_FRAC,
1257 freq & 0x7fff);
1258 es1371_src_write(es, ES_SMPREG_VOL_ADC, n << 8);
1259 es1371_src_write(es, ES_SMPREG_VOL_ADC + 1, n << 8);
1260 }
1261 return (result);
1262}
1263
1264static unsigned int
1265es1371_dac_rate(struct es_info *es, unsigned int rate, int set)
1266{
1267 unsigned int freq, r, result, dac, dis;
1268
1269 ES_LOCK_ASSERT(es);
1270
1271 if (rate > 48000)
1272 rate = 48000;
1273 if (rate < 4000)
1274 rate = 4000;
1275 freq = ((rate << 15) + 1500) / 3000;
1276 result = (freq * 3000) >> 15;
1277
1278 dac = (set == ES_DAC1) ? ES_SMPREG_DAC1 : ES_SMPREG_DAC2;
1279 dis = (set == ES_DAC1) ? ES1371_DIS_P2 : ES1371_DIS_P1;
1280 r = (es1371_wait_src_ready(es) & (ES1371_DIS_SRC | ES1371_DIS_P1 |
1281 ES1371_DIS_P2 | ES1371_DIS_R1));
1282 es_wr(es, ES1371_REG_SMPRATE, r, 4);
1283 es1371_src_write(es, dac + ES_SMPREG_INT_REGS,
1284 (es1371_src_read(es, dac + ES_SMPREG_INT_REGS) & 0x00ff) |
1285 ((freq >> 5) & 0xfc00));
1286 es1371_src_write(es, dac + ES_SMPREG_VFREQ_FRAC, freq & 0x7fff);
1287 r = (es1371_wait_src_ready(es) &
1288 (ES1371_DIS_SRC | dis | ES1371_DIS_R1));
1289 es_wr(es, ES1371_REG_SMPRATE, r, 4);
1290 return (result);
1291}
1292
1293static uint32_t
1294es1371_wait_src_ready(struct es_info *es)
1295{
1296 uint32_t t, r;
1297
1298 for (t = 0; t < 0x1000; t++) {
1299 if (!((r = es_rd(es, ES1371_REG_SMPRATE, 4)) &
1300 ES1371_SRC_RAM_BUSY))
1301 return (r);
1302 DELAY(1);
1303 }
1304 device_printf(es->dev, "%s: timed out 0x%x [0x%x]\n", __func__,
1305 ES1371_REG_SMPRATE, r);
1306 return (0);
1307}
1308
1309/* -------------------------------------------------------------------- */
1310
1311/*
1312 * Probe and attach the card
1313 */
1314
1315static int
1316es_pci_probe(device_t dev)
1317{
1318 switch(pci_get_devid(dev)) {
1319 case ES1370_PCI_ID:
1320 device_set_desc(dev, "AudioPCI ES1370");
1321 return (BUS_PROBE_DEFAULT);
1322 case ES1371_PCI_ID:
1323 switch(pci_get_revid(dev)) {
1324 case ES1371REV_ES1371_A:
1325 device_set_desc(dev, "AudioPCI ES1371-A");
1326 return (BUS_PROBE_DEFAULT);
1327 case ES1371REV_ES1371_B:
1328 device_set_desc(dev, "AudioPCI ES1371-B");
1329 return (BUS_PROBE_DEFAULT);
1330 case ES1371REV_ES1373_A:
1331 device_set_desc(dev, "AudioPCI ES1373-A");
1332 return (BUS_PROBE_DEFAULT);
1333 case ES1371REV_ES1373_B:
1334 device_set_desc(dev, "AudioPCI ES1373-B");
1335 return (BUS_PROBE_DEFAULT);
1336 case ES1371REV_ES1373_8:
1337 device_set_desc(dev, "AudioPCI ES1373-8");
1338 return (BUS_PROBE_DEFAULT);
1339 case ES1371REV_CT5880_A:
1340 device_set_desc(dev, "Creative CT5880-A");
1341 return (BUS_PROBE_DEFAULT);
1342 default:
1343 device_set_desc(dev, "AudioPCI ES1371-?");
1344 device_printf(dev,
1345 "unknown revision %d -- please report to "
1346 "freebsd-multimedia@freebsd.org\n",
1347 pci_get_revid(dev));
1348 return (BUS_PROBE_DEFAULT);
1349 }
1350 case ES1371_PCI_ID2:
1351 device_set_desc(dev, "Strange AudioPCI ES1371-? (vid=3274)");
1352 device_printf(dev,
1353 "unknown revision %d -- please report to "
1354 "freebsd-multimedia@freebsd.org\n", pci_get_revid(dev));
1355 return (BUS_PROBE_DEFAULT);
1356 case CT4730_PCI_ID:
1357 switch(pci_get_revid(dev)) {
1358 case CT4730REV_CT4730_A:
1359 device_set_desc(dev,
1360 "Creative SB AudioPCI CT4730/EV1938");
1361 return (BUS_PROBE_DEFAULT);
1362 default:
1363 device_set_desc(dev, "Creative SB AudioPCI CT4730-?");
1364 device_printf(dev,
1365 "unknown revision %d -- please report to "
1366 "freebsd-multimedia@freebsd.org\n",
1367 pci_get_revid(dev));
1368 return (BUS_PROBE_DEFAULT);
1369 }
1370 case CT5880_PCI_ID:
1371 switch(pci_get_revid(dev)) {
1372 case CT5880REV_CT5880_C:
1373 device_set_desc(dev, "Creative CT5880-C");
1374 return (BUS_PROBE_DEFAULT);
1375 case CT5880REV_CT5880_D:
1376 device_set_desc(dev, "Creative CT5880-D");
1377 return (BUS_PROBE_DEFAULT);
1378 case CT5880REV_CT5880_E:
1379 device_set_desc(dev, "Creative CT5880-E");
1380 return (BUS_PROBE_DEFAULT);
1381 default:
1382 device_set_desc(dev, "Creative CT5880-?");
1383 device_printf(dev,
1384 "unknown revision %d -- please report to "
1385 "freebsd-multimedia@freebsd.org\n",
1386 pci_get_revid(dev));
1387 return (BUS_PROBE_DEFAULT);
1388 }
1389 default:
1390 return (ENXIO);
1391 }
1392}
1393
1394static int
1395sysctl_es137x_spdif_enable(SYSCTL_HANDLER_ARGS)
1396{
1397 struct es_info *es;
1398 device_t dev;
1399 uint32_t r;
1400 int err, new_en;
1401
1402 dev = oidp->oid_arg1;
1403 es = pcm_getdevinfo(dev);
1404 ES_LOCK(es);
1405 r = es_rd(es, ES1370_REG_STATUS, 4);
1406 ES_UNLOCK(es);
1407 new_en = (r & ENABLE_SPDIF) ? 1 : 0;
1408 err = sysctl_handle_int(oidp, &new_en, 0, req);
1409
1410 if (err || req->newptr == NULL)
1411 return (err);
1412 if (new_en < 0 || new_en > 1)
1413 return (EINVAL);
1414
1415 ES_LOCK(es);
1416 if (new_en) {
1417 r |= ENABLE_SPDIF;
1418 es->ctrl |= SPDIFEN_B;
1419 es->ctrl |= RECEN_B;
1420 } else {
1421 r &= ~ENABLE_SPDIF;
1422 es->ctrl &= ~SPDIFEN_B;
1423 es->ctrl &= ~RECEN_B;
1424 }
1425 es_wr(es, ES1370_REG_CONTROL, es->ctrl, 4);
1426 es_wr(es, ES1370_REG_STATUS, r, 4);
1427 ES_UNLOCK(es);
1428
1429 return (0);
1430}
1431
1432static int
1433sysctl_es137x_latency_timer(SYSCTL_HANDLER_ARGS)
1434{
1435 struct es_info *es;
1436 device_t dev;
1437 uint32_t val;
1438 int err;
1439
1440 dev = oidp->oid_arg1;
1441 es = pcm_getdevinfo(dev);
1442 ES_LOCK(es);
1443 val = pci_read_config(dev, PCIR_LATTIMER, 1);
1444 ES_UNLOCK(es);
1445 err = sysctl_handle_int(oidp, &val, 0, req);
1446
1447 if (err || req->newptr == NULL)
1448 return (err);
1449 if (val > 255)
1450 return (EINVAL);
1451
1452 ES_LOCK(es);
1453 pci_write_config(dev, PCIR_LATTIMER, val, 1);
1454 ES_UNLOCK(es);
1455
1456 return (0);
1457}
1458
1459static int
1460sysctl_es137x_fixed_rate(SYSCTL_HANDLER_ARGS)
1461{
1462 struct es_info *es;
1463 device_t dev;
1464 uint32_t val;
1465 int err;
1466
1467 dev = oidp->oid_arg1;
1468 es = pcm_getdevinfo(dev);
1469 ES_LOCK(es);
1470 val = ES_FIXED_RATE(es->escfg);
1471 if (val < es_caps.minspeed)
1472 val = 0;
1473 ES_UNLOCK(es);
1474 err = sysctl_handle_int(oidp, &val, 0, req);
1475
1476 if (err || req->newptr == NULL)
1477 return (err);
1478 if (val != 0 && (val < es_caps.minspeed || val > es_caps.maxspeed))
1479 return (EINVAL);
1480
1481 ES_LOCK(es);
1482 if (es->ctrl & (CTRL_DAC2_EN|CTRL_ADC_EN)) {
1483 ES_UNLOCK(es);
1484 return (EBUSY);
1485 }
1486 if (val) {
1487 if (val != ES_FIXED_RATE(es->escfg)) {
1488 es->escfg = ES_SET_FIXED_RATE(es->escfg, val);
1489 es->ch[ES_DAC2].caps.maxspeed = val;
1490 es->ch[ES_DAC2].caps.minspeed = val;
1491 es->ch[ES_ADC].caps.maxspeed = val;
1492 es->ch[ES_ADC].caps.minspeed = val;
1493 es->ctrl &= ~CTRL_PCLKDIV;
1494 es->ctrl |= DAC2_SRTODIV(val) << CTRL_SH_PCLKDIV;
1495 es_wr(es, ES1370_REG_CONTROL, es->ctrl, 4);
1496 }
1497 } else {
1498 es->escfg = ES_SET_FIXED_RATE(es->escfg, 0);
1499 es->ch[ES_DAC2].caps = es_caps;
1500 es->ch[ES_ADC].caps = es_caps;
1501 }
1502 ES_UNLOCK(es);
1503
1504 return (0);
1505}
1506
1507static int
1508sysctl_es137x_single_pcm_mixer(SYSCTL_HANDLER_ARGS)
1509{
1510 struct es_info *es;
1511 struct snddev_info *d;
1512 struct snd_mixer *m;
1513 device_t dev;
1514 uint32_t val, set;
1515 int recsrc, level, err;
1516
1517 dev = oidp->oid_arg1;
1518 d = device_get_softc(dev);
1519 if (!PCM_REGISTERED(d) || d->mixer_dev == NULL ||
1520 d->mixer_dev->si_drv1 == NULL)
1521 return (EINVAL);
1522 es = d->devinfo;
1523 if (es == NULL)
1524 return (EINVAL);
1525 ES_LOCK(es);
1526 set = ES_SINGLE_PCM_MIX(es->escfg);
1527 val = set;
1528 ES_UNLOCK(es);
1529 err = sysctl_handle_int(oidp, &val, 0, req);
1530
1531 if (err || req->newptr == NULL)
1532 return (err);
1533 if (!(val == 0 || val == 1))
1534 return (EINVAL);
1535 if (val == set)
1536 return (0);
1537 PCM_ACQUIRE_QUICK(d);
1538 m = (d->mixer_dev != NULL) ? d->mixer_dev->si_drv1 : NULL;
1539 if (m == NULL) {
1540 PCM_RELEASE_QUICK(d);
1541 return (ENODEV);
1542 }
1543 if (mixer_busy(m) != 0) {
1544 PCM_RELEASE_QUICK(d);
1545 return (EBUSY);
1546 }
1547 level = mix_get(m, SOUND_MIXER_PCM);
1548 recsrc = mix_getrecsrc(m);
1549 if (level < 0 || recsrc < 0) {
1550 PCM_RELEASE_QUICK(d);
1551 return (ENXIO);
1552 }
1553
1554 ES_LOCK(es);
1555 if (es->ctrl & (CTRL_ADC_EN | CTRL_DAC1_EN | CTRL_DAC2_EN)) {
1556 ES_UNLOCK(es);
1557 PCM_RELEASE_QUICK(d);
1558 return (EBUSY);
1559 }
1560 if (val)
1561 es->escfg = ES_SET_SINGLE_PCM_MIX(es->escfg, 1);
1562 else
1563 es->escfg = ES_SET_SINGLE_PCM_MIX(es->escfg, 0);
1564 ES_UNLOCK(es);
1565 if (!val) {
1566 mix_setdevs(m, mix_getdevs(m) | (1 << SOUND_MIXER_SYNTH));
1567 mix_setrecdevs(m, mix_getrecdevs(m) | (1 << SOUND_MIXER_SYNTH));
1568 err = mix_set(m, SOUND_MIXER_SYNTH, level & 0x7f,
1569 (level >> 8) & 0x7f);
1570 } else {
1571 err = mix_set(m, SOUND_MIXER_SYNTH, level & 0x7f,
1572 (level >> 8) & 0x7f);
1573 mix_setdevs(m, mix_getdevs(m) & ~(1 << SOUND_MIXER_SYNTH));
1574 mix_setrecdevs(m, mix_getrecdevs(m) &
1575 ~(1 << SOUND_MIXER_SYNTH));
1576 }
1577 if (!err) {
1578 level = recsrc;
1579 if (recsrc & (1 << SOUND_MIXER_PCM))
1580 recsrc |= 1 << SOUND_MIXER_SYNTH;
1581 else if (recsrc & (1 << SOUND_MIXER_SYNTH))
1582 recsrc |= 1 << SOUND_MIXER_PCM;
1583 if (level != recsrc)
1584 err = mix_setrecsrc(m, recsrc);
1585 }
1586
1587 PCM_RELEASE_QUICK(d);
1588
1589 return (err);
1590}
1591
1592static int
1593sysctl_es_polling(SYSCTL_HANDLER_ARGS)
1594{
1595 struct es_info *es;
1596 device_t dev;
1597 int err, val;
1598
1599 dev = oidp->oid_arg1;
1600 es = pcm_getdevinfo(dev);
1601 if (es == NULL)
1602 return (EINVAL);
1603 ES_LOCK(es);
1604 val = es->polling;
1605 ES_UNLOCK(es);
1606 err = sysctl_handle_int(oidp, &val, 0, req);
1607
1608 if (err || req->newptr == NULL)
1609 return (err);
1610 if (val < 0 || val > 1)
1611 return (EINVAL);
1612
1613 ES_LOCK(es);
1614 if (val != es->polling) {
1615 if (es_chan_active(es) != 0)
1616 err = EBUSY;
1617 else if (val == 0)
1618 es->polling = 0;
1619 else
1620 es->polling = 1;
1621 }
1622 ES_UNLOCK(es);
1623
1624 return (err);
1625}
1626
1627static void
1628es_init_sysctls(device_t dev)
1629{
1630 struct es_info *es;
1631 int r, devid, revid;
1632
1633 devid = pci_get_devid(dev);
1634 revid = pci_get_revid(dev);
1635 es = pcm_getdevinfo(dev);
1636 if ((devid == ES1371_PCI_ID && revid == ES1371REV_ES1373_8) ||
1637 (devid == ES1371_PCI_ID && revid == ES1371REV_CT5880_A) ||
1638 (devid == CT5880_PCI_ID && revid == CT5880REV_CT5880_C) ||
1639 (devid == CT5880_PCI_ID && revid == CT5880REV_CT5880_D) ||
1640 (devid == CT5880_PCI_ID && revid == CT5880REV_CT5880_E)) {
1641 /* XXX: an user should be able to set this with a control tool,
1642 if not done before 7.0-RELEASE, this needs to be converted
1643 to a device specific sysctl "dev.pcm.X.yyy" via
1644 device_get_sysctl_*() as discussed on multimedia@ in msg-id
1645 <861wujij2q.fsf@xps.des.no> */
1646 SYSCTL_ADD_PROC(device_get_sysctl_ctx(dev),
1647 SYSCTL_CHILDREN(device_get_sysctl_tree(dev)), OID_AUTO,
1648 "spdif_enabled", CTLTYPE_INT | CTLFLAG_RW, dev, sizeof(dev),
1649 sysctl_es137x_spdif_enable, "I",
1650 "Enable S/PDIF output on primary playback channel");
1651 } else if (devid == ES1370_PCI_ID) {
1652 /*
1653 * Enable fixed rate sysctl if both DAC2 / ADC enabled.
1654 */
1655 if (es->ch[ES_DAC2].channel != NULL &&
1656 es->ch[ES_ADC].channel != NULL) {
1657 /* XXX: an user should be able to set this with a control tool,
1658 if not done before 7.0-RELEASE, this needs to be converted
1659 to a device specific sysctl "dev.pcm.X.yyy" via
1660 device_get_sysctl_*() as discussed on multimedia@ in msg-id
1661 <861wujij2q.fsf@xps.des.no> */
1662 SYSCTL_ADD_PROC(device_get_sysctl_ctx(dev),
1663 SYSCTL_CHILDREN(device_get_sysctl_tree(dev)),
1664 OID_AUTO, "fixed_rate", CTLTYPE_INT | CTLFLAG_RW,
1665 dev, sizeof(dev), sysctl_es137x_fixed_rate, "I",
1666 "Enable fixed rate playback/recording");
1667 }
1668 /*
1669 * Enable single pcm mixer sysctl if both DAC1/2 enabled.
1670 */
1671 if (es->ch[ES_DAC1].channel != NULL &&
1672 es->ch[ES_DAC2].channel != NULL) {
1673 /* XXX: an user should be able to set this with a control tool,
1674 if not done before 7.0-RELEASE, this needs to be converted
1675 to a device specific sysctl "dev.pcm.X.yyy" via
1676 device_get_sysctl_*() as discussed on multimedia@ in msg-id
1677 <861wujij2q.fsf@xps.des.no> */
1678 SYSCTL_ADD_PROC(device_get_sysctl_ctx(dev),
1679 SYSCTL_CHILDREN(device_get_sysctl_tree(dev)),
1680 OID_AUTO, "single_pcm_mixer",
1681 CTLTYPE_INT | CTLFLAG_RW, dev, sizeof(dev),
1682 sysctl_es137x_single_pcm_mixer, "I",
1683 "Single PCM mixer controller for both DAC1/DAC2");
1684 }
1685 }
1686 if (resource_int_value(device_get_name(dev), device_get_unit(dev),
1687 "latency_timer", &r) == 0 && !(r < 0 || r > 255))
1688 pci_write_config(dev, PCIR_LATTIMER, r, 1);
1689 /* XXX: this needs to be converted to a device specific sysctl
1690 "dev.pcm.X.yyy" via device_get_sysctl_*() as discussed on
1691 multimedia@ in msg-id <861wujij2q.fsf@xps.des.no> */
1692 SYSCTL_ADD_PROC(device_get_sysctl_ctx(dev),
1693 SYSCTL_CHILDREN(device_get_sysctl_tree(dev)), OID_AUTO,
1694 "latency_timer", CTLTYPE_INT | CTLFLAG_RW, dev, sizeof(dev),
1695 sysctl_es137x_latency_timer, "I",
1696 "PCI Latency Timer configuration");
1697 SYSCTL_ADD_PROC(device_get_sysctl_ctx(dev),
1698 SYSCTL_CHILDREN(device_get_sysctl_tree(dev)), OID_AUTO,
1699 "polling", CTLTYPE_INT | CTLFLAG_RW, dev, sizeof(dev),
1700 sysctl_es_polling, "I",
1701 "Enable polling mode");
1702}
1703
1704static int
1705es_pci_attach(device_t dev)
1706{
1707 uint32_t data;
1708 struct es_info *es = NULL;
1709 int mapped, i, numplay, dac_cfg;
1710 char status[SND_STATUSLEN];
1711 struct ac97_info *codec = NULL;
1712 kobj_class_t ct = NULL;
1713 uint32_t devid;
1714
1715 es = malloc(sizeof *es, M_DEVBUF, M_WAITOK | M_ZERO);
1716 es->lock = snd_mtxcreate(device_get_nameunit(dev), "snd_es137x softc");
1717 es->dev = dev;
1718 es->escfg = 0;
1719 mapped = 0;
1720
1721 pci_enable_busmaster(dev);
1722 data = pci_read_config(dev, PCIR_COMMAND, 2);
1723 data |= (PCIM_CMD_PORTEN|PCIM_CMD_MEMEN);
1724 pci_write_config(dev, PCIR_COMMAND, data, 2);
1725 data = pci_read_config(dev, PCIR_COMMAND, 2);
1726 if (mapped == 0 && (data & PCIM_CMD_MEMEN)) {
1727 es->regid = MEM_MAP_REG;
1728 es->regtype = SYS_RES_MEMORY;
1729 es->reg = bus_alloc_resource_any(dev, es->regtype, &es->regid,
1730 RF_ACTIVE);
1731 if (es->reg)
1732 mapped++;
1733 }
1734 if (mapped == 0 && (data & PCIM_CMD_PORTEN)) {
1735 es->regid = PCIR_BAR(0);
1736 es->regtype = SYS_RES_IOPORT;
1737 es->reg = bus_alloc_resource_any(dev, es->regtype, &es->regid,
1738 RF_ACTIVE);
1739 if (es->reg)
1740 mapped++;
1741 }
1742 if (mapped == 0) {
1743 device_printf(dev, "unable to map register space\n");
1744 goto bad;
1745 }
1746
1747 es->st = rman_get_bustag(es->reg);
1748 es->sh = rman_get_bushandle(es->reg);
1749 callout_init(&es->poll_timer, CALLOUT_MPSAFE);
1750 es->poll_ticks = 1;
1751
1752 if (resource_int_value(device_get_name(dev),
1753 device_get_unit(dev), "polling", &i) == 0 && i != 0)
1754 es->polling = 1;
1755 else
1756 es->polling = 0;
1757
1758 es->bufsz = pcm_getbuffersize(dev, 4096, ES_DEFAULT_BUFSZ, 65536);
1759 if (resource_int_value(device_get_name(dev),
1760 device_get_unit(dev), "blocksize", &i) == 0 && i > 0) {
1761 i &= ES_BLK_ALIGN;
1762 if (i < ES_BLK_MIN)
1763 i = ES_BLK_MIN;
1764 es->blkcnt = es->bufsz / i;
1765 i = 0;
1766 while (es->blkcnt >> i)
1767 i++;
1768 es->blkcnt = 1 << (i - 1);
1769 if (es->blkcnt < ES_DMA_SEGS_MIN)
1770 es->blkcnt = ES_DMA_SEGS_MIN;
1771 else if (es->blkcnt > ES_DMA_SEGS_MAX)
1772 es->blkcnt = ES_DMA_SEGS_MAX;
1773
1774 } else
1775 es->blkcnt = 2;
1776
1777 if (resource_int_value(device_get_name(dev), device_get_unit(dev),
1778 "dac", &dac_cfg) == 0) {
1779 if (dac_cfg < 0 || dac_cfg > 3)
1780 dac_cfg = ES_DEFAULT_DAC_CFG;
1781 } else
1782 dac_cfg = ES_DEFAULT_DAC_CFG;
1783
1784 switch (dac_cfg) {
1785 case 0: /* Enable all DAC: DAC1, DAC2 */
1786 numplay = 2;
1787 es->escfg = ES_SET_DAC_FIRST(es->escfg, ES_DAC1);
1788 es->escfg = ES_SET_DAC_SECOND(es->escfg, ES_DAC2);
1789 break;
1790 case 1: /* Only DAC1 */
1791 numplay = 1;
1792 es->escfg = ES_SET_DAC_FIRST(es->escfg, ES_DAC1);
1793 break;
1794 case 3: /* Enable all DAC / swap position: DAC2, DAC1 */
1795 numplay = 2;
1796 es->escfg = ES_SET_DAC_FIRST(es->escfg, ES_DAC2);
1797 es->escfg = ES_SET_DAC_SECOND(es->escfg, ES_DAC1);
1798 break;
1799 case 2: /* Only DAC2 */
1800 default:
1801 numplay = 1;
1802 es->escfg = ES_SET_DAC_FIRST(es->escfg, ES_DAC2);
1803 break;
1804 }
1805 es->escfg = ES_SET_NUMPLAY(es->escfg, numplay);
1806 es->escfg = ES_SET_NUMREC(es->escfg, 1);
1807
1808 devid = pci_get_devid(dev);
1809 switch (devid) {
1810 case ES1371_PCI_ID:
1811 case ES1371_PCI_ID2:
1812 case CT5880_PCI_ID:
1813 case CT4730_PCI_ID:
1814 es1371_init(es);
1815 codec = AC97_CREATE(dev, es, es1371_ac97);
1816 if (codec == NULL)
1817 goto bad;
1818 /* our init routine does everything for us */
1819 /* set to NULL; flag mixer_init not to run the ac97_init */
1820 /* ac97_mixer.init = NULL; */
1821 if (mixer_init(dev, ac97_getmixerclass(), codec))
1822 goto bad;
1823 ct = &eschan1371_class;
1824 break;
1825 case ES1370_PCI_ID:
1826 es1370_init(es);
1827 /*
1828 * Disable fixed rate operation if DAC2 disabled.
1829 * This is a special case for es1370 only, where the
1830 * speed of both ADC and DAC2 locked together.
1831 */
1832 if (!ES_DAC2_ENABLED(es->escfg))
1833 es->escfg = ES_SET_FIXED_RATE(es->escfg, 0);
1834 if (mixer_init(dev, &es1370_mixer_class, es))
1835 goto bad;
1836 ct = &eschan1370_class;
1837 break;
1838 default:
1839 goto bad;
1840 /* NOTREACHED */
1841 }
1842
1843 es->irqid = 0;
1844 es->irq = bus_alloc_resource_any(dev, SYS_RES_IRQ, &es->irqid,
1845 RF_ACTIVE | RF_SHAREABLE);
1846 if (!es->irq || snd_setup_intr(dev, es->irq, INTR_MPSAFE, es_intr,
1847 es, &es->ih)) {
1848 device_printf(dev, "unable to map interrupt\n");
1849 goto bad;
1850 }
1851
1852 if (bus_dma_tag_create(/*parent*/bus_get_dma_tag(dev),
1853 /*alignment*/2, /*boundary*/0,
1854 /*lowaddr*/BUS_SPACE_MAXADDR_32BIT,
1855 /*highaddr*/BUS_SPACE_MAXADDR,
1856 /*filter*/NULL, /*filterarg*/NULL,
1857 /*maxsize*/es->bufsz, /*nsegments*/1, /*maxsegz*/0x3ffff,
1858 /*flags*/0, /*lockfunc*/NULL,
1859 /*lockarg*/NULL, &es->parent_dmat) != 0) {
1860 device_printf(dev, "unable to create dma tag\n");
1861 goto bad;
1862 }
1863
1864 snprintf(status, SND_STATUSLEN, "at %s 0x%lx irq %ld %s",
1865 (es->regtype == SYS_RES_IOPORT)? "io" : "memory",
1866 rman_get_start(es->reg), rman_get_start(es->irq),
1867 PCM_KLDSTRING(snd_es137x));
1868
1869 if (pcm_register(dev, es, numplay, 1))
1870 goto bad;
1871 for (i = 0; i < numplay; i++)
1872 pcm_addchan(dev, PCMDIR_PLAY, ct, es);
1873 pcm_addchan(dev, PCMDIR_REC, ct, es);
1874 es_init_sysctls(dev);
1875 pcm_setstatus(dev, status);
1876 es->escfg = ES_SET_GP(es->escfg, 0);
1877 if (numplay == 1)
1878 device_printf(dev, "<Playback: DAC%d / Record: ADC>\n",
1879 ES_DAC_FIRST(es->escfg) + 1);
1880 else if (numplay == 2)
1881 device_printf(dev, "<Playback: DAC%d,DAC%d / Record: ADC>\n",
1882 ES_DAC_FIRST(es->escfg) + 1, ES_DAC_SECOND(es->escfg) + 1);
1883 return (0);
1884
1885bad:
1886 if (es->parent_dmat)
1887 bus_dma_tag_destroy(es->parent_dmat);
1888 if (es->ih)
1889 bus_teardown_intr(dev, es->irq, es->ih);
1890 if (es->irq)
1891 bus_release_resource(dev, SYS_RES_IRQ, es->irqid, es->irq);
1892 if (codec)
1893 ac97_destroy(codec);
1894 if (es->reg)
1895 bus_release_resource(dev, es->regtype, es->regid, es->reg);
1896 if (es->lock)
1897 snd_mtxfree(es->lock);
1898 if (es)
1899 free(es, M_DEVBUF);
1900 return (ENXIO);
1901}
1902
1903static int
1904es_pci_detach(device_t dev)
1905{
1906 int r;
1907 struct es_info *es;
1908
1909 r = pcm_unregister(dev);
1910 if (r)
1911 return (r);
1912
1913 es = pcm_getdevinfo(dev);
1914
1915 if (es != NULL && es->num != 0) {
1916 ES_LOCK(es);
1917 es->polling = 0;
1918 callout_stop(&es->poll_timer);
1919 ES_UNLOCK(es);
1920 callout_drain(&es->poll_timer);
1921 }
1922
1923 bus_teardown_intr(dev, es->irq, es->ih);
1924 bus_release_resource(dev, SYS_RES_IRQ, es->irqid, es->irq);
1925 bus_release_resource(dev, es->regtype, es->regid, es->reg);
1926 bus_dma_tag_destroy(es->parent_dmat);
1927 snd_mtxfree(es->lock);
1928 free(es, M_DEVBUF);
1929
1930 return (0);
1931}
1932
1933static device_method_t es_methods[] = {
1934 /* Device interface */
1935 DEVMETHOD(device_probe, es_pci_probe),
1936 DEVMETHOD(device_attach, es_pci_attach),
1937 DEVMETHOD(device_detach, es_pci_detach),
1938
1939 { 0, 0 }
1940};
1941
1942static driver_t es_driver = {
1943 "pcm",
1944 es_methods,
1945 PCM_SOFTC_SIZE,
1946};
1947
1948DRIVER_MODULE(snd_es137x, pci, es_driver, pcm_devclass, 0, 0);
1949MODULE_DEPEND(snd_es137x, sound, SOUND_MINVER, SOUND_PREFVER, SOUND_MAXVER);
1950MODULE_VERSION(snd_es137x, 1);
| 368 es1370_wrcodec(es, mixtable[dev].right, rr);
369 if (set_dac1 && mixtable[SOUND_MIXER_SYNTH].stereo)
370 es1370_wrcodec(es,
371 mixtable[SOUND_MIXER_SYNTH].right, rr);
372 }
373 es1370_wrcodec(es, mixtable[dev].left, rl);
374 if (set_dac1)
375 es1370_wrcodec(es, mixtable[SOUND_MIXER_SYNTH].left, rl);
376 ES_UNLOCK(es);
377
378 return (l | (r << 8));
379}
380
381static uint32_t
382es1370_mixsetrecsrc(struct snd_mixer *m, uint32_t src)
383{
384 struct es_info *es;
385 int i, j = 0;
386
387 es = mix_getdevinfo(m);
388 if (src == 0) src = 1 << SOUND_MIXER_MIC;
389 src &= mix_getrecdevs(m);
390 for (i = 0; i < SOUND_MIXER_NRDEVICES; i++)
391 if ((src & (1 << i)) != 0) j |= mixtable[i].recmask;
392
393 ES_LOCK(es);
394 if ((src & (1 << SOUND_MIXER_PCM)) && ES_SINGLE_PCM_MIX(es->escfg) &&
395 ES_DAC1_ENABLED(es->escfg))
396 j |= mixtable[SOUND_MIXER_SYNTH].recmask;
397 es1370_wrcodec(es, CODEC_LIMIX1, j & 0x55);
398 es1370_wrcodec(es, CODEC_RIMIX1, j & 0xaa);
399 es1370_wrcodec(es, CODEC_LIMIX2, (j >> 8) & 0x17);
400 es1370_wrcodec(es, CODEC_RIMIX2, (j >> 8) & 0x0f);
401 es1370_wrcodec(es, CODEC_OMIX1, 0x7f);
402 es1370_wrcodec(es, CODEC_OMIX2, 0x3f);
403 ES_UNLOCK(es);
404
405 return (src);
406}
407
408static kobj_method_t es1370_mixer_methods[] = {
409 KOBJMETHOD(mixer_init, es1370_mixinit),
410 KOBJMETHOD(mixer_set, es1370_mixset),
411 KOBJMETHOD(mixer_setrecsrc, es1370_mixsetrecsrc),
412 KOBJMETHOD_END
413};
414MIXER_DECLARE(es1370_mixer);
415
416/* -------------------------------------------------------------------- */
417
418static int
419es1370_wrcodec(struct es_info *es, unsigned char i, unsigned char data)
420{
421 unsigned int t;
422
423 ES_LOCK_ASSERT(es);
424
425 for (t = 0; t < 0x1000; t++) {
426 if ((es_rd(es, ES1370_REG_STATUS, 4) &
427 STAT_CSTAT) == 0) {
428 es_wr(es, ES1370_REG_CODEC,
429 ((unsigned short)i << CODEC_INDEX_SHIFT) | data, 2);
430 return (0);
431 }
432 DELAY(1);
433 }
434 device_printf(es->dev, "%s: timed out\n", __func__);
435 return (-1);
436}
437
438/* -------------------------------------------------------------------- */
439
440/* channel interface */
441static void *
442eschan_init(kobj_t obj, void *devinfo, struct snd_dbuf *b,
443 struct pcm_channel *c, int dir)
444{
445 struct es_info *es = devinfo;
446 struct es_chinfo *ch;
447 uint32_t index;
448
449 ES_LOCK(es);
450
451 if (dir == PCMDIR_PLAY) {
452 index = ES_GP(es->escfg);
453 es->escfg = ES_SET_GP(es->escfg, index + 1);
454 if (index == 0)
455 index = ES_DAC_FIRST(es->escfg);
456 else if (index == 1)
457 index = ES_DAC_SECOND(es->escfg);
458 else {
459 device_printf(es->dev,
460 "Invalid ES_GP index: %d\n", index);
461 ES_UNLOCK(es);
462 return (NULL);
463 }
464 if (!(index == ES_DAC1 || index == ES_DAC2)) {
465 device_printf(es->dev, "Unknown DAC: %d\n", index + 1);
466 ES_UNLOCK(es);
467 return (NULL);
468 }
469 if (es->ch[index].channel != NULL) {
470 device_printf(es->dev, "DAC%d already initialized!\n",
471 index + 1);
472 ES_UNLOCK(es);
473 return (NULL);
474 }
475 } else
476 index = ES_ADC;
477
478 ch = &es->ch[index];
479 ch->index = index;
480 ch->num = es->num++;
481 ch->caps = es_caps;
482 if (ES_IS_ES1370(es->escfg)) {
483 if (ch->index == ES_DAC1) {
484 ch->caps.maxspeed = ES1370_DAC1_MAXSPEED;
485 ch->caps.minspeed = ES1370_DAC1_MINSPEED;
486 } else {
487 uint32_t fixed_rate = ES_FIXED_RATE(es->escfg);
488 if (!(fixed_rate < es_caps.minspeed ||
489 fixed_rate > es_caps.maxspeed)) {
490 ch->caps.maxspeed = fixed_rate;
491 ch->caps.minspeed = fixed_rate;
492 }
493 }
494 }
495 ch->parent = es;
496 ch->channel = c;
497 ch->buffer = b;
498 ch->bufsz = es->bufsz;
499 ch->blkcnt = es->blkcnt;
500 ch->blksz = ch->bufsz / ch->blkcnt;
501 ch->dir = dir;
502 ES_UNLOCK(es);
503 if (sndbuf_alloc(ch->buffer, es->parent_dmat, 0, ch->bufsz) != 0)
504 return (NULL);
505 ES_LOCK(es);
506 if (dir == PCMDIR_PLAY) {
507 if (ch->index == ES_DAC1) {
508 es_wr(es, ES1370_REG_MEMPAGE,
509 ES1370_REG_DAC1_FRAMEADR >> 8, 1);
510 es_wr(es, ES1370_REG_DAC1_FRAMEADR & 0xff,
511 sndbuf_getbufaddr(ch->buffer), 4);
512 es_wr(es, ES1370_REG_DAC1_FRAMECNT & 0xff,
513 (ch->bufsz >> 2) - 1, 4);
514 } else {
515 es_wr(es, ES1370_REG_MEMPAGE,
516 ES1370_REG_DAC2_FRAMEADR >> 8, 1);
517 es_wr(es, ES1370_REG_DAC2_FRAMEADR & 0xff,
518 sndbuf_getbufaddr(ch->buffer), 4);
519 es_wr(es, ES1370_REG_DAC2_FRAMECNT & 0xff,
520 (ch->bufsz >> 2) - 1, 4);
521 }
522 } else {
523 es_wr(es, ES1370_REG_MEMPAGE, ES1370_REG_ADC_FRAMEADR >> 8, 1);
524 es_wr(es, ES1370_REG_ADC_FRAMEADR & 0xff,
525 sndbuf_getbufaddr(ch->buffer), 4);
526 es_wr(es, ES1370_REG_ADC_FRAMECNT & 0xff,
527 (ch->bufsz >> 2) - 1, 4);
528 }
529 ES_UNLOCK(es);
530 return (ch);
531}
532
533static int
534eschan_setformat(kobj_t obj, void *data, uint32_t format)
535{
536 struct es_chinfo *ch = data;
537 struct es_info *es = ch->parent;
538
539 ES_LOCK(es);
540 if (ch->dir == PCMDIR_PLAY) {
541 if (ch->index == ES_DAC1) {
542 es->sctrl &= ~SCTRL_P1FMT;
543 if (format & AFMT_S16_LE)
544 es->sctrl |= SCTRL_P1SEB;
545 if (AFMT_CHANNEL(format) > 1)
546 es->sctrl |= SCTRL_P1SMB;
547 } else {
548 es->sctrl &= ~SCTRL_P2FMT;
549 if (format & AFMT_S16_LE)
550 es->sctrl |= SCTRL_P2SEB;
551 if (AFMT_CHANNEL(format) > 1)
552 es->sctrl |= SCTRL_P2SMB;
553 }
554 } else {
555 es->sctrl &= ~SCTRL_R1FMT;
556 if (format & AFMT_S16_LE)
557 es->sctrl |= SCTRL_R1SEB;
558 if (AFMT_CHANNEL(format) > 1)
559 es->sctrl |= SCTRL_R1SMB;
560 }
561 es_wr(es, ES1370_REG_SERIAL_CONTROL, es->sctrl, 4);
562 ES_UNLOCK(es);
563 ch->fmt = format;
564 return (0);
565}
566
567static uint32_t
568eschan1370_setspeed(kobj_t obj, void *data, uint32_t speed)
569{
570 struct es_chinfo *ch = data;
571 struct es_info *es = ch->parent;
572
573 ES_LOCK(es);
574 /* Fixed rate , do nothing. */
575 if (ch->caps.minspeed == ch->caps.maxspeed) {
576 ES_UNLOCK(es);
577 return (ch->caps.maxspeed);
578 }
579 if (speed < ch->caps.minspeed)
580 speed = ch->caps.minspeed;
581 if (speed > ch->caps.maxspeed)
582 speed = ch->caps.maxspeed;
583 if (ch->index == ES_DAC1) {
584 /*
585 * DAC1 does not support continuous rate settings.
586 * Pick the nearest and use it since FEEDER_RATE will
587 * do the the proper conversion for us.
588 */
589 es->ctrl &= ~CTRL_WTSRSEL;
590 if (speed < 8268) {
591 speed = 5512;
592 es->ctrl |= 0 << CTRL_SH_WTSRSEL;
593 } else if (speed < 16537) {
594 speed = 11025;
595 es->ctrl |= 1 << CTRL_SH_WTSRSEL;
596 } else if (speed < 33075) {
597 speed = 22050;
598 es->ctrl |= 2 << CTRL_SH_WTSRSEL;
599 } else {
600 speed = 44100;
601 es->ctrl |= 3 << CTRL_SH_WTSRSEL;
602 }
603 } else {
604 es->ctrl &= ~CTRL_PCLKDIV;
605 es->ctrl |= DAC2_SRTODIV(speed) << CTRL_SH_PCLKDIV;
606 }
607 es_wr(es, ES1370_REG_CONTROL, es->ctrl, 4);
608 ES_UNLOCK(es);
609 return (speed);
610}
611
612static uint32_t
613eschan1371_setspeed(kobj_t obj, void *data, uint32_t speed)
614{
615 struct es_chinfo *ch = data;
616 struct es_info *es = ch->parent;
617 uint32_t i;
618 int delta;
619
620 ES_LOCK(es);
621 if (ch->dir == PCMDIR_PLAY)
622 i = es1371_dac_rate(es, speed, ch->index); /* play */
623 else
624 i = es1371_adc_rate(es, speed, ch->index); /* record */
625 ES_UNLOCK(es);
626 delta = (speed > i) ? (speed - i) : (i - speed);
627 if (delta < 2)
628 return (speed);
629 return (i);
630}
631
632static int
633eschan_setfragments(kobj_t obj, void *data, uint32_t blksz, uint32_t blkcnt)
634{
635 struct es_chinfo *ch = data;
636 struct es_info *es = ch->parent;
637
638 blksz &= ES_BLK_ALIGN;
639
640 if (blksz > (sndbuf_getmaxsize(ch->buffer) / ES_DMA_SEGS_MIN))
641 blksz = sndbuf_getmaxsize(ch->buffer) / ES_DMA_SEGS_MIN;
642 if (blksz < ES_BLK_MIN)
643 blksz = ES_BLK_MIN;
644 if (blkcnt > ES_DMA_SEGS_MAX)
645 blkcnt = ES_DMA_SEGS_MAX;
646 if (blkcnt < ES_DMA_SEGS_MIN)
647 blkcnt = ES_DMA_SEGS_MIN;
648
649 while ((blksz * blkcnt) > sndbuf_getmaxsize(ch->buffer)) {
650 if ((blkcnt >> 1) >= ES_DMA_SEGS_MIN)
651 blkcnt >>= 1;
652 else if ((blksz >> 1) >= ES_BLK_MIN)
653 blksz >>= 1;
654 else
655 break;
656 }
657
658 if ((sndbuf_getblksz(ch->buffer) != blksz ||
659 sndbuf_getblkcnt(ch->buffer) != blkcnt) &&
660 sndbuf_resize(ch->buffer, blkcnt, blksz) != 0)
661 device_printf(es->dev, "%s: failed blksz=%u blkcnt=%u\n",
662 __func__, blksz, blkcnt);
663
664 ch->bufsz = sndbuf_getsize(ch->buffer);
665 ch->blksz = sndbuf_getblksz(ch->buffer);
666 ch->blkcnt = sndbuf_getblkcnt(ch->buffer);
667
668 return (0);
669}
670
671static uint32_t
672eschan_setblocksize(kobj_t obj, void *data, uint32_t blksz)
673{
674 struct es_chinfo *ch = data;
675 struct es_info *es = ch->parent;
676
677 eschan_setfragments(obj, data, blksz, es->blkcnt);
678
679 return (ch->blksz);
680}
681
682#define es_chan_active(es) ((es)->ch[ES_DAC1].active + \
683 (es)->ch[ES_DAC2].active + \
684 (es)->ch[ES_ADC].active)
685
686static __inline int
687es_poll_channel(struct es_chinfo *ch)
688{
689 struct es_info *es;
690 uint32_t sz, delta;
691 uint32_t reg, ptr;
692
693 if (ch == NULL || ch->channel == NULL || ch->active == 0)
694 return (0);
695
696 es = ch->parent;
697 if (ch->dir == PCMDIR_PLAY) {
698 if (ch->index == ES_DAC1)
699 reg = ES1370_REG_DAC1_FRAMECNT;
700 else
701 reg = ES1370_REG_DAC2_FRAMECNT;
702 } else
703 reg = ES1370_REG_ADC_FRAMECNT;
704 sz = ch->blksz * ch->blkcnt;
705 es_wr(es, ES1370_REG_MEMPAGE, reg >> 8, 4);
706 ptr = es_rd(es, reg & 0x000000ff, 4) >> 16;
707 ptr <<= 2;
708 ch->ptr = ptr;
709 ptr %= sz;
710 ptr &= ~(ch->blksz - 1);
711 delta = (sz + ptr - ch->prevptr) % sz;
712
713 if (delta < ch->blksz)
714 return (0);
715
716 ch->prevptr = ptr;
717
718 return (1);
719}
720
721static void
722es_poll_callback(void *arg)
723{
724 struct es_info *es = arg;
725 uint32_t trigger = 0;
726 int i;
727
728 if (es == NULL)
729 return;
730
731 ES_LOCK(es);
732 if (es->polling == 0 || es_chan_active(es) == 0) {
733 ES_UNLOCK(es);
734 return;
735 }
736
737 for (i = 0; i < ES_NCHANS; i++) {
738 if (es_poll_channel(&es->ch[i]) != 0)
739 trigger |= 1 << i;
740 }
741
742 /* XXX */
743 callout_reset(&es->poll_timer, 1/*es->poll_ticks*/,
744 es_poll_callback, es);
745
746 ES_UNLOCK(es);
747
748 for (i = 0; i < ES_NCHANS; i++) {
749 if (trigger & (1 << i))
750 chn_intr(es->ch[i].channel);
751 }
752}
753
754static int
755eschan_trigger(kobj_t obj, void *data, int go)
756{
757 struct es_chinfo *ch = data;
758 struct es_info *es = ch->parent;
759 uint32_t cnt, b = 0;
760
761 if (!PCMTRIG_COMMON(go))
762 return 0;
763
764 ES_LOCK(es);
765 cnt = (ch->blksz / sndbuf_getalign(ch->buffer)) - 1;
766 if (ch->fmt & AFMT_16BIT)
767 b |= 0x02;
768 if (AFMT_CHANNEL(ch->fmt) > 1)
769 b |= 0x01;
770 if (ch->dir == PCMDIR_PLAY) {
771 if (go == PCMTRIG_START) {
772 if (ch->index == ES_DAC1) {
773 es->ctrl |= CTRL_DAC1_EN;
774 es->sctrl &= ~(SCTRL_P1LOOPSEL |
775 SCTRL_P1PAUSE | SCTRL_P1SCTRLD);
776 if (es->polling == 0)
777 es->sctrl |= SCTRL_P1INTEN;
778 else
779 es->sctrl &= ~SCTRL_P1INTEN;
780 es->sctrl |= b;
781 es_wr(es, ES1370_REG_DAC1_SCOUNT, cnt, 4);
782 /* start at beginning of buffer */
783 es_wr(es, ES1370_REG_MEMPAGE,
784 ES1370_REG_DAC1_FRAMECNT >> 8, 4);
785 es_wr(es, ES1370_REG_DAC1_FRAMECNT & 0xff,
786 (ch->bufsz >> 2) - 1, 4);
787 } else {
788 es->ctrl |= CTRL_DAC2_EN;
789 es->sctrl &= ~(SCTRL_P2ENDINC | SCTRL_P2STINC |
790 SCTRL_P2LOOPSEL | SCTRL_P2PAUSE |
791 SCTRL_P2DACSEN);
792 if (es->polling == 0)
793 es->sctrl |= SCTRL_P2INTEN;
794 else
795 es->sctrl &= ~SCTRL_P2INTEN;
796 es->sctrl |= (b << 2) |
797 ((((b >> 1) & 1) + 1) << SCTRL_SH_P2ENDINC);
798 es_wr(es, ES1370_REG_DAC2_SCOUNT, cnt, 4);
799 /* start at beginning of buffer */
800 es_wr(es, ES1370_REG_MEMPAGE,
801 ES1370_REG_DAC2_FRAMECNT >> 8, 4);
802 es_wr(es, ES1370_REG_DAC2_FRAMECNT & 0xff,
803 (ch->bufsz >> 2) - 1, 4);
804 }
805 } else
806 es->ctrl &= ~((ch->index == ES_DAC1) ?
807 CTRL_DAC1_EN : CTRL_DAC2_EN);
808 } else {
809 if (go == PCMTRIG_START) {
810 es->ctrl |= CTRL_ADC_EN;
811 es->sctrl &= ~SCTRL_R1LOOPSEL;
812 if (es->polling == 0)
813 es->sctrl |= SCTRL_R1INTEN;
814 else
815 es->sctrl &= ~SCTRL_R1INTEN;
816 es->sctrl |= b << 4;
817 es_wr(es, ES1370_REG_ADC_SCOUNT, cnt, 4);
818 /* start at beginning of buffer */
819 es_wr(es, ES1370_REG_MEMPAGE,
820 ES1370_REG_ADC_FRAMECNT >> 8, 4);
821 es_wr(es, ES1370_REG_ADC_FRAMECNT & 0xff,
822 (ch->bufsz >> 2) - 1, 4);
823 } else
824 es->ctrl &= ~CTRL_ADC_EN;
825 }
826 es_wr(es, ES1370_REG_SERIAL_CONTROL, es->sctrl, 4);
827 es_wr(es, ES1370_REG_CONTROL, es->ctrl, 4);
828 if (go == PCMTRIG_START) {
829 if (es->polling != 0) {
830 ch->ptr = 0;
831 ch->prevptr = 0;
832 if (es_chan_active(es) == 0) {
833 es->poll_ticks = 1;
834 callout_reset(&es->poll_timer, 1,
835 es_poll_callback, es);
836 }
837 }
838 ch->active = 1;
839 } else {
840 ch->active = 0;
841 if (es->polling != 0) {
842 if (es_chan_active(es) == 0) {
843 callout_stop(&es->poll_timer);
844 es->poll_ticks = 1;
845 }
846 }
847 }
848 ES_UNLOCK(es);
849 return (0);
850}
851
852static uint32_t
853eschan_getptr(kobj_t obj, void *data)
854{
855 struct es_chinfo *ch = data;
856 struct es_info *es = ch->parent;
857 uint32_t reg, cnt;
858
859 ES_LOCK(es);
860 if (es->polling != 0)
861 cnt = ch->ptr;
862 else {
863 if (ch->dir == PCMDIR_PLAY) {
864 if (ch->index == ES_DAC1)
865 reg = ES1370_REG_DAC1_FRAMECNT;
866 else
867 reg = ES1370_REG_DAC2_FRAMECNT;
868 } else
869 reg = ES1370_REG_ADC_FRAMECNT;
870 es_wr(es, ES1370_REG_MEMPAGE, reg >> 8, 4);
871 cnt = es_rd(es, reg & 0x000000ff, 4) >> 16;
872 /* cnt is longwords */
873 cnt <<= 2;
874 }
875 ES_UNLOCK(es);
876
877 cnt &= ES_BLK_ALIGN;
878
879 return (cnt);
880}
881
882static struct pcmchan_caps *
883eschan_getcaps(kobj_t obj, void *data)
884{
885 struct es_chinfo *ch = data;
886
887 return (&ch->caps);
888}
889
890static kobj_method_t eschan1370_methods[] = {
891 KOBJMETHOD(channel_init, eschan_init),
892 KOBJMETHOD(channel_setformat, eschan_setformat),
893 KOBJMETHOD(channel_setspeed, eschan1370_setspeed),
894 KOBJMETHOD(channel_setblocksize, eschan_setblocksize),
895 KOBJMETHOD(channel_setfragments, eschan_setfragments),
896 KOBJMETHOD(channel_trigger, eschan_trigger),
897 KOBJMETHOD(channel_getptr, eschan_getptr),
898 KOBJMETHOD(channel_getcaps, eschan_getcaps),
899 KOBJMETHOD_END
900};
901CHANNEL_DECLARE(eschan1370);
902
903static kobj_method_t eschan1371_methods[] = {
904 KOBJMETHOD(channel_init, eschan_init),
905 KOBJMETHOD(channel_setformat, eschan_setformat),
906 KOBJMETHOD(channel_setspeed, eschan1371_setspeed),
907 KOBJMETHOD(channel_setblocksize, eschan_setblocksize),
908 KOBJMETHOD(channel_setfragments, eschan_setfragments),
909 KOBJMETHOD(channel_trigger, eschan_trigger),
910 KOBJMETHOD(channel_getptr, eschan_getptr),
911 KOBJMETHOD(channel_getcaps, eschan_getcaps),
912 KOBJMETHOD_END
913};
914CHANNEL_DECLARE(eschan1371);
915
916/* -------------------------------------------------------------------- */
917/* The interrupt handler */
918static void
919es_intr(void *p)
920{
921 struct es_info *es = p;
922 uint32_t intsrc, sctrl;
923
924 ES_LOCK(es);
925 if (es->polling != 0) {
926 ES_UNLOCK(es);
927 return;
928 }
929 intsrc = es_rd(es, ES1370_REG_STATUS, 4);
930 if ((intsrc & STAT_INTR) == 0) {
931 ES_UNLOCK(es);
932 return;
933 }
934
935 sctrl = es->sctrl;
936 if (intsrc & STAT_ADC)
937 sctrl &= ~SCTRL_R1INTEN;
938 if (intsrc & STAT_DAC1)
939 sctrl &= ~SCTRL_P1INTEN;
940 if (intsrc & STAT_DAC2)
941 sctrl &= ~SCTRL_P2INTEN;
942
943 es_wr(es, ES1370_REG_SERIAL_CONTROL, sctrl, 4);
944 es_wr(es, ES1370_REG_SERIAL_CONTROL, es->sctrl, 4);
945 ES_UNLOCK(es);
946
947 if (intsrc & STAT_ADC)
948 chn_intr(es->ch[ES_ADC].channel);
949 if (intsrc & STAT_DAC1)
950 chn_intr(es->ch[ES_DAC1].channel);
951 if (intsrc & STAT_DAC2)
952 chn_intr(es->ch[ES_DAC2].channel);
953}
954
955/* ES1370 specific */
956static int
957es1370_init(struct es_info *es)
958{
959 uint32_t fixed_rate;
960 int r, single_pcm;
961
962 /* ES1370 default to fixed rate operation */
963 if (resource_int_value(device_get_name(es->dev),
964 device_get_unit(es->dev), "fixed_rate", &r) == 0) {
965 fixed_rate = r;
966 if (fixed_rate) {
967 if (fixed_rate < es_caps.minspeed)
968 fixed_rate = es_caps.minspeed;
969 if (fixed_rate > es_caps.maxspeed)
970 fixed_rate = es_caps.maxspeed;
971 }
972 } else
973 fixed_rate = es_caps.maxspeed;
974
975 if (resource_int_value(device_get_name(es->dev),
976 device_get_unit(es->dev), "single_pcm_mixer", &r) == 0)
977 single_pcm = (r != 0) ? 1 : 0;
978 else
979 single_pcm = 1;
980
981 ES_LOCK(es);
982 if (ES_NUMPLAY(es->escfg) == 1)
983 single_pcm = 1;
984 /* This is ES1370 */
985 es->escfg = ES_SET_IS_ES1370(es->escfg, 1);
986 if (fixed_rate)
987 es->escfg = ES_SET_FIXED_RATE(es->escfg, fixed_rate);
988 else {
989 es->escfg = ES_SET_FIXED_RATE(es->escfg, 0);
990 fixed_rate = DSP_DEFAULT_SPEED;
991 }
992 if (single_pcm)
993 es->escfg = ES_SET_SINGLE_PCM_MIX(es->escfg, 1);
994 else
995 es->escfg = ES_SET_SINGLE_PCM_MIX(es->escfg, 0);
996 es->ctrl = CTRL_CDC_EN | CTRL_JYSTK_EN | CTRL_SERR_DIS |
997 (DAC2_SRTODIV(fixed_rate) << CTRL_SH_PCLKDIV);
998 es->ctrl |= 3 << CTRL_SH_WTSRSEL;
999 es_wr(es, ES1370_REG_CONTROL, es->ctrl, 4);
1000
1001 es->sctrl = 0;
1002 es_wr(es, ES1370_REG_SERIAL_CONTROL, es->sctrl, 4);
1003
1004 /* No RST, PD */
1005 es1370_wrcodec(es, CODEC_RES_PD, 3);
1006 /*
1007 * CODEC ADC and CODEC DAC use {LR,B}CLK2 and run off the LRCLK2 PLL;
1008 * program DAC_SYNC=0!
1009 */
1010 es1370_wrcodec(es, CODEC_CSEL, 0);
1011 /* Recording source is mixer */
1012 es1370_wrcodec(es, CODEC_ADSEL, 0);
1013 /* MIC amp is 0db */
1014 es1370_wrcodec(es, CODEC_MGAIN, 0);
1015 ES_UNLOCK(es);
1016
1017 return (0);
1018}
1019
1020/* ES1371 specific */
1021int
1022es1371_init(struct es_info *es)
1023{
1024 uint32_t cssr, devid, revid, subdev;
1025 int idx;
1026
1027 ES_LOCK(es);
1028 /* This is NOT ES1370 */
1029 es->escfg = ES_SET_IS_ES1370(es->escfg, 0);
1030 es->num = 0;
1031 es->sctrl = 0;
1032 cssr = 0;
1033 devid = pci_get_devid(es->dev);
1034 revid = pci_get_revid(es->dev);
1035 subdev = (pci_get_subdevice(es->dev) << 16) |
1036 pci_get_subvendor(es->dev);
1037 /*
1038 * Joyport blacklist. Either we're facing with broken hardware
1039 * or because this hardware need special (unknown) initialization
1040 * procedures.
1041 */
1042 switch (subdev) {
1043 case 0x20001274: /* old Ensoniq */
1044 es->ctrl = 0;
1045 break;
1046 default:
1047 es->ctrl = CTRL_JYSTK_EN;
1048 break;
1049 }
1050 if (devid == CT4730_PCI_ID) {
1051 /* XXX amplifier hack? */
1052 es->ctrl |= (1 << 16);
1053 }
1054 /* initialize the chips */
1055 es_wr(es, ES1370_REG_CONTROL, es->ctrl, 4);
1056 es_wr(es, ES1370_REG_SERIAL_CONTROL, es->sctrl, 4);
1057 es_wr(es, ES1371_REG_LEGACY, 0, 4);
1058 if ((devid == ES1371_PCI_ID && revid == ES1371REV_ES1373_8) ||
1059 (devid == ES1371_PCI_ID && revid == ES1371REV_CT5880_A) ||
1060 (devid == CT5880_PCI_ID && revid == CT5880REV_CT5880_C) ||
1061 (devid == CT5880_PCI_ID && revid == CT5880REV_CT5880_D) ||
1062 (devid == CT5880_PCI_ID && revid == CT5880REV_CT5880_E)) {
1063 cssr = 1 << 29;
1064 es_wr(es, ES1370_REG_STATUS, cssr, 4);
1065 DELAY(20000);
1066 }
1067 /* AC'97 warm reset to start the bitclk */
1068 es_wr(es, ES1370_REG_CONTROL, es->ctrl, 4);
1069 es_wr(es, ES1371_REG_LEGACY, ES1371_SYNC_RES, 4);
1070 DELAY(2000);
1071 es_wr(es, ES1370_REG_CONTROL, es->sctrl, 4);
1072 es1371_wait_src_ready(es);
1073 /* Init the sample rate converter */
1074 es_wr(es, ES1371_REG_SMPRATE, ES1371_DIS_SRC, 4);
1075 for (idx = 0; idx < 0x80; idx++)
1076 es1371_src_write(es, idx, 0);
1077 es1371_src_write(es, ES_SMPREG_DAC1 + ES_SMPREG_TRUNC_N, 16 << 4);
1078 es1371_src_write(es, ES_SMPREG_DAC1 + ES_SMPREG_INT_REGS, 16 << 10);
1079 es1371_src_write(es, ES_SMPREG_DAC2 + ES_SMPREG_TRUNC_N, 16 << 4);
1080 es1371_src_write(es, ES_SMPREG_DAC2 + ES_SMPREG_INT_REGS, 16 << 10);
1081 es1371_src_write(es, ES_SMPREG_VOL_ADC, 1 << 12);
1082 es1371_src_write(es, ES_SMPREG_VOL_ADC + 1, 1 << 12);
1083 es1371_src_write(es, ES_SMPREG_VOL_DAC1, 1 << 12);
1084 es1371_src_write(es, ES_SMPREG_VOL_DAC1 + 1, 1 << 12);
1085 es1371_src_write(es, ES_SMPREG_VOL_DAC2, 1 << 12);
1086 es1371_src_write(es, ES_SMPREG_VOL_DAC2 + 1, 1 << 12);
1087 es1371_adc_rate(es, 22050, ES_ADC);
1088 es1371_dac_rate(es, 22050, ES_DAC1);
1089 es1371_dac_rate(es, 22050, ES_DAC2);
1090 /*
1091 * WARNING:
1092 * enabling the sample rate converter without properly programming
1093 * its parameters causes the chip to lock up (the SRC busy bit will
1094 * be stuck high, and I've found no way to rectify this other than
1095 * power cycle)
1096 */
1097 es1371_wait_src_ready(es);
1098 es_wr(es, ES1371_REG_SMPRATE, 0, 4);
1099 /* try to reset codec directly */
1100 es_wr(es, ES1371_REG_CODEC, 0, 4);
1101 es_wr(es, ES1370_REG_STATUS, cssr, 4);
1102 ES_UNLOCK(es);
1103
1104 return (0);
1105}
1106
1107/* -------------------------------------------------------------------- */
1108
1109static int
1110es1371_wrcd(kobj_t obj, void *s, int addr, uint32_t data)
1111{
1112 uint32_t t, x, orig;
1113 struct es_info *es = (struct es_info*)s;
1114
1115 for (t = 0; t < 0x1000; t++) {
1116 if (!es_rd(es, ES1371_REG_CODEC & CODEC_WIP, 4))
1117 break;
1118 }
1119 /* save the current state for later */
1120 x = orig = es_rd(es, ES1371_REG_SMPRATE, 4);
1121 /* enable SRC state data in SRC mux */
1122 es_wr(es, ES1371_REG_SMPRATE, (x & (ES1371_DIS_SRC | ES1371_DIS_P1 |
1123 ES1371_DIS_P2 | ES1371_DIS_R1)) | 0x00010000, 4);
1124 /* busy wait */
1125 for (t = 0; t < 0x1000; t++) {
1126 if ((es_rd(es, ES1371_REG_SMPRATE, 4) & 0x00870000) ==
1127 0x00000000)
1128 break;
1129 }
1130 /* wait for a SAFE time to write addr/data and then do it, dammit */
1131 for (t = 0; t < 0x1000; t++) {
1132 if ((es_rd(es, ES1371_REG_SMPRATE, 4) & 0x00870000) ==
1133 0x00010000)
1134 break;
1135 }
1136
1137 es_wr(es, ES1371_REG_CODEC, ((addr << CODEC_POADD_SHIFT) &
1138 CODEC_POADD_MASK) | ((data << CODEC_PODAT_SHIFT) &
1139 CODEC_PODAT_MASK), 4);
1140 /* restore SRC reg */
1141 es1371_wait_src_ready(s);
1142 es_wr(es, ES1371_REG_SMPRATE, orig, 4);
1143
1144 return (0);
1145}
1146
1147static int
1148es1371_rdcd(kobj_t obj, void *s, int addr)
1149{
1150 uint32_t t, x, orig;
1151 struct es_info *es = (struct es_info *)s;
1152
1153 for (t = 0; t < 0x1000; t++) {
1154 if (!(x = es_rd(es, ES1371_REG_CODEC, 4) & CODEC_WIP))
1155 break;
1156 }
1157
1158 /* save the current state for later */
1159 x = orig = es_rd(es, ES1371_REG_SMPRATE, 4);
1160 /* enable SRC state data in SRC mux */
1161 es_wr(es, ES1371_REG_SMPRATE, (x & (ES1371_DIS_SRC | ES1371_DIS_P1 |
1162 ES1371_DIS_P2 | ES1371_DIS_R1)) | 0x00010000, 4);
1163 /* busy wait */
1164 for (t = 0; t < 0x1000; t++) {
1165 if ((x = es_rd(es, ES1371_REG_SMPRATE, 4) & 0x00870000) ==
1166 0x00000000)
1167 break;
1168 }
1169 /* wait for a SAFE time to write addr/data and then do it, dammit */
1170 for (t = 0; t < 0x1000; t++) {
1171 if ((x = es_rd(es, ES1371_REG_SMPRATE, 4) & 0x00870000) ==
1172 0x00010000)
1173 break;
1174 }
1175
1176 es_wr(es, ES1371_REG_CODEC, ((addr << CODEC_POADD_SHIFT) &
1177 CODEC_POADD_MASK) | CODEC_PORD, 4);
1178
1179 /* restore SRC reg */
1180 es1371_wait_src_ready(s);
1181 es_wr(es, ES1371_REG_SMPRATE, orig, 4);
1182
1183 /* now wait for the stinkin' data (RDY) */
1184 for (t = 0; t < 0x1000; t++) {
1185 if ((x = es_rd(es, ES1371_REG_CODEC, 4)) & CODEC_RDY)
1186 break;
1187 }
1188
1189 return ((x & CODEC_PIDAT_MASK) >> CODEC_PIDAT_SHIFT);
1190}
1191
1192static kobj_method_t es1371_ac97_methods[] = {
1193 KOBJMETHOD(ac97_read, es1371_rdcd),
1194 KOBJMETHOD(ac97_write, es1371_wrcd),
1195 KOBJMETHOD_END
1196};
1197AC97_DECLARE(es1371_ac97);
1198
1199/* -------------------------------------------------------------------- */
1200
1201static unsigned int
1202es1371_src_read(struct es_info *es, unsigned short reg)
1203{
1204 uint32_t r;
1205
1206 r = es1371_wait_src_ready(es) & (ES1371_DIS_SRC | ES1371_DIS_P1 |
1207 ES1371_DIS_P2 | ES1371_DIS_R1);
1208 r |= ES1371_SRC_RAM_ADDRO(reg);
1209 es_wr(es, ES1371_REG_SMPRATE, r, 4);
1210 return (ES1371_SRC_RAM_DATAI(es1371_wait_src_ready(es)));
1211}
1212
1213static void
1214es1371_src_write(struct es_info *es, unsigned short reg, unsigned short data)
1215{
1216 uint32_t r;
1217
1218 r = es1371_wait_src_ready(es) & (ES1371_DIS_SRC | ES1371_DIS_P1 |
1219 ES1371_DIS_P2 | ES1371_DIS_R1);
1220 r |= ES1371_SRC_RAM_ADDRO(reg) | ES1371_SRC_RAM_DATAO(data);
1221 es_wr(es, ES1371_REG_SMPRATE, r | ES1371_SRC_RAM_WE, 4);
1222}
1223
1224static unsigned int
1225es1371_adc_rate(struct es_info *es, unsigned int rate, int set)
1226{
1227 unsigned int n, truncm, freq, result;
1228
1229 ES_LOCK_ASSERT(es);
1230
1231 if (rate > 48000)
1232 rate = 48000;
1233 if (rate < 4000)
1234 rate = 4000;
1235 n = rate / 3000;
1236 if ((1 << n) & ((1 << 15) | (1 << 13) | (1 << 11) | (1 << 9)))
1237 n--;
1238 truncm = (21 * n - 1) | 1;
1239 freq = ((48000UL << 15) / rate) * n;
1240 result = (48000UL << 15) / (freq / n);
1241 if (set) {
1242 if (rate >= 24000) {
1243 if (truncm > 239)
1244 truncm = 239;
1245 es1371_src_write(es, ES_SMPREG_ADC + ES_SMPREG_TRUNC_N,
1246 (((239 - truncm) >> 1) << 9) | (n << 4));
1247 } else {
1248 if (truncm > 119)
1249 truncm = 119;
1250 es1371_src_write(es, ES_SMPREG_ADC + ES_SMPREG_TRUNC_N,
1251 0x8000 | (((119 - truncm) >> 1) << 9) | (n << 4));
1252 }
1253 es1371_src_write(es, ES_SMPREG_ADC + ES_SMPREG_INT_REGS,
1254 (es1371_src_read(es, ES_SMPREG_ADC + ES_SMPREG_INT_REGS) &
1255 0x00ff) | ((freq >> 5) & 0xfc00));
1256 es1371_src_write(es, ES_SMPREG_ADC + ES_SMPREG_VFREQ_FRAC,
1257 freq & 0x7fff);
1258 es1371_src_write(es, ES_SMPREG_VOL_ADC, n << 8);
1259 es1371_src_write(es, ES_SMPREG_VOL_ADC + 1, n << 8);
1260 }
1261 return (result);
1262}
1263
1264static unsigned int
1265es1371_dac_rate(struct es_info *es, unsigned int rate, int set)
1266{
1267 unsigned int freq, r, result, dac, dis;
1268
1269 ES_LOCK_ASSERT(es);
1270
1271 if (rate > 48000)
1272 rate = 48000;
1273 if (rate < 4000)
1274 rate = 4000;
1275 freq = ((rate << 15) + 1500) / 3000;
1276 result = (freq * 3000) >> 15;
1277
1278 dac = (set == ES_DAC1) ? ES_SMPREG_DAC1 : ES_SMPREG_DAC2;
1279 dis = (set == ES_DAC1) ? ES1371_DIS_P2 : ES1371_DIS_P1;
1280 r = (es1371_wait_src_ready(es) & (ES1371_DIS_SRC | ES1371_DIS_P1 |
1281 ES1371_DIS_P2 | ES1371_DIS_R1));
1282 es_wr(es, ES1371_REG_SMPRATE, r, 4);
1283 es1371_src_write(es, dac + ES_SMPREG_INT_REGS,
1284 (es1371_src_read(es, dac + ES_SMPREG_INT_REGS) & 0x00ff) |
1285 ((freq >> 5) & 0xfc00));
1286 es1371_src_write(es, dac + ES_SMPREG_VFREQ_FRAC, freq & 0x7fff);
1287 r = (es1371_wait_src_ready(es) &
1288 (ES1371_DIS_SRC | dis | ES1371_DIS_R1));
1289 es_wr(es, ES1371_REG_SMPRATE, r, 4);
1290 return (result);
1291}
1292
1293static uint32_t
1294es1371_wait_src_ready(struct es_info *es)
1295{
1296 uint32_t t, r;
1297
1298 for (t = 0; t < 0x1000; t++) {
1299 if (!((r = es_rd(es, ES1371_REG_SMPRATE, 4)) &
1300 ES1371_SRC_RAM_BUSY))
1301 return (r);
1302 DELAY(1);
1303 }
1304 device_printf(es->dev, "%s: timed out 0x%x [0x%x]\n", __func__,
1305 ES1371_REG_SMPRATE, r);
1306 return (0);
1307}
1308
1309/* -------------------------------------------------------------------- */
1310
1311/*
1312 * Probe and attach the card
1313 */
1314
1315static int
1316es_pci_probe(device_t dev)
1317{
1318 switch(pci_get_devid(dev)) {
1319 case ES1370_PCI_ID:
1320 device_set_desc(dev, "AudioPCI ES1370");
1321 return (BUS_PROBE_DEFAULT);
1322 case ES1371_PCI_ID:
1323 switch(pci_get_revid(dev)) {
1324 case ES1371REV_ES1371_A:
1325 device_set_desc(dev, "AudioPCI ES1371-A");
1326 return (BUS_PROBE_DEFAULT);
1327 case ES1371REV_ES1371_B:
1328 device_set_desc(dev, "AudioPCI ES1371-B");
1329 return (BUS_PROBE_DEFAULT);
1330 case ES1371REV_ES1373_A:
1331 device_set_desc(dev, "AudioPCI ES1373-A");
1332 return (BUS_PROBE_DEFAULT);
1333 case ES1371REV_ES1373_B:
1334 device_set_desc(dev, "AudioPCI ES1373-B");
1335 return (BUS_PROBE_DEFAULT);
1336 case ES1371REV_ES1373_8:
1337 device_set_desc(dev, "AudioPCI ES1373-8");
1338 return (BUS_PROBE_DEFAULT);
1339 case ES1371REV_CT5880_A:
1340 device_set_desc(dev, "Creative CT5880-A");
1341 return (BUS_PROBE_DEFAULT);
1342 default:
1343 device_set_desc(dev, "AudioPCI ES1371-?");
1344 device_printf(dev,
1345 "unknown revision %d -- please report to "
1346 "freebsd-multimedia@freebsd.org\n",
1347 pci_get_revid(dev));
1348 return (BUS_PROBE_DEFAULT);
1349 }
1350 case ES1371_PCI_ID2:
1351 device_set_desc(dev, "Strange AudioPCI ES1371-? (vid=3274)");
1352 device_printf(dev,
1353 "unknown revision %d -- please report to "
1354 "freebsd-multimedia@freebsd.org\n", pci_get_revid(dev));
1355 return (BUS_PROBE_DEFAULT);
1356 case CT4730_PCI_ID:
1357 switch(pci_get_revid(dev)) {
1358 case CT4730REV_CT4730_A:
1359 device_set_desc(dev,
1360 "Creative SB AudioPCI CT4730/EV1938");
1361 return (BUS_PROBE_DEFAULT);
1362 default:
1363 device_set_desc(dev, "Creative SB AudioPCI CT4730-?");
1364 device_printf(dev,
1365 "unknown revision %d -- please report to "
1366 "freebsd-multimedia@freebsd.org\n",
1367 pci_get_revid(dev));
1368 return (BUS_PROBE_DEFAULT);
1369 }
1370 case CT5880_PCI_ID:
1371 switch(pci_get_revid(dev)) {
1372 case CT5880REV_CT5880_C:
1373 device_set_desc(dev, "Creative CT5880-C");
1374 return (BUS_PROBE_DEFAULT);
1375 case CT5880REV_CT5880_D:
1376 device_set_desc(dev, "Creative CT5880-D");
1377 return (BUS_PROBE_DEFAULT);
1378 case CT5880REV_CT5880_E:
1379 device_set_desc(dev, "Creative CT5880-E");
1380 return (BUS_PROBE_DEFAULT);
1381 default:
1382 device_set_desc(dev, "Creative CT5880-?");
1383 device_printf(dev,
1384 "unknown revision %d -- please report to "
1385 "freebsd-multimedia@freebsd.org\n",
1386 pci_get_revid(dev));
1387 return (BUS_PROBE_DEFAULT);
1388 }
1389 default:
1390 return (ENXIO);
1391 }
1392}
1393
1394static int
1395sysctl_es137x_spdif_enable(SYSCTL_HANDLER_ARGS)
1396{
1397 struct es_info *es;
1398 device_t dev;
1399 uint32_t r;
1400 int err, new_en;
1401
1402 dev = oidp->oid_arg1;
1403 es = pcm_getdevinfo(dev);
1404 ES_LOCK(es);
1405 r = es_rd(es, ES1370_REG_STATUS, 4);
1406 ES_UNLOCK(es);
1407 new_en = (r & ENABLE_SPDIF) ? 1 : 0;
1408 err = sysctl_handle_int(oidp, &new_en, 0, req);
1409
1410 if (err || req->newptr == NULL)
1411 return (err);
1412 if (new_en < 0 || new_en > 1)
1413 return (EINVAL);
1414
1415 ES_LOCK(es);
1416 if (new_en) {
1417 r |= ENABLE_SPDIF;
1418 es->ctrl |= SPDIFEN_B;
1419 es->ctrl |= RECEN_B;
1420 } else {
1421 r &= ~ENABLE_SPDIF;
1422 es->ctrl &= ~SPDIFEN_B;
1423 es->ctrl &= ~RECEN_B;
1424 }
1425 es_wr(es, ES1370_REG_CONTROL, es->ctrl, 4);
1426 es_wr(es, ES1370_REG_STATUS, r, 4);
1427 ES_UNLOCK(es);
1428
1429 return (0);
1430}
1431
1432static int
1433sysctl_es137x_latency_timer(SYSCTL_HANDLER_ARGS)
1434{
1435 struct es_info *es;
1436 device_t dev;
1437 uint32_t val;
1438 int err;
1439
1440 dev = oidp->oid_arg1;
1441 es = pcm_getdevinfo(dev);
1442 ES_LOCK(es);
1443 val = pci_read_config(dev, PCIR_LATTIMER, 1);
1444 ES_UNLOCK(es);
1445 err = sysctl_handle_int(oidp, &val, 0, req);
1446
1447 if (err || req->newptr == NULL)
1448 return (err);
1449 if (val > 255)
1450 return (EINVAL);
1451
1452 ES_LOCK(es);
1453 pci_write_config(dev, PCIR_LATTIMER, val, 1);
1454 ES_UNLOCK(es);
1455
1456 return (0);
1457}
1458
1459static int
1460sysctl_es137x_fixed_rate(SYSCTL_HANDLER_ARGS)
1461{
1462 struct es_info *es;
1463 device_t dev;
1464 uint32_t val;
1465 int err;
1466
1467 dev = oidp->oid_arg1;
1468 es = pcm_getdevinfo(dev);
1469 ES_LOCK(es);
1470 val = ES_FIXED_RATE(es->escfg);
1471 if (val < es_caps.minspeed)
1472 val = 0;
1473 ES_UNLOCK(es);
1474 err = sysctl_handle_int(oidp, &val, 0, req);
1475
1476 if (err || req->newptr == NULL)
1477 return (err);
1478 if (val != 0 && (val < es_caps.minspeed || val > es_caps.maxspeed))
1479 return (EINVAL);
1480
1481 ES_LOCK(es);
1482 if (es->ctrl & (CTRL_DAC2_EN|CTRL_ADC_EN)) {
1483 ES_UNLOCK(es);
1484 return (EBUSY);
1485 }
1486 if (val) {
1487 if (val != ES_FIXED_RATE(es->escfg)) {
1488 es->escfg = ES_SET_FIXED_RATE(es->escfg, val);
1489 es->ch[ES_DAC2].caps.maxspeed = val;
1490 es->ch[ES_DAC2].caps.minspeed = val;
1491 es->ch[ES_ADC].caps.maxspeed = val;
1492 es->ch[ES_ADC].caps.minspeed = val;
1493 es->ctrl &= ~CTRL_PCLKDIV;
1494 es->ctrl |= DAC2_SRTODIV(val) << CTRL_SH_PCLKDIV;
1495 es_wr(es, ES1370_REG_CONTROL, es->ctrl, 4);
1496 }
1497 } else {
1498 es->escfg = ES_SET_FIXED_RATE(es->escfg, 0);
1499 es->ch[ES_DAC2].caps = es_caps;
1500 es->ch[ES_ADC].caps = es_caps;
1501 }
1502 ES_UNLOCK(es);
1503
1504 return (0);
1505}
1506
1507static int
1508sysctl_es137x_single_pcm_mixer(SYSCTL_HANDLER_ARGS)
1509{
1510 struct es_info *es;
1511 struct snddev_info *d;
1512 struct snd_mixer *m;
1513 device_t dev;
1514 uint32_t val, set;
1515 int recsrc, level, err;
1516
1517 dev = oidp->oid_arg1;
1518 d = device_get_softc(dev);
1519 if (!PCM_REGISTERED(d) || d->mixer_dev == NULL ||
1520 d->mixer_dev->si_drv1 == NULL)
1521 return (EINVAL);
1522 es = d->devinfo;
1523 if (es == NULL)
1524 return (EINVAL);
1525 ES_LOCK(es);
1526 set = ES_SINGLE_PCM_MIX(es->escfg);
1527 val = set;
1528 ES_UNLOCK(es);
1529 err = sysctl_handle_int(oidp, &val, 0, req);
1530
1531 if (err || req->newptr == NULL)
1532 return (err);
1533 if (!(val == 0 || val == 1))
1534 return (EINVAL);
1535 if (val == set)
1536 return (0);
1537 PCM_ACQUIRE_QUICK(d);
1538 m = (d->mixer_dev != NULL) ? d->mixer_dev->si_drv1 : NULL;
1539 if (m == NULL) {
1540 PCM_RELEASE_QUICK(d);
1541 return (ENODEV);
1542 }
1543 if (mixer_busy(m) != 0) {
1544 PCM_RELEASE_QUICK(d);
1545 return (EBUSY);
1546 }
1547 level = mix_get(m, SOUND_MIXER_PCM);
1548 recsrc = mix_getrecsrc(m);
1549 if (level < 0 || recsrc < 0) {
1550 PCM_RELEASE_QUICK(d);
1551 return (ENXIO);
1552 }
1553
1554 ES_LOCK(es);
1555 if (es->ctrl & (CTRL_ADC_EN | CTRL_DAC1_EN | CTRL_DAC2_EN)) {
1556 ES_UNLOCK(es);
1557 PCM_RELEASE_QUICK(d);
1558 return (EBUSY);
1559 }
1560 if (val)
1561 es->escfg = ES_SET_SINGLE_PCM_MIX(es->escfg, 1);
1562 else
1563 es->escfg = ES_SET_SINGLE_PCM_MIX(es->escfg, 0);
1564 ES_UNLOCK(es);
1565 if (!val) {
1566 mix_setdevs(m, mix_getdevs(m) | (1 << SOUND_MIXER_SYNTH));
1567 mix_setrecdevs(m, mix_getrecdevs(m) | (1 << SOUND_MIXER_SYNTH));
1568 err = mix_set(m, SOUND_MIXER_SYNTH, level & 0x7f,
1569 (level >> 8) & 0x7f);
1570 } else {
1571 err = mix_set(m, SOUND_MIXER_SYNTH, level & 0x7f,
1572 (level >> 8) & 0x7f);
1573 mix_setdevs(m, mix_getdevs(m) & ~(1 << SOUND_MIXER_SYNTH));
1574 mix_setrecdevs(m, mix_getrecdevs(m) &
1575 ~(1 << SOUND_MIXER_SYNTH));
1576 }
1577 if (!err) {
1578 level = recsrc;
1579 if (recsrc & (1 << SOUND_MIXER_PCM))
1580 recsrc |= 1 << SOUND_MIXER_SYNTH;
1581 else if (recsrc & (1 << SOUND_MIXER_SYNTH))
1582 recsrc |= 1 << SOUND_MIXER_PCM;
1583 if (level != recsrc)
1584 err = mix_setrecsrc(m, recsrc);
1585 }
1586
1587 PCM_RELEASE_QUICK(d);
1588
1589 return (err);
1590}
1591
1592static int
1593sysctl_es_polling(SYSCTL_HANDLER_ARGS)
1594{
1595 struct es_info *es;
1596 device_t dev;
1597 int err, val;
1598
1599 dev = oidp->oid_arg1;
1600 es = pcm_getdevinfo(dev);
1601 if (es == NULL)
1602 return (EINVAL);
1603 ES_LOCK(es);
1604 val = es->polling;
1605 ES_UNLOCK(es);
1606 err = sysctl_handle_int(oidp, &val, 0, req);
1607
1608 if (err || req->newptr == NULL)
1609 return (err);
1610 if (val < 0 || val > 1)
1611 return (EINVAL);
1612
1613 ES_LOCK(es);
1614 if (val != es->polling) {
1615 if (es_chan_active(es) != 0)
1616 err = EBUSY;
1617 else if (val == 0)
1618 es->polling = 0;
1619 else
1620 es->polling = 1;
1621 }
1622 ES_UNLOCK(es);
1623
1624 return (err);
1625}
1626
1627static void
1628es_init_sysctls(device_t dev)
1629{
1630 struct es_info *es;
1631 int r, devid, revid;
1632
1633 devid = pci_get_devid(dev);
1634 revid = pci_get_revid(dev);
1635 es = pcm_getdevinfo(dev);
1636 if ((devid == ES1371_PCI_ID && revid == ES1371REV_ES1373_8) ||
1637 (devid == ES1371_PCI_ID && revid == ES1371REV_CT5880_A) ||
1638 (devid == CT5880_PCI_ID && revid == CT5880REV_CT5880_C) ||
1639 (devid == CT5880_PCI_ID && revid == CT5880REV_CT5880_D) ||
1640 (devid == CT5880_PCI_ID && revid == CT5880REV_CT5880_E)) {
1641 /* XXX: an user should be able to set this with a control tool,
1642 if not done before 7.0-RELEASE, this needs to be converted
1643 to a device specific sysctl "dev.pcm.X.yyy" via
1644 device_get_sysctl_*() as discussed on multimedia@ in msg-id
1645 <861wujij2q.fsf@xps.des.no> */
1646 SYSCTL_ADD_PROC(device_get_sysctl_ctx(dev),
1647 SYSCTL_CHILDREN(device_get_sysctl_tree(dev)), OID_AUTO,
1648 "spdif_enabled", CTLTYPE_INT | CTLFLAG_RW, dev, sizeof(dev),
1649 sysctl_es137x_spdif_enable, "I",
1650 "Enable S/PDIF output on primary playback channel");
1651 } else if (devid == ES1370_PCI_ID) {
1652 /*
1653 * Enable fixed rate sysctl if both DAC2 / ADC enabled.
1654 */
1655 if (es->ch[ES_DAC2].channel != NULL &&
1656 es->ch[ES_ADC].channel != NULL) {
1657 /* XXX: an user should be able to set this with a control tool,
1658 if not done before 7.0-RELEASE, this needs to be converted
1659 to a device specific sysctl "dev.pcm.X.yyy" via
1660 device_get_sysctl_*() as discussed on multimedia@ in msg-id
1661 <861wujij2q.fsf@xps.des.no> */
1662 SYSCTL_ADD_PROC(device_get_sysctl_ctx(dev),
1663 SYSCTL_CHILDREN(device_get_sysctl_tree(dev)),
1664 OID_AUTO, "fixed_rate", CTLTYPE_INT | CTLFLAG_RW,
1665 dev, sizeof(dev), sysctl_es137x_fixed_rate, "I",
1666 "Enable fixed rate playback/recording");
1667 }
1668 /*
1669 * Enable single pcm mixer sysctl if both DAC1/2 enabled.
1670 */
1671 if (es->ch[ES_DAC1].channel != NULL &&
1672 es->ch[ES_DAC2].channel != NULL) {
1673 /* XXX: an user should be able to set this with a control tool,
1674 if not done before 7.0-RELEASE, this needs to be converted
1675 to a device specific sysctl "dev.pcm.X.yyy" via
1676 device_get_sysctl_*() as discussed on multimedia@ in msg-id
1677 <861wujij2q.fsf@xps.des.no> */
1678 SYSCTL_ADD_PROC(device_get_sysctl_ctx(dev),
1679 SYSCTL_CHILDREN(device_get_sysctl_tree(dev)),
1680 OID_AUTO, "single_pcm_mixer",
1681 CTLTYPE_INT | CTLFLAG_RW, dev, sizeof(dev),
1682 sysctl_es137x_single_pcm_mixer, "I",
1683 "Single PCM mixer controller for both DAC1/DAC2");
1684 }
1685 }
1686 if (resource_int_value(device_get_name(dev), device_get_unit(dev),
1687 "latency_timer", &r) == 0 && !(r < 0 || r > 255))
1688 pci_write_config(dev, PCIR_LATTIMER, r, 1);
1689 /* XXX: this needs to be converted to a device specific sysctl
1690 "dev.pcm.X.yyy" via device_get_sysctl_*() as discussed on
1691 multimedia@ in msg-id <861wujij2q.fsf@xps.des.no> */
1692 SYSCTL_ADD_PROC(device_get_sysctl_ctx(dev),
1693 SYSCTL_CHILDREN(device_get_sysctl_tree(dev)), OID_AUTO,
1694 "latency_timer", CTLTYPE_INT | CTLFLAG_RW, dev, sizeof(dev),
1695 sysctl_es137x_latency_timer, "I",
1696 "PCI Latency Timer configuration");
1697 SYSCTL_ADD_PROC(device_get_sysctl_ctx(dev),
1698 SYSCTL_CHILDREN(device_get_sysctl_tree(dev)), OID_AUTO,
1699 "polling", CTLTYPE_INT | CTLFLAG_RW, dev, sizeof(dev),
1700 sysctl_es_polling, "I",
1701 "Enable polling mode");
1702}
1703
1704static int
1705es_pci_attach(device_t dev)
1706{
1707 uint32_t data;
1708 struct es_info *es = NULL;
1709 int mapped, i, numplay, dac_cfg;
1710 char status[SND_STATUSLEN];
1711 struct ac97_info *codec = NULL;
1712 kobj_class_t ct = NULL;
1713 uint32_t devid;
1714
1715 es = malloc(sizeof *es, M_DEVBUF, M_WAITOK | M_ZERO);
1716 es->lock = snd_mtxcreate(device_get_nameunit(dev), "snd_es137x softc");
1717 es->dev = dev;
1718 es->escfg = 0;
1719 mapped = 0;
1720
1721 pci_enable_busmaster(dev);
1722 data = pci_read_config(dev, PCIR_COMMAND, 2);
1723 data |= (PCIM_CMD_PORTEN|PCIM_CMD_MEMEN);
1724 pci_write_config(dev, PCIR_COMMAND, data, 2);
1725 data = pci_read_config(dev, PCIR_COMMAND, 2);
1726 if (mapped == 0 && (data & PCIM_CMD_MEMEN)) {
1727 es->regid = MEM_MAP_REG;
1728 es->regtype = SYS_RES_MEMORY;
1729 es->reg = bus_alloc_resource_any(dev, es->regtype, &es->regid,
1730 RF_ACTIVE);
1731 if (es->reg)
1732 mapped++;
1733 }
1734 if (mapped == 0 && (data & PCIM_CMD_PORTEN)) {
1735 es->regid = PCIR_BAR(0);
1736 es->regtype = SYS_RES_IOPORT;
1737 es->reg = bus_alloc_resource_any(dev, es->regtype, &es->regid,
1738 RF_ACTIVE);
1739 if (es->reg)
1740 mapped++;
1741 }
1742 if (mapped == 0) {
1743 device_printf(dev, "unable to map register space\n");
1744 goto bad;
1745 }
1746
1747 es->st = rman_get_bustag(es->reg);
1748 es->sh = rman_get_bushandle(es->reg);
1749 callout_init(&es->poll_timer, CALLOUT_MPSAFE);
1750 es->poll_ticks = 1;
1751
1752 if (resource_int_value(device_get_name(dev),
1753 device_get_unit(dev), "polling", &i) == 0 && i != 0)
1754 es->polling = 1;
1755 else
1756 es->polling = 0;
1757
1758 es->bufsz = pcm_getbuffersize(dev, 4096, ES_DEFAULT_BUFSZ, 65536);
1759 if (resource_int_value(device_get_name(dev),
1760 device_get_unit(dev), "blocksize", &i) == 0 && i > 0) {
1761 i &= ES_BLK_ALIGN;
1762 if (i < ES_BLK_MIN)
1763 i = ES_BLK_MIN;
1764 es->blkcnt = es->bufsz / i;
1765 i = 0;
1766 while (es->blkcnt >> i)
1767 i++;
1768 es->blkcnt = 1 << (i - 1);
1769 if (es->blkcnt < ES_DMA_SEGS_MIN)
1770 es->blkcnt = ES_DMA_SEGS_MIN;
1771 else if (es->blkcnt > ES_DMA_SEGS_MAX)
1772 es->blkcnt = ES_DMA_SEGS_MAX;
1773
1774 } else
1775 es->blkcnt = 2;
1776
1777 if (resource_int_value(device_get_name(dev), device_get_unit(dev),
1778 "dac", &dac_cfg) == 0) {
1779 if (dac_cfg < 0 || dac_cfg > 3)
1780 dac_cfg = ES_DEFAULT_DAC_CFG;
1781 } else
1782 dac_cfg = ES_DEFAULT_DAC_CFG;
1783
1784 switch (dac_cfg) {
1785 case 0: /* Enable all DAC: DAC1, DAC2 */
1786 numplay = 2;
1787 es->escfg = ES_SET_DAC_FIRST(es->escfg, ES_DAC1);
1788 es->escfg = ES_SET_DAC_SECOND(es->escfg, ES_DAC2);
1789 break;
1790 case 1: /* Only DAC1 */
1791 numplay = 1;
1792 es->escfg = ES_SET_DAC_FIRST(es->escfg, ES_DAC1);
1793 break;
1794 case 3: /* Enable all DAC / swap position: DAC2, DAC1 */
1795 numplay = 2;
1796 es->escfg = ES_SET_DAC_FIRST(es->escfg, ES_DAC2);
1797 es->escfg = ES_SET_DAC_SECOND(es->escfg, ES_DAC1);
1798 break;
1799 case 2: /* Only DAC2 */
1800 default:
1801 numplay = 1;
1802 es->escfg = ES_SET_DAC_FIRST(es->escfg, ES_DAC2);
1803 break;
1804 }
1805 es->escfg = ES_SET_NUMPLAY(es->escfg, numplay);
1806 es->escfg = ES_SET_NUMREC(es->escfg, 1);
1807
1808 devid = pci_get_devid(dev);
1809 switch (devid) {
1810 case ES1371_PCI_ID:
1811 case ES1371_PCI_ID2:
1812 case CT5880_PCI_ID:
1813 case CT4730_PCI_ID:
1814 es1371_init(es);
1815 codec = AC97_CREATE(dev, es, es1371_ac97);
1816 if (codec == NULL)
1817 goto bad;
1818 /* our init routine does everything for us */
1819 /* set to NULL; flag mixer_init not to run the ac97_init */
1820 /* ac97_mixer.init = NULL; */
1821 if (mixer_init(dev, ac97_getmixerclass(), codec))
1822 goto bad;
1823 ct = &eschan1371_class;
1824 break;
1825 case ES1370_PCI_ID:
1826 es1370_init(es);
1827 /*
1828 * Disable fixed rate operation if DAC2 disabled.
1829 * This is a special case for es1370 only, where the
1830 * speed of both ADC and DAC2 locked together.
1831 */
1832 if (!ES_DAC2_ENABLED(es->escfg))
1833 es->escfg = ES_SET_FIXED_RATE(es->escfg, 0);
1834 if (mixer_init(dev, &es1370_mixer_class, es))
1835 goto bad;
1836 ct = &eschan1370_class;
1837 break;
1838 default:
1839 goto bad;
1840 /* NOTREACHED */
1841 }
1842
1843 es->irqid = 0;
1844 es->irq = bus_alloc_resource_any(dev, SYS_RES_IRQ, &es->irqid,
1845 RF_ACTIVE | RF_SHAREABLE);
1846 if (!es->irq || snd_setup_intr(dev, es->irq, INTR_MPSAFE, es_intr,
1847 es, &es->ih)) {
1848 device_printf(dev, "unable to map interrupt\n");
1849 goto bad;
1850 }
1851
1852 if (bus_dma_tag_create(/*parent*/bus_get_dma_tag(dev),
1853 /*alignment*/2, /*boundary*/0,
1854 /*lowaddr*/BUS_SPACE_MAXADDR_32BIT,
1855 /*highaddr*/BUS_SPACE_MAXADDR,
1856 /*filter*/NULL, /*filterarg*/NULL,
1857 /*maxsize*/es->bufsz, /*nsegments*/1, /*maxsegz*/0x3ffff,
1858 /*flags*/0, /*lockfunc*/NULL,
1859 /*lockarg*/NULL, &es->parent_dmat) != 0) {
1860 device_printf(dev, "unable to create dma tag\n");
1861 goto bad;
1862 }
1863
1864 snprintf(status, SND_STATUSLEN, "at %s 0x%lx irq %ld %s",
1865 (es->regtype == SYS_RES_IOPORT)? "io" : "memory",
1866 rman_get_start(es->reg), rman_get_start(es->irq),
1867 PCM_KLDSTRING(snd_es137x));
1868
1869 if (pcm_register(dev, es, numplay, 1))
1870 goto bad;
1871 for (i = 0; i < numplay; i++)
1872 pcm_addchan(dev, PCMDIR_PLAY, ct, es);
1873 pcm_addchan(dev, PCMDIR_REC, ct, es);
1874 es_init_sysctls(dev);
1875 pcm_setstatus(dev, status);
1876 es->escfg = ES_SET_GP(es->escfg, 0);
1877 if (numplay == 1)
1878 device_printf(dev, "<Playback: DAC%d / Record: ADC>\n",
1879 ES_DAC_FIRST(es->escfg) + 1);
1880 else if (numplay == 2)
1881 device_printf(dev, "<Playback: DAC%d,DAC%d / Record: ADC>\n",
1882 ES_DAC_FIRST(es->escfg) + 1, ES_DAC_SECOND(es->escfg) + 1);
1883 return (0);
1884
1885bad:
1886 if (es->parent_dmat)
1887 bus_dma_tag_destroy(es->parent_dmat);
1888 if (es->ih)
1889 bus_teardown_intr(dev, es->irq, es->ih);
1890 if (es->irq)
1891 bus_release_resource(dev, SYS_RES_IRQ, es->irqid, es->irq);
1892 if (codec)
1893 ac97_destroy(codec);
1894 if (es->reg)
1895 bus_release_resource(dev, es->regtype, es->regid, es->reg);
1896 if (es->lock)
1897 snd_mtxfree(es->lock);
1898 if (es)
1899 free(es, M_DEVBUF);
1900 return (ENXIO);
1901}
1902
1903static int
1904es_pci_detach(device_t dev)
1905{
1906 int r;
1907 struct es_info *es;
1908
1909 r = pcm_unregister(dev);
1910 if (r)
1911 return (r);
1912
1913 es = pcm_getdevinfo(dev);
1914
1915 if (es != NULL && es->num != 0) {
1916 ES_LOCK(es);
1917 es->polling = 0;
1918 callout_stop(&es->poll_timer);
1919 ES_UNLOCK(es);
1920 callout_drain(&es->poll_timer);
1921 }
1922
1923 bus_teardown_intr(dev, es->irq, es->ih);
1924 bus_release_resource(dev, SYS_RES_IRQ, es->irqid, es->irq);
1925 bus_release_resource(dev, es->regtype, es->regid, es->reg);
1926 bus_dma_tag_destroy(es->parent_dmat);
1927 snd_mtxfree(es->lock);
1928 free(es, M_DEVBUF);
1929
1930 return (0);
1931}
1932
1933static device_method_t es_methods[] = {
1934 /* Device interface */
1935 DEVMETHOD(device_probe, es_pci_probe),
1936 DEVMETHOD(device_attach, es_pci_attach),
1937 DEVMETHOD(device_detach, es_pci_detach),
1938
1939 { 0, 0 }
1940};
1941
1942static driver_t es_driver = {
1943 "pcm",
1944 es_methods,
1945 PCM_SOFTC_SIZE,
1946};
1947
1948DRIVER_MODULE(snd_es137x, pci, es_driver, pcm_devclass, 0, 0);
1949MODULE_DEPEND(snd_es137x, sound, SOUND_MINVER, SOUND_PREFVER, SOUND_MAXVER);
1950MODULE_VERSION(snd_es137x, 1);
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