63
64static int debug = 0;
65SYSCTL_INT(_debug, OID_AUTO, es_debug, CTLFLAG_RW, &debug, 0, "");
66
67#define MEM_MAP_REG 0x14
68
69/* PCI IDs of supported chips */
70#define ES1370_PCI_ID 0x50001274
71#define ES1371_PCI_ID 0x13711274
72#define ES1371_PCI_ID2 0x13713274
73#define CT5880_PCI_ID 0x58801274
74#define CT4730_PCI_ID 0x89381102
75
76#define ES1371REV_ES1371_A 0x02
77#define ES1371REV_ES1371_B 0x09
78
79#define ES1371REV_ES1373_8 0x08
80#define ES1371REV_ES1373_A 0x04
81#define ES1371REV_ES1373_B 0x06
82
83#define ES1371REV_CT5880_A 0x07
84
85#define CT5880REV_CT5880_C 0x02
86#define CT5880REV_CT5880_D 0x03
87#define CT5880REV_CT5880_E 0x04
88
89#define CT4730REV_CT4730_A 0x00
90
91#define ES_DEFAULT_BUFSZ 4096
92
93/* device private data */
94struct es_info;
95
96struct es_chinfo {
97 struct es_info *parent;
98 struct pcm_channel *channel;
99 struct snd_dbuf *buffer;
100 int dir, num;
101 u_int32_t fmt, blksz, bufsz;
102};
103
104struct es_info {
105 bus_space_tag_t st;
106 bus_space_handle_t sh;
107 bus_dma_tag_t parent_dmat;
108
109 struct resource *reg, *irq;
110 int regtype, regid, irqid;
111 void *ih;
112
113 device_t dev;
114 int num;
115 unsigned int bufsz;
116
117 /* Contents of board's registers */
118 u_long ctrl;
119 u_long sctrl;
120 struct es_chinfo pch, rch;
121};
122
123/* -------------------------------------------------------------------- */
124
125/* prototypes */
126static void es_intr(void *);
127
128static u_int es1371_wait_src_ready(struct es_info *);
129static void es1371_src_write(struct es_info *, u_short, unsigned short);
130static u_int es1371_adc_rate(struct es_info *, u_int, int);
131static u_int es1371_dac_rate(struct es_info *, u_int, int);
132static int es1371_init(struct es_info *, device_t);
133static int es1370_init(struct es_info *);
134static int es1370_wrcodec(struct es_info *, u_char, u_char);
135
136static u_int32_t es_playfmt[] = {
137 AFMT_U8,
138 AFMT_STEREO | AFMT_U8,
139 AFMT_S16_LE,
140 AFMT_STEREO | AFMT_S16_LE,
141 0
142};
143static struct pcmchan_caps es_playcaps = {4000, 48000, es_playfmt, 0};
144
145static u_int32_t es_recfmt[] = {
146 AFMT_U8,
147 AFMT_STEREO | AFMT_U8,
148 AFMT_S16_LE,
149 AFMT_STEREO | AFMT_S16_LE,
150 0
151};
152static struct pcmchan_caps es_reccaps = {4000, 48000, es_recfmt, 0};
153
154static const struct {
155 unsigned volidx:4;
156 unsigned left:4;
157 unsigned right:4;
158 unsigned stereo:1;
159 unsigned recmask:13;
160 unsigned avail:1;
161} mixtable[SOUND_MIXER_NRDEVICES] = {
162 [SOUND_MIXER_VOLUME] = { 0, 0x0, 0x1, 1, 0x0000, 1 },
163 [SOUND_MIXER_PCM] = { 1, 0x2, 0x3, 1, 0x0400, 1 },
164 [SOUND_MIXER_SYNTH] = { 2, 0x4, 0x5, 1, 0x0060, 1 },
165 [SOUND_MIXER_CD] = { 3, 0x6, 0x7, 1, 0x0006, 1 },
166 [SOUND_MIXER_LINE] = { 4, 0x8, 0x9, 1, 0x0018, 1 },
167 [SOUND_MIXER_LINE1] = { 5, 0xa, 0xb, 1, 0x1800, 1 },
168 [SOUND_MIXER_LINE2] = { 6, 0xc, 0x0, 0, 0x0100, 1 },
169 [SOUND_MIXER_LINE3] = { 7, 0xd, 0x0, 0, 0x0200, 1 },
170 [SOUND_MIXER_MIC] = { 8, 0xe, 0x0, 0, 0x0001, 1 },
171 [SOUND_MIXER_OGAIN] = { 9, 0xf, 0x0, 0, 0x0000, 1 }
172};
173
174/* -------------------------------------------------------------------- */
175/* The es1370 mixer interface */
176
177static int
178es1370_mixinit(struct snd_mixer *m)
179{
180 int i;
181 u_int32_t v;
182
183 v = 0;
184 for (i = 0; i < SOUND_MIXER_NRDEVICES; i++)
185 if (mixtable[i].avail) v |= (1 << i);
186 mix_setdevs(m, v);
187 v = 0;
188 for (i = 0; i < SOUND_MIXER_NRDEVICES; i++)
189 if (mixtable[i].recmask) v |= (1 << i);
190 mix_setrecdevs(m, v);
191 return 0;
192}
193
194static int
195es1370_mixset(struct snd_mixer *m, unsigned dev, unsigned left, unsigned right)
196{
197 int l, r, rl, rr;
198
199 if (!mixtable[dev].avail) return -1;
200 l = left;
201 r = mixtable[dev].stereo? right : l;
202 if (mixtable[dev].left == 0xf) {
203 rl = (l < 2)? 0x80 : 7 - (l - 2) / 14;
204 } else {
205 rl = (l < 10)? 0x80 : 15 - (l - 10) / 6;
206 }
207 if (mixtable[dev].stereo) {
208 rr = (r < 10)? 0x80 : 15 - (r - 10) / 6;
209 es1370_wrcodec(mix_getdevinfo(m), mixtable[dev].right, rr);
210 }
211 es1370_wrcodec(mix_getdevinfo(m), mixtable[dev].left, rl);
212 return l | (r << 8);
213}
214
215static int
216es1370_mixsetrecsrc(struct snd_mixer *m, u_int32_t src)
217{
218 int i, j = 0;
219
220 if (src == 0) src = 1 << SOUND_MIXER_MIC;
221 src &= mix_getrecdevs(m);
222 for (i = 0; i < SOUND_MIXER_NRDEVICES; i++)
223 if ((src & (1 << i)) != 0) j |= mixtable[i].recmask;
224
225 es1370_wrcodec(mix_getdevinfo(m), CODEC_LIMIX1, j & 0x55);
226 es1370_wrcodec(mix_getdevinfo(m), CODEC_RIMIX1, j & 0xaa);
227 es1370_wrcodec(mix_getdevinfo(m), CODEC_LIMIX2, (j >> 8) & 0x17);
228 es1370_wrcodec(mix_getdevinfo(m), CODEC_RIMIX2, (j >> 8) & 0x0f);
229 es1370_wrcodec(mix_getdevinfo(m), CODEC_OMIX1, 0x7f);
230 es1370_wrcodec(mix_getdevinfo(m), CODEC_OMIX2, 0x3f);
231 return src;
232}
233
234static kobj_method_t es1370_mixer_methods[] = {
235 KOBJMETHOD(mixer_init, es1370_mixinit),
236 KOBJMETHOD(mixer_set, es1370_mixset),
237 KOBJMETHOD(mixer_setrecsrc, es1370_mixsetrecsrc),
238 { 0, 0 }
239};
240MIXER_DECLARE(es1370_mixer);
241
242/* -------------------------------------------------------------------- */
243
244static int
245es1370_wrcodec(struct es_info *es, u_char i, u_char data)
246{
247 int wait = 100; /* 100 msec timeout */
248
249 do {
250 if ((bus_space_read_4(es->st, es->sh, ES1370_REG_STATUS) &
251 STAT_CSTAT) == 0) {
252 bus_space_write_2(es->st, es->sh, ES1370_REG_CODEC,
253 ((u_short)i << CODEC_INDEX_SHIFT) | data);
254 return 0;
255 }
256 DELAY(1000);
257 } while (--wait);
258 printf("pcm: es1370_wrcodec timed out\n");
259 return -1;
260}
261
262/* -------------------------------------------------------------------- */
263
264/* channel interface */
265static void *
266eschan_init(kobj_t obj, void *devinfo, struct snd_dbuf *b, struct pcm_channel *c, int dir)
267{
268 struct es_info *es = devinfo;
269 struct es_chinfo *ch = (dir == PCMDIR_PLAY)? &es->pch : &es->rch;
270
271 ch->parent = es;
272 ch->channel = c;
273 ch->buffer = b;
274 ch->bufsz = es->bufsz;
275 ch->blksz = ch->bufsz / 2;
276 ch->num = ch->parent->num++;
277 if (sndbuf_alloc(ch->buffer, es->parent_dmat, ch->bufsz) == -1) return NULL;
278 return ch;
279}
280
281static int
282eschan_setdir(kobj_t obj, void *data, int dir)
283{
284 struct es_chinfo *ch = data;
285 struct es_info *es = ch->parent;
286
287 if (dir == PCMDIR_PLAY) {
288 bus_space_write_1(es->st, es->sh, ES1370_REG_MEMPAGE, ES1370_REG_DAC2_FRAMEADR >> 8);
289 bus_space_write_4(es->st, es->sh, ES1370_REG_DAC2_FRAMEADR & 0xff, sndbuf_getbufaddr(ch->buffer));
290 bus_space_write_4(es->st, es->sh, ES1370_REG_DAC2_FRAMECNT & 0xff, (ch->bufsz >> 2) - 1);
291 } else {
292 bus_space_write_1(es->st, es->sh, ES1370_REG_MEMPAGE, ES1370_REG_ADC_FRAMEADR >> 8);
293 bus_space_write_4(es->st, es->sh, ES1370_REG_ADC_FRAMEADR & 0xff, sndbuf_getbufaddr(ch->buffer));
294 bus_space_write_4(es->st, es->sh, ES1370_REG_ADC_FRAMECNT & 0xff, (ch->bufsz >> 2) - 1);
295 }
296 ch->dir = dir;
297 return 0;
298}
299
300static int
301eschan_setformat(kobj_t obj, void *data, u_int32_t format)
302{
303 struct es_chinfo *ch = data;
304 struct es_info *es = ch->parent;
305
306 if (ch->dir == PCMDIR_PLAY) {
307 es->sctrl &= ~SCTRL_P2FMT;
308 if (format & AFMT_S16_LE) es->sctrl |= SCTRL_P2SEB;
309 if (format & AFMT_STEREO) es->sctrl |= SCTRL_P2SMB;
310 } else {
311 es->sctrl &= ~SCTRL_R1FMT;
312 if (format & AFMT_S16_LE) es->sctrl |= SCTRL_R1SEB;
313 if (format & AFMT_STEREO) es->sctrl |= SCTRL_R1SMB;
314 }
315 bus_space_write_4(es->st, es->sh, ES1370_REG_SERIAL_CONTROL, es->sctrl);
316 ch->fmt = format;
317 return 0;
318}
319
320static int
321eschan1370_setspeed(kobj_t obj, void *data, u_int32_t speed)
322{
323 struct es_chinfo *ch = data;
324 struct es_info *es = ch->parent;
325
326 es->ctrl &= ~CTRL_PCLKDIV;
327 es->ctrl |= DAC2_SRTODIV(speed) << CTRL_SH_PCLKDIV;
328 bus_space_write_4(es->st, es->sh, ES1370_REG_CONTROL, es->ctrl);
329 /* rec/play speeds locked together - should indicate in flags */
330 return speed; /* XXX calc real speed */
331}
332
333static int
334eschan1371_setspeed(kobj_t obj, void *data, u_int32_t speed)
335{
336 struct es_chinfo *ch = data;
337 struct es_info *es = ch->parent;
338
339 if (ch->dir == PCMDIR_PLAY) {
340 return es1371_dac_rate(es, speed, 3 - ch->num); /* play */
341 } else {
342 return es1371_adc_rate(es, speed, 1); /* record */
343 }
344}
345
346static int
347eschan_setblocksize(kobj_t obj, void *data, u_int32_t blocksize)
348{
349 struct es_chinfo *ch = data;
350
351 ch->blksz = blocksize;
352 ch->bufsz = ch->blksz * 2;
353 sndbuf_resize(ch->buffer, 2, ch->blksz);
354
355 return ch->blksz;
356}
357
358static int
359eschan_trigger(kobj_t obj, void *data, int go)
360{
361 struct es_chinfo *ch = data;
362 struct es_info *es = ch->parent;
363 unsigned cnt;
364
365 if (go == PCMTRIG_EMLDMAWR || go == PCMTRIG_EMLDMARD)
366 return 0;
367
368 cnt = (ch->blksz / sndbuf_getbps(ch->buffer)) - 1;
369
370 if (ch->dir == PCMDIR_PLAY) {
371 if (go == PCMTRIG_START) {
372 int b = (ch->fmt & AFMT_S16_LE)? 2 : 1;
373 es->ctrl |= CTRL_DAC2_EN;
374 es->sctrl &= ~(SCTRL_P2ENDINC | SCTRL_P2STINC | SCTRL_P2LOOPSEL | SCTRL_P2PAUSE | SCTRL_P2DACSEN);
375 es->sctrl |= SCTRL_P2INTEN | (b << SCTRL_SH_P2ENDINC);
376 bus_space_write_4(es->st, es->sh, ES1370_REG_DAC2_SCOUNT, cnt);
377 /* start at beginning of buffer */
378 bus_space_write_4(es->st, es->sh, ES1370_REG_MEMPAGE, ES1370_REG_DAC2_FRAMECNT >> 8);
379 bus_space_write_4(es->st, es->sh, ES1370_REG_DAC2_FRAMECNT & 0xff, (ch->bufsz >> 2) - 1);
380 } else es->ctrl &= ~CTRL_DAC2_EN;
381 } else {
382 if (go == PCMTRIG_START) {
383 es->ctrl |= CTRL_ADC_EN;
384 es->sctrl &= ~SCTRL_R1LOOPSEL;
385 es->sctrl |= SCTRL_R1INTEN;
386 bus_space_write_4(es->st, es->sh, ES1370_REG_ADC_SCOUNT, cnt);
387 /* start at beginning of buffer */
388 bus_space_write_4(es->st, es->sh, ES1370_REG_MEMPAGE, ES1370_REG_ADC_FRAMECNT >> 8);
389 bus_space_write_4(es->st, es->sh, ES1370_REG_ADC_FRAMECNT & 0xff, (ch->bufsz >> 2) - 1);
390 } else es->ctrl &= ~CTRL_ADC_EN;
391 }
392 bus_space_write_4(es->st, es->sh, ES1370_REG_SERIAL_CONTROL, es->sctrl);
393 bus_space_write_4(es->st, es->sh, ES1370_REG_CONTROL, es->ctrl);
394 return 0;
395}
396
397static int
398eschan_getptr(kobj_t obj, void *data)
399{
400 struct es_chinfo *ch = data;
401 struct es_info *es = ch->parent;
402 u_int32_t reg, cnt;
403
404 if (ch->dir == PCMDIR_PLAY)
405 reg = ES1370_REG_DAC2_FRAMECNT;
406 else
407 reg = ES1370_REG_ADC_FRAMECNT;
408
409 bus_space_write_4(es->st, es->sh, ES1370_REG_MEMPAGE, reg >> 8);
410 cnt = bus_space_read_4(es->st, es->sh, reg & 0x000000ff) >> 16;
411 /* cnt is longwords */
412 return cnt << 2;
413}
414
415static struct pcmchan_caps *
416eschan_getcaps(kobj_t obj, void *data)
417{
418 struct es_chinfo *ch = data;
419 return (ch->dir == PCMDIR_PLAY)? &es_playcaps : &es_reccaps;
420}
421
422static kobj_method_t eschan1370_methods[] = {
423 KOBJMETHOD(channel_init, eschan_init),
424 KOBJMETHOD(channel_setdir, eschan_setdir),
425 KOBJMETHOD(channel_setformat, eschan_setformat),
426 KOBJMETHOD(channel_setspeed, eschan1370_setspeed),
427 KOBJMETHOD(channel_setblocksize, eschan_setblocksize),
428 KOBJMETHOD(channel_trigger, eschan_trigger),
429 KOBJMETHOD(channel_getptr, eschan_getptr),
430 KOBJMETHOD(channel_getcaps, eschan_getcaps),
431 { 0, 0 }
432};
433CHANNEL_DECLARE(eschan1370);
434
435static kobj_method_t eschan1371_methods[] = {
436 KOBJMETHOD(channel_init, eschan_init),
437 KOBJMETHOD(channel_setdir, eschan_setdir),
438 KOBJMETHOD(channel_setformat, eschan_setformat),
439 KOBJMETHOD(channel_setspeed, eschan1371_setspeed),
440 KOBJMETHOD(channel_setblocksize, eschan_setblocksize),
441 KOBJMETHOD(channel_trigger, eschan_trigger),
442 KOBJMETHOD(channel_getptr, eschan_getptr),
443 KOBJMETHOD(channel_getcaps, eschan_getcaps),
444 { 0, 0 }
445};
446CHANNEL_DECLARE(eschan1371);
447
448/* -------------------------------------------------------------------- */
449/* The interrupt handler */
450static void
451es_intr(void *p)
452{
453 struct es_info *es = p;
454 unsigned intsrc, sctrl;
455
456 intsrc = bus_space_read_4(es->st, es->sh, ES1370_REG_STATUS);
457 if ((intsrc & STAT_INTR) == 0) return;
458
459 sctrl = es->sctrl;
460 if (intsrc & STAT_ADC) sctrl &= ~SCTRL_R1INTEN;
461 if (intsrc & STAT_DAC1) sctrl &= ~SCTRL_P1INTEN;
462 if (intsrc & STAT_DAC2) sctrl &= ~SCTRL_P2INTEN;
463
464 bus_space_write_4(es->st, es->sh, ES1370_REG_SERIAL_CONTROL, sctrl);
465 bus_space_write_4(es->st, es->sh, ES1370_REG_SERIAL_CONTROL, es->sctrl);
466
467 if (intsrc & STAT_ADC) chn_intr(es->rch.channel);
468 if (intsrc & STAT_DAC1);
469 if (intsrc & STAT_DAC2) chn_intr(es->pch.channel);
470}
471
472/* ES1370 specific */
473static int
474es1370_init(struct es_info *es)
475{
476 es->ctrl = CTRL_CDC_EN | CTRL_SERR_DIS |
477 (DAC2_SRTODIV(DSP_DEFAULT_SPEED) << CTRL_SH_PCLKDIV);
478 bus_space_write_4(es->st, es->sh, ES1370_REG_CONTROL, es->ctrl);
479
480 es->sctrl = 0;
481 bus_space_write_4(es->st, es->sh, ES1370_REG_SERIAL_CONTROL, es->sctrl);
482
483 es1370_wrcodec(es, CODEC_RES_PD, 3);/* No RST, PD */
484 es1370_wrcodec(es, CODEC_CSEL, 0); /* CODEC ADC and CODEC DAC use
485 * {LR,B}CLK2 and run off the LRCLK2
486 * PLL; program DAC_SYNC=0! */
487 es1370_wrcodec(es, CODEC_ADSEL, 0);/* Recording source is mixer */
488 es1370_wrcodec(es, CODEC_MGAIN, 0);/* MIC amp is 0db */
489
490 return 0;
491}
492
493/* ES1371 specific */
494int
495es1371_init(struct es_info *es, device_t dev)
496{
497 int idx;
498 int devid = pci_get_devid(dev);
499 int revid = pci_get_revid(dev);
500
501 if (debug > 0) printf("es_init\n");
502
503 es->num = 0;
504 es->ctrl = 0;
505 es->sctrl = 0;
506 /* initialize the chips */
507 if ((devid == ES1371_PCI_ID && revid == ES1371REV_ES1373_8) ||
508 (devid == ES1371_PCI_ID && revid == ES1371REV_CT5880_A) ||
509 (devid == CT5880_PCI_ID && revid == CT5880REV_CT5880_C) ||
510 (devid == CT5880_PCI_ID && revid == CT5880REV_CT5880_D) ||
511 (devid == CT5880_PCI_ID && revid == CT5880REV_CT5880_E) ||
512 (devid == CT4730_PCI_ID)) {
513 bus_space_write_4(es->st, es->sh, ES1370_REG_STATUS, 0x20000000);
514 DELAY(20000);
515 if (debug > 0) device_printf(dev, "ac97 2.1 enabled\n");
516 } else { /* pre ac97 2.1 card */
517 bus_space_write_4(es->st, es->sh, ES1370_REG_CONTROL, es->ctrl);
518 if (debug > 0) device_printf(dev, "ac97 pre-2.1 enabled\n");
519 }
520 bus_space_write_4(es->st, es->sh, ES1370_REG_SERIAL_CONTROL, es->sctrl);
521 bus_space_write_4(es->st, es->sh, ES1371_REG_LEGACY, 0);
522 /* AC'97 warm reset to start the bitclk */
523 bus_space_write_4(es->st, es->sh, ES1371_REG_LEGACY, es->ctrl | ES1371_SYNC_RES);
524 DELAY(2000);
525 bus_space_write_4(es->st, es->sh, ES1370_REG_SERIAL_CONTROL, es->ctrl);
526 /* Init the sample rate converter */
527 bus_space_write_4(es->st, es->sh, ES1371_REG_SMPRATE, ES1371_DIS_SRC);
528 for (idx = 0; idx < 0x80; idx++)
529 es1371_src_write(es, idx, 0);
530 es1371_src_write(es, ES_SMPREG_DAC1 + ES_SMPREG_TRUNC_N, 16 << 4);
531 es1371_src_write(es, ES_SMPREG_DAC1 + ES_SMPREG_INT_REGS, 16 << 10);
532 es1371_src_write(es, ES_SMPREG_DAC2 + ES_SMPREG_TRUNC_N, 16 << 4);
533 es1371_src_write(es, ES_SMPREG_DAC2 + ES_SMPREG_INT_REGS, 16 << 10);
534 es1371_src_write(es, ES_SMPREG_VOL_ADC, 1 << 12);
535 es1371_src_write(es, ES_SMPREG_VOL_ADC + 1, 1 << 12);
536 es1371_src_write(es, ES_SMPREG_VOL_DAC1, 1 << 12);
537 es1371_src_write(es, ES_SMPREG_VOL_DAC1 + 1, 1 << 12);
538 es1371_src_write(es, ES_SMPREG_VOL_DAC2, 1 << 12);
539 es1371_src_write(es, ES_SMPREG_VOL_DAC2 + 1, 1 << 12);
540 es1371_adc_rate (es, 22050, 1);
541 es1371_dac_rate (es, 22050, 1);
542 es1371_dac_rate (es, 22050, 2);
543 /* WARNING:
544 * enabling the sample rate converter without properly programming
545 * its parameters causes the chip to lock up (the SRC busy bit will
546 * be stuck high, and I've found no way to rectify this other than
547 * power cycle)
548 */
549 bus_space_write_4(es->st, es->sh, ES1371_REG_SMPRATE, 0);
550
551 return (0);
552}
553
554/* -------------------------------------------------------------------- */
555
556static int
557es1371_wrcd(kobj_t obj, void *s, int addr, u_int32_t data)
558{
559 int sl;
560 unsigned t, x;
561 struct es_info *es = (struct es_info*)s;
562
563 if (debug > 0) printf("wrcodec addr 0x%x data 0x%x\n", addr, data);
564
565 for (t = 0; t < 0x1000; t++)
566 if (!(bus_space_read_4(es->st, es->sh,(ES1371_REG_CODEC & CODEC_WIP))))
567 break;
568 sl = spltty();
569 /* save the current state for later */
570 x = bus_space_read_4(es->st, es->sh, ES1371_REG_SMPRATE);
571 /* enable SRC state data in SRC mux */
572 bus_space_write_4(es->st, es->sh, ES1371_REG_SMPRATE,
573 (es1371_wait_src_ready(s) &
574 (ES1371_DIS_SRC | ES1371_DIS_P1 | ES1371_DIS_P2 | ES1371_DIS_R1)));
575 /* wait for a SAFE time to write addr/data and then do it, dammit */
576 for (t = 0; t < 0x1000; t++)
577 if ((bus_space_read_4(es->st, es->sh, ES1371_REG_SMPRATE) & 0x00070000) == 0x00010000)
578 break;
579
580 if (debug > 2)
581 printf("one b_s_w: 0x%lx 0x%x 0x%x\n",
582 rman_get_start(es->reg), ES1371_REG_CODEC,
583 ((addr << CODEC_POADD_SHIFT) & CODEC_POADD_MASK) |
584 ((data << CODEC_PODAT_SHIFT) & CODEC_PODAT_MASK));
585
586 bus_space_write_4(es->st, es->sh,ES1371_REG_CODEC,
587 ((addr << CODEC_POADD_SHIFT) & CODEC_POADD_MASK) |
588 ((data << CODEC_PODAT_SHIFT) & CODEC_PODAT_MASK));
589 /* restore SRC reg */
590 es1371_wait_src_ready(s);
591 if (debug > 2)
592 printf("two b_s_w: 0x%lx 0x%x 0x%x\n",
593 rman_get_start(es->reg), ES1371_REG_SMPRATE, x);
594 bus_space_write_4(es->st, es->sh, ES1371_REG_SMPRATE, x);
595 splx(sl);
596
597 return 0;
598}
599
600static int
601es1371_rdcd(kobj_t obj, void *s, int addr)
602{
603 int sl;
604 unsigned t, x = 0;
605 struct es_info *es = (struct es_info *)s;
606
607 if (debug > 0) printf("rdcodec addr 0x%x ... ", addr);
608
609 for (t = 0; t < 0x1000; t++)
610 if (!(x = bus_space_read_4(es->st, es->sh, ES1371_REG_CODEC) & CODEC_WIP))
611 break;
612 if (debug > 0) printf("loop 1 t 0x%x x 0x%x ", t, x);
613
614 sl = spltty();
615
616 /* save the current state for later */
617 x = bus_space_read_4(es->st, es->sh, ES1371_REG_SMPRATE);
618 /* enable SRC state data in SRC mux */
619 bus_space_write_4(es->st, es->sh, ES1371_REG_SMPRATE,
620 (es1371_wait_src_ready(s) &
621 (ES1371_DIS_SRC | ES1371_DIS_P1 | ES1371_DIS_P2 | ES1371_DIS_R1)));
622 /* wait for a SAFE time to write addr/data and then do it, dammit */
623 for (t = 0; t < 0x5000; t++)
624 if ((x = bus_space_read_4(es->st, es->sh, ES1371_REG_SMPRATE) & 0x00070000) == 0x00010000)
625 break;
626 if (debug > 0) printf("loop 2 t 0x%x x 0x%x ", t, x);
627 bus_space_write_4(es->st, es->sh, ES1371_REG_CODEC,
628 ((addr << CODEC_POADD_SHIFT) & CODEC_POADD_MASK) | CODEC_PORD);
629
630 /* restore SRC reg */
631 es1371_wait_src_ready(s);
632 bus_space_write_4(es->st, es->sh, ES1371_REG_SMPRATE, x);
633
634 splx(sl);
635
636 /* now wait for the stinkin' data (RDY) */
637 for (t = 0; t < 0x1000; t++)
638 if ((x = bus_space_read_4(es->st, es->sh, ES1371_REG_CODEC)) & CODEC_RDY)
639 break;
640 if (debug > 0) printf("loop 3 t 0x%x 0x%x ret 0x%x\n", t, x, ((x & CODEC_PIDAT_MASK) >> CODEC_PIDAT_SHIFT));
641 return ((x & CODEC_PIDAT_MASK) >> CODEC_PIDAT_SHIFT);
642}
643
644static kobj_method_t es1371_ac97_methods[] = {
645 KOBJMETHOD(ac97_read, es1371_rdcd),
646 KOBJMETHOD(ac97_write, es1371_wrcd),
647 { 0, 0 }
648};
649AC97_DECLARE(es1371_ac97);
650
651/* -------------------------------------------------------------------- */
652
653static u_int
654es1371_src_read(struct es_info *es, u_short reg)
655{
656 unsigned int r;
657
658 r = es1371_wait_src_ready(es) &
659 (ES1371_DIS_SRC | ES1371_DIS_P1 | ES1371_DIS_P2 | ES1371_DIS_R1);
660 r |= ES1371_SRC_RAM_ADDRO(reg);
661 bus_space_write_4(es->st, es->sh, ES1371_REG_SMPRATE,r);
662 return ES1371_SRC_RAM_DATAI(es1371_wait_src_ready(es));
663}
664
665static void
666es1371_src_write(struct es_info *es, u_short reg, u_short data){
667 u_int r;
668
669 r = es1371_wait_src_ready(es) &
670 (ES1371_DIS_SRC | ES1371_DIS_P1 | ES1371_DIS_P2 | ES1371_DIS_R1);
671 r |= ES1371_SRC_RAM_ADDRO(reg) | ES1371_SRC_RAM_DATAO(data);
672 /* printf("es1371_src_write 0x%x 0x%x\n",ES1371_REG_SMPRATE,r | ES1371_SRC_RAM_WE); */
673 bus_space_write_4(es->st, es->sh, ES1371_REG_SMPRATE, r | ES1371_SRC_RAM_WE);
674}
675
676static u_int
677es1371_adc_rate(struct es_info *es, u_int rate, int set)
678{
679 u_int n, truncm, freq, result;
680
681 if (rate > 48000) rate = 48000;
682 if (rate < 4000) rate = 4000;
683 n = rate / 3000;
684 if ((1 << n) & ((1 << 15) | (1 << 13) | (1 << 11) | (1 << 9)))
685 n--;
686 truncm = (21 * n - 1) | 1;
687 freq = ((48000UL << 15) / rate) * n;
688 result = (48000UL << 15) / (freq / n);
689 if (set) {
690 if (rate >= 24000) {
691 if (truncm > 239) truncm = 239;
692 es1371_src_write(es, ES_SMPREG_ADC + ES_SMPREG_TRUNC_N,
693 (((239 - truncm) >> 1) << 9) | (n << 4));
694 } else {
695 if (truncm > 119) truncm = 119;
696 es1371_src_write(es, ES_SMPREG_ADC + ES_SMPREG_TRUNC_N,
697 0x8000 | (((119 - truncm) >> 1) << 9) | (n << 4));
698 }
699 es1371_src_write(es, ES_SMPREG_ADC + ES_SMPREG_INT_REGS,
700 (es1371_src_read(es, ES_SMPREG_ADC + ES_SMPREG_INT_REGS) &
701 0x00ff) | ((freq >> 5) & 0xfc00));
702 es1371_src_write(es, ES_SMPREG_ADC + ES_SMPREG_VFREQ_FRAC, freq & 0x7fff);
703 es1371_src_write(es, ES_SMPREG_VOL_ADC, n << 8);
704 es1371_src_write(es, ES_SMPREG_VOL_ADC + 1, n << 8);
705 }
706 return result;
707}
708
709static u_int
710es1371_dac_rate(struct es_info *es, u_int rate, int set)
711{
712 u_int freq, r, result, dac, dis;
713
714 if (rate > 48000) rate = 48000;
715 if (rate < 4000) rate = 4000;
716 freq = (rate << 15) / 3000;
717 result = (freq * 3000) >> 15;
718 if (set) {
719 dac = (set == 1)? ES_SMPREG_DAC1 : ES_SMPREG_DAC2;
720 dis = (set == 1)? ES1371_DIS_P2 : ES1371_DIS_P1;
721
722 r = (es1371_wait_src_ready(es) & (ES1371_DIS_SRC | ES1371_DIS_P1 | ES1371_DIS_P2 | ES1371_DIS_R1));
723 bus_space_write_4(es->st, es->sh, ES1371_REG_SMPRATE, r);
724 es1371_src_write(es, dac + ES_SMPREG_INT_REGS,
725 (es1371_src_read(es, dac + ES_SMPREG_INT_REGS) & 0x00ff) | ((freq >> 5) & 0xfc00));
726 es1371_src_write(es, dac + ES_SMPREG_VFREQ_FRAC, freq & 0x7fff);
727 r = (es1371_wait_src_ready(es) & (ES1371_DIS_SRC | dis | ES1371_DIS_R1));
728 bus_space_write_4(es->st, es->sh, ES1371_REG_SMPRATE, r);
729 }
730 return result;
731}
732
733static u_int
734es1371_wait_src_ready(struct es_info *es)
735{
736 u_int t, r;
737
738 for (t = 0; t < 500; t++) {
739 if (!((r = bus_space_read_4(es->st, es->sh, ES1371_REG_SMPRATE)) & ES1371_SRC_RAM_BUSY))
740 return r;
741 DELAY(1000);
742 }
743 printf("es1371: wait src ready timeout 0x%x [0x%x]\n", ES1371_REG_SMPRATE, r);
744 return 0;
745}
746
747/* -------------------------------------------------------------------- */
748
749/*
750 * Probe and attach the card
751 */
752
753static int
754es_pci_probe(device_t dev)
755{
756 switch(pci_get_devid(dev)) {
757 case ES1370_PCI_ID:
758 device_set_desc(dev, "AudioPCI ES1370");
759 return 0;
760
761 case ES1371_PCI_ID:
762 switch(pci_get_revid(dev)) {
763 case ES1371REV_ES1371_A:
764 device_set_desc(dev, "AudioPCI ES1371-A");
765 return 0;
766
767 case ES1371REV_ES1371_B:
768 device_set_desc(dev, "AudioPCI ES1371-B");
769 return 0;
770
771 case ES1371REV_ES1373_A:
772 device_set_desc(dev, "AudioPCI ES1373-A");
773 return 0;
774
775 case ES1371REV_ES1373_B:
776 device_set_desc(dev, "AudioPCI ES1373-B");
777 return 0;
778
779 case ES1371REV_ES1373_8:
780 device_set_desc(dev, "AudioPCI ES1373-8");
781 return 0;
782
783 case ES1371REV_CT5880_A:
784 device_set_desc(dev, "Creative CT5880-A");
785 return 0;
786
787 default:
788 device_set_desc(dev, "AudioPCI ES1371-?");
789 device_printf(dev, "unknown revision %d -- please report to cg@freebsd.org\n", pci_get_revid(dev));
790 return 0;
791 }
792
793 case ES1371_PCI_ID2:
794 device_set_desc(dev, "Strange AudioPCI ES1371-? (vid=3274)");
795 device_printf(dev, "unknown revision %d -- please report to cg@freebsd.org\n", pci_get_revid(dev));
796 return 0;
797
798 case CT4730_PCI_ID:
799 switch(pci_get_revid(dev)) {
800 case CT4730REV_CT4730_A:
801 device_set_desc(dev, "Creative SB AudioPCI CT4730");
802 return 0;
803 default:
804 device_set_desc(dev, "Creative SB AudioPCI CT4730-?");
805 device_printf(dev, "unknown revision %d -- please report to cg@freebsd.org\n", pci_get_revid(dev));
806 return 0;
807 }
808
809 case CT5880_PCI_ID:
810 switch(pci_get_revid(dev)) {
811 case CT5880REV_CT5880_C:
812 device_set_desc(dev, "Creative CT5880-C");
813 return 0;
814
815 case CT5880REV_CT5880_D:
816 device_set_desc(dev, "Creative CT5880-D");
817 return 0;
818
819 case CT5880REV_CT5880_E:
820 device_set_desc(dev, "Creative CT5880-E");
821 return 0;
822
823 default:
824 device_set_desc(dev, "Creative CT5880-?");
825 device_printf(dev, "unknown revision %d -- please report to cg@freebsd.org\n", pci_get_revid(dev));
826 return 0;
827 }
828
829 default:
830 return ENXIO;
831 }
832}
833
834static int
835es_pci_attach(device_t dev)
836{
837 u_int32_t data;
838 struct es_info *es = 0;
839 int mapped;
840 char status[SND_STATUSLEN];
841 struct ac97_info *codec = 0;
842 kobj_class_t ct = NULL;
843
844 if ((es = malloc(sizeof *es, M_DEVBUF, M_NOWAIT | M_ZERO)) == NULL) {
845 device_printf(dev, "cannot allocate softc\n");
846 return ENXIO;
847 }
848
849 es->dev = dev;
850 mapped = 0;
851 data = pci_read_config(dev, PCIR_COMMAND, 2);
852 data |= (PCIM_CMD_PORTEN|PCIM_CMD_MEMEN|PCIM_CMD_BUSMASTEREN);
853 pci_write_config(dev, PCIR_COMMAND, data, 2);
854 data = pci_read_config(dev, PCIR_COMMAND, 2);
855 if (mapped == 0 && (data & PCIM_CMD_MEMEN)) {
856 es->regid = MEM_MAP_REG;
857 es->regtype = SYS_RES_MEMORY;
858 es->reg = bus_alloc_resource(dev, es->regtype, &es->regid,
859 0, ~0, 1, RF_ACTIVE);
860 if (es->reg) {
861 es->st = rman_get_bustag(es->reg);
862 es->sh = rman_get_bushandle(es->reg);
863 mapped++;
864 }
865 }
866 if (mapped == 0 && (data & PCIM_CMD_PORTEN)) {
867 es->regid = PCIR_BAR(0);
868 es->regtype = SYS_RES_IOPORT;
869 es->reg = bus_alloc_resource(dev, es->regtype, &es->regid,
870 0, ~0, 1, RF_ACTIVE);
871 if (es->reg) {
872 es->st = rman_get_bustag(es->reg);
873 es->sh = rman_get_bushandle(es->reg);
874 mapped++;
875 }
876 }
877 if (mapped == 0) {
878 device_printf(dev, "unable to map register space\n");
879 goto bad;
880 }
881
882 es->bufsz = pcm_getbuffersize(dev, 4096, ES_DEFAULT_BUFSZ, 65536);
883
884 if (pci_get_devid(dev) == ES1371_PCI_ID ||
885 pci_get_devid(dev) == ES1371_PCI_ID2 ||
886 pci_get_devid(dev) == CT5880_PCI_ID ||
887 pci_get_devid(dev) == CT4730_PCI_ID) {
888 if(-1 == es1371_init(es, dev)) {
889 device_printf(dev, "unable to initialize the card\n");
890 goto bad;
891 }
892 codec = AC97_CREATE(dev, es, es1371_ac97);
893 if (codec == NULL) goto bad;
894 /* our init routine does everything for us */
895 /* set to NULL; flag mixer_init not to run the ac97_init */
896 /* ac97_mixer.init = NULL; */
897 if (mixer_init(dev, ac97_getmixerclass(), codec)) goto bad;
898 ct = &eschan1371_class;
899 } else if (pci_get_devid(dev) == ES1370_PCI_ID) {
900 if (-1 == es1370_init(es)) {
901 device_printf(dev, "unable to initialize the card\n");
902 goto bad;
903 }
904 if (mixer_init(dev, &es1370_mixer_class, es)) goto bad;
905 ct = &eschan1370_class;
906 } else goto bad;
907
908 es->irqid = 0;
909 es->irq = bus_alloc_resource(dev, SYS_RES_IRQ, &es->irqid,
910 0, ~0, 1, RF_ACTIVE | RF_SHAREABLE);
911 if (!es->irq || snd_setup_intr(dev, es->irq, 0, es_intr, es, &es->ih)) {
912 device_printf(dev, "unable to map interrupt\n");
913 goto bad;
914 }
915
916 if (bus_dma_tag_create(/*parent*/NULL, /*alignment*/2, /*boundary*/0,
917 /*lowaddr*/BUS_SPACE_MAXADDR_32BIT,
918 /*highaddr*/BUS_SPACE_MAXADDR,
919 /*filter*/NULL, /*filterarg*/NULL,
920 /*maxsize*/es->bufsz, /*nsegments*/1, /*maxsegz*/0x3ffff,
921 /*flags*/0, /*lockfunc*/busdma_lock_mutex,
922 /*lockarg*/&Giant, &es->parent_dmat) != 0) {
923 device_printf(dev, "unable to create dma tag\n");
924 goto bad;
925 }
926
927 snprintf(status, SND_STATUSLEN, "at %s 0x%lx irq %ld",
928 (es->regtype == SYS_RES_IOPORT)? "io" : "memory",
929 rman_get_start(es->reg), rman_get_start(es->irq));
930
931 if (pcm_register(dev, es, 1, 1)) goto bad;
932 pcm_addchan(dev, PCMDIR_REC, ct, es);
933 pcm_addchan(dev, PCMDIR_PLAY, ct, es);
934 pcm_setstatus(dev, status);
935
936 return 0;
937
938 bad:
939 if (codec) ac97_destroy(codec);
940 if (es->reg) bus_release_resource(dev, es->regtype, es->regid, es->reg);
941 if (es->ih) bus_teardown_intr(dev, es->irq, es->ih);
942 if (es->irq) bus_release_resource(dev, SYS_RES_IRQ, es->irqid, es->irq);
943 if (es->parent_dmat) bus_dma_tag_destroy(es->parent_dmat);
944 if (es) free(es, M_DEVBUF);
945 return ENXIO;
946}
947
948static int
949es_pci_detach(device_t dev)
950{
951 int r;
952 struct es_info *es;
953
954 r = pcm_unregister(dev);
955 if (r)
956 return r;
957
958 es = pcm_getdevinfo(dev);
959 bus_release_resource(dev, es->regtype, es->regid, es->reg);
960 bus_teardown_intr(dev, es->irq, es->ih);
961 bus_release_resource(dev, SYS_RES_IRQ, es->irqid, es->irq);
962 bus_dma_tag_destroy(es->parent_dmat);
963 free(es, M_DEVBUF);
964
965 return 0;
966}
967
968static device_method_t es_methods[] = {
969 /* Device interface */
970 DEVMETHOD(device_probe, es_pci_probe),
971 DEVMETHOD(device_attach, es_pci_attach),
972 DEVMETHOD(device_detach, es_pci_detach),
973
974 { 0, 0 }
975};
976
977static driver_t es_driver = {
978 "pcm",
979 es_methods,
980 PCM_SOFTC_SIZE,
981};
982
983DRIVER_MODULE(snd_es137x, pci, es_driver, pcm_devclass, 0, 0);
984MODULE_DEPEND(snd_es137x, snd_pcm, PCM_MINVER, PCM_PREFVER, PCM_MAXVER);
985MODULE_VERSION(snd_es137x, 1);
| 63
64static int debug = 0;
65SYSCTL_INT(_debug, OID_AUTO, es_debug, CTLFLAG_RW, &debug, 0, "");
66
67#define MEM_MAP_REG 0x14
68
69/* PCI IDs of supported chips */
70#define ES1370_PCI_ID 0x50001274
71#define ES1371_PCI_ID 0x13711274
72#define ES1371_PCI_ID2 0x13713274
73#define CT5880_PCI_ID 0x58801274
74#define CT4730_PCI_ID 0x89381102
75
76#define ES1371REV_ES1371_A 0x02
77#define ES1371REV_ES1371_B 0x09
78
79#define ES1371REV_ES1373_8 0x08
80#define ES1371REV_ES1373_A 0x04
81#define ES1371REV_ES1373_B 0x06
82
83#define ES1371REV_CT5880_A 0x07
84
85#define CT5880REV_CT5880_C 0x02
86#define CT5880REV_CT5880_D 0x03
87#define CT5880REV_CT5880_E 0x04
88
89#define CT4730REV_CT4730_A 0x00
90
91#define ES_DEFAULT_BUFSZ 4096
92
93/* device private data */
94struct es_info;
95
96struct es_chinfo {
97 struct es_info *parent;
98 struct pcm_channel *channel;
99 struct snd_dbuf *buffer;
100 int dir, num;
101 u_int32_t fmt, blksz, bufsz;
102};
103
104struct es_info {
105 bus_space_tag_t st;
106 bus_space_handle_t sh;
107 bus_dma_tag_t parent_dmat;
108
109 struct resource *reg, *irq;
110 int regtype, regid, irqid;
111 void *ih;
112
113 device_t dev;
114 int num;
115 unsigned int bufsz;
116
117 /* Contents of board's registers */
118 u_long ctrl;
119 u_long sctrl;
120 struct es_chinfo pch, rch;
121};
122
123/* -------------------------------------------------------------------- */
124
125/* prototypes */
126static void es_intr(void *);
127
128static u_int es1371_wait_src_ready(struct es_info *);
129static void es1371_src_write(struct es_info *, u_short, unsigned short);
130static u_int es1371_adc_rate(struct es_info *, u_int, int);
131static u_int es1371_dac_rate(struct es_info *, u_int, int);
132static int es1371_init(struct es_info *, device_t);
133static int es1370_init(struct es_info *);
134static int es1370_wrcodec(struct es_info *, u_char, u_char);
135
136static u_int32_t es_playfmt[] = {
137 AFMT_U8,
138 AFMT_STEREO | AFMT_U8,
139 AFMT_S16_LE,
140 AFMT_STEREO | AFMT_S16_LE,
141 0
142};
143static struct pcmchan_caps es_playcaps = {4000, 48000, es_playfmt, 0};
144
145static u_int32_t es_recfmt[] = {
146 AFMT_U8,
147 AFMT_STEREO | AFMT_U8,
148 AFMT_S16_LE,
149 AFMT_STEREO | AFMT_S16_LE,
150 0
151};
152static struct pcmchan_caps es_reccaps = {4000, 48000, es_recfmt, 0};
153
154static const struct {
155 unsigned volidx:4;
156 unsigned left:4;
157 unsigned right:4;
158 unsigned stereo:1;
159 unsigned recmask:13;
160 unsigned avail:1;
161} mixtable[SOUND_MIXER_NRDEVICES] = {
162 [SOUND_MIXER_VOLUME] = { 0, 0x0, 0x1, 1, 0x0000, 1 },
163 [SOUND_MIXER_PCM] = { 1, 0x2, 0x3, 1, 0x0400, 1 },
164 [SOUND_MIXER_SYNTH] = { 2, 0x4, 0x5, 1, 0x0060, 1 },
165 [SOUND_MIXER_CD] = { 3, 0x6, 0x7, 1, 0x0006, 1 },
166 [SOUND_MIXER_LINE] = { 4, 0x8, 0x9, 1, 0x0018, 1 },
167 [SOUND_MIXER_LINE1] = { 5, 0xa, 0xb, 1, 0x1800, 1 },
168 [SOUND_MIXER_LINE2] = { 6, 0xc, 0x0, 0, 0x0100, 1 },
169 [SOUND_MIXER_LINE3] = { 7, 0xd, 0x0, 0, 0x0200, 1 },
170 [SOUND_MIXER_MIC] = { 8, 0xe, 0x0, 0, 0x0001, 1 },
171 [SOUND_MIXER_OGAIN] = { 9, 0xf, 0x0, 0, 0x0000, 1 }
172};
173
174/* -------------------------------------------------------------------- */
175/* The es1370 mixer interface */
176
177static int
178es1370_mixinit(struct snd_mixer *m)
179{
180 int i;
181 u_int32_t v;
182
183 v = 0;
184 for (i = 0; i < SOUND_MIXER_NRDEVICES; i++)
185 if (mixtable[i].avail) v |= (1 << i);
186 mix_setdevs(m, v);
187 v = 0;
188 for (i = 0; i < SOUND_MIXER_NRDEVICES; i++)
189 if (mixtable[i].recmask) v |= (1 << i);
190 mix_setrecdevs(m, v);
191 return 0;
192}
193
194static int
195es1370_mixset(struct snd_mixer *m, unsigned dev, unsigned left, unsigned right)
196{
197 int l, r, rl, rr;
198
199 if (!mixtable[dev].avail) return -1;
200 l = left;
201 r = mixtable[dev].stereo? right : l;
202 if (mixtable[dev].left == 0xf) {
203 rl = (l < 2)? 0x80 : 7 - (l - 2) / 14;
204 } else {
205 rl = (l < 10)? 0x80 : 15 - (l - 10) / 6;
206 }
207 if (mixtable[dev].stereo) {
208 rr = (r < 10)? 0x80 : 15 - (r - 10) / 6;
209 es1370_wrcodec(mix_getdevinfo(m), mixtable[dev].right, rr);
210 }
211 es1370_wrcodec(mix_getdevinfo(m), mixtable[dev].left, rl);
212 return l | (r << 8);
213}
214
215static int
216es1370_mixsetrecsrc(struct snd_mixer *m, u_int32_t src)
217{
218 int i, j = 0;
219
220 if (src == 0) src = 1 << SOUND_MIXER_MIC;
221 src &= mix_getrecdevs(m);
222 for (i = 0; i < SOUND_MIXER_NRDEVICES; i++)
223 if ((src & (1 << i)) != 0) j |= mixtable[i].recmask;
224
225 es1370_wrcodec(mix_getdevinfo(m), CODEC_LIMIX1, j & 0x55);
226 es1370_wrcodec(mix_getdevinfo(m), CODEC_RIMIX1, j & 0xaa);
227 es1370_wrcodec(mix_getdevinfo(m), CODEC_LIMIX2, (j >> 8) & 0x17);
228 es1370_wrcodec(mix_getdevinfo(m), CODEC_RIMIX2, (j >> 8) & 0x0f);
229 es1370_wrcodec(mix_getdevinfo(m), CODEC_OMIX1, 0x7f);
230 es1370_wrcodec(mix_getdevinfo(m), CODEC_OMIX2, 0x3f);
231 return src;
232}
233
234static kobj_method_t es1370_mixer_methods[] = {
235 KOBJMETHOD(mixer_init, es1370_mixinit),
236 KOBJMETHOD(mixer_set, es1370_mixset),
237 KOBJMETHOD(mixer_setrecsrc, es1370_mixsetrecsrc),
238 { 0, 0 }
239};
240MIXER_DECLARE(es1370_mixer);
241
242/* -------------------------------------------------------------------- */
243
244static int
245es1370_wrcodec(struct es_info *es, u_char i, u_char data)
246{
247 int wait = 100; /* 100 msec timeout */
248
249 do {
250 if ((bus_space_read_4(es->st, es->sh, ES1370_REG_STATUS) &
251 STAT_CSTAT) == 0) {
252 bus_space_write_2(es->st, es->sh, ES1370_REG_CODEC,
253 ((u_short)i << CODEC_INDEX_SHIFT) | data);
254 return 0;
255 }
256 DELAY(1000);
257 } while (--wait);
258 printf("pcm: es1370_wrcodec timed out\n");
259 return -1;
260}
261
262/* -------------------------------------------------------------------- */
263
264/* channel interface */
265static void *
266eschan_init(kobj_t obj, void *devinfo, struct snd_dbuf *b, struct pcm_channel *c, int dir)
267{
268 struct es_info *es = devinfo;
269 struct es_chinfo *ch = (dir == PCMDIR_PLAY)? &es->pch : &es->rch;
270
271 ch->parent = es;
272 ch->channel = c;
273 ch->buffer = b;
274 ch->bufsz = es->bufsz;
275 ch->blksz = ch->bufsz / 2;
276 ch->num = ch->parent->num++;
277 if (sndbuf_alloc(ch->buffer, es->parent_dmat, ch->bufsz) == -1) return NULL;
278 return ch;
279}
280
281static int
282eschan_setdir(kobj_t obj, void *data, int dir)
283{
284 struct es_chinfo *ch = data;
285 struct es_info *es = ch->parent;
286
287 if (dir == PCMDIR_PLAY) {
288 bus_space_write_1(es->st, es->sh, ES1370_REG_MEMPAGE, ES1370_REG_DAC2_FRAMEADR >> 8);
289 bus_space_write_4(es->st, es->sh, ES1370_REG_DAC2_FRAMEADR & 0xff, sndbuf_getbufaddr(ch->buffer));
290 bus_space_write_4(es->st, es->sh, ES1370_REG_DAC2_FRAMECNT & 0xff, (ch->bufsz >> 2) - 1);
291 } else {
292 bus_space_write_1(es->st, es->sh, ES1370_REG_MEMPAGE, ES1370_REG_ADC_FRAMEADR >> 8);
293 bus_space_write_4(es->st, es->sh, ES1370_REG_ADC_FRAMEADR & 0xff, sndbuf_getbufaddr(ch->buffer));
294 bus_space_write_4(es->st, es->sh, ES1370_REG_ADC_FRAMECNT & 0xff, (ch->bufsz >> 2) - 1);
295 }
296 ch->dir = dir;
297 return 0;
298}
299
300static int
301eschan_setformat(kobj_t obj, void *data, u_int32_t format)
302{
303 struct es_chinfo *ch = data;
304 struct es_info *es = ch->parent;
305
306 if (ch->dir == PCMDIR_PLAY) {
307 es->sctrl &= ~SCTRL_P2FMT;
308 if (format & AFMT_S16_LE) es->sctrl |= SCTRL_P2SEB;
309 if (format & AFMT_STEREO) es->sctrl |= SCTRL_P2SMB;
310 } else {
311 es->sctrl &= ~SCTRL_R1FMT;
312 if (format & AFMT_S16_LE) es->sctrl |= SCTRL_R1SEB;
313 if (format & AFMT_STEREO) es->sctrl |= SCTRL_R1SMB;
314 }
315 bus_space_write_4(es->st, es->sh, ES1370_REG_SERIAL_CONTROL, es->sctrl);
316 ch->fmt = format;
317 return 0;
318}
319
320static int
321eschan1370_setspeed(kobj_t obj, void *data, u_int32_t speed)
322{
323 struct es_chinfo *ch = data;
324 struct es_info *es = ch->parent;
325
326 es->ctrl &= ~CTRL_PCLKDIV;
327 es->ctrl |= DAC2_SRTODIV(speed) << CTRL_SH_PCLKDIV;
328 bus_space_write_4(es->st, es->sh, ES1370_REG_CONTROL, es->ctrl);
329 /* rec/play speeds locked together - should indicate in flags */
330 return speed; /* XXX calc real speed */
331}
332
333static int
334eschan1371_setspeed(kobj_t obj, void *data, u_int32_t speed)
335{
336 struct es_chinfo *ch = data;
337 struct es_info *es = ch->parent;
338
339 if (ch->dir == PCMDIR_PLAY) {
340 return es1371_dac_rate(es, speed, 3 - ch->num); /* play */
341 } else {
342 return es1371_adc_rate(es, speed, 1); /* record */
343 }
344}
345
346static int
347eschan_setblocksize(kobj_t obj, void *data, u_int32_t blocksize)
348{
349 struct es_chinfo *ch = data;
350
351 ch->blksz = blocksize;
352 ch->bufsz = ch->blksz * 2;
353 sndbuf_resize(ch->buffer, 2, ch->blksz);
354
355 return ch->blksz;
356}
357
358static int
359eschan_trigger(kobj_t obj, void *data, int go)
360{
361 struct es_chinfo *ch = data;
362 struct es_info *es = ch->parent;
363 unsigned cnt;
364
365 if (go == PCMTRIG_EMLDMAWR || go == PCMTRIG_EMLDMARD)
366 return 0;
367
368 cnt = (ch->blksz / sndbuf_getbps(ch->buffer)) - 1;
369
370 if (ch->dir == PCMDIR_PLAY) {
371 if (go == PCMTRIG_START) {
372 int b = (ch->fmt & AFMT_S16_LE)? 2 : 1;
373 es->ctrl |= CTRL_DAC2_EN;
374 es->sctrl &= ~(SCTRL_P2ENDINC | SCTRL_P2STINC | SCTRL_P2LOOPSEL | SCTRL_P2PAUSE | SCTRL_P2DACSEN);
375 es->sctrl |= SCTRL_P2INTEN | (b << SCTRL_SH_P2ENDINC);
376 bus_space_write_4(es->st, es->sh, ES1370_REG_DAC2_SCOUNT, cnt);
377 /* start at beginning of buffer */
378 bus_space_write_4(es->st, es->sh, ES1370_REG_MEMPAGE, ES1370_REG_DAC2_FRAMECNT >> 8);
379 bus_space_write_4(es->st, es->sh, ES1370_REG_DAC2_FRAMECNT & 0xff, (ch->bufsz >> 2) - 1);
380 } else es->ctrl &= ~CTRL_DAC2_EN;
381 } else {
382 if (go == PCMTRIG_START) {
383 es->ctrl |= CTRL_ADC_EN;
384 es->sctrl &= ~SCTRL_R1LOOPSEL;
385 es->sctrl |= SCTRL_R1INTEN;
386 bus_space_write_4(es->st, es->sh, ES1370_REG_ADC_SCOUNT, cnt);
387 /* start at beginning of buffer */
388 bus_space_write_4(es->st, es->sh, ES1370_REG_MEMPAGE, ES1370_REG_ADC_FRAMECNT >> 8);
389 bus_space_write_4(es->st, es->sh, ES1370_REG_ADC_FRAMECNT & 0xff, (ch->bufsz >> 2) - 1);
390 } else es->ctrl &= ~CTRL_ADC_EN;
391 }
392 bus_space_write_4(es->st, es->sh, ES1370_REG_SERIAL_CONTROL, es->sctrl);
393 bus_space_write_4(es->st, es->sh, ES1370_REG_CONTROL, es->ctrl);
394 return 0;
395}
396
397static int
398eschan_getptr(kobj_t obj, void *data)
399{
400 struct es_chinfo *ch = data;
401 struct es_info *es = ch->parent;
402 u_int32_t reg, cnt;
403
404 if (ch->dir == PCMDIR_PLAY)
405 reg = ES1370_REG_DAC2_FRAMECNT;
406 else
407 reg = ES1370_REG_ADC_FRAMECNT;
408
409 bus_space_write_4(es->st, es->sh, ES1370_REG_MEMPAGE, reg >> 8);
410 cnt = bus_space_read_4(es->st, es->sh, reg & 0x000000ff) >> 16;
411 /* cnt is longwords */
412 return cnt << 2;
413}
414
415static struct pcmchan_caps *
416eschan_getcaps(kobj_t obj, void *data)
417{
418 struct es_chinfo *ch = data;
419 return (ch->dir == PCMDIR_PLAY)? &es_playcaps : &es_reccaps;
420}
421
422static kobj_method_t eschan1370_methods[] = {
423 KOBJMETHOD(channel_init, eschan_init),
424 KOBJMETHOD(channel_setdir, eschan_setdir),
425 KOBJMETHOD(channel_setformat, eschan_setformat),
426 KOBJMETHOD(channel_setspeed, eschan1370_setspeed),
427 KOBJMETHOD(channel_setblocksize, eschan_setblocksize),
428 KOBJMETHOD(channel_trigger, eschan_trigger),
429 KOBJMETHOD(channel_getptr, eschan_getptr),
430 KOBJMETHOD(channel_getcaps, eschan_getcaps),
431 { 0, 0 }
432};
433CHANNEL_DECLARE(eschan1370);
434
435static kobj_method_t eschan1371_methods[] = {
436 KOBJMETHOD(channel_init, eschan_init),
437 KOBJMETHOD(channel_setdir, eschan_setdir),
438 KOBJMETHOD(channel_setformat, eschan_setformat),
439 KOBJMETHOD(channel_setspeed, eschan1371_setspeed),
440 KOBJMETHOD(channel_setblocksize, eschan_setblocksize),
441 KOBJMETHOD(channel_trigger, eschan_trigger),
442 KOBJMETHOD(channel_getptr, eschan_getptr),
443 KOBJMETHOD(channel_getcaps, eschan_getcaps),
444 { 0, 0 }
445};
446CHANNEL_DECLARE(eschan1371);
447
448/* -------------------------------------------------------------------- */
449/* The interrupt handler */
450static void
451es_intr(void *p)
452{
453 struct es_info *es = p;
454 unsigned intsrc, sctrl;
455
456 intsrc = bus_space_read_4(es->st, es->sh, ES1370_REG_STATUS);
457 if ((intsrc & STAT_INTR) == 0) return;
458
459 sctrl = es->sctrl;
460 if (intsrc & STAT_ADC) sctrl &= ~SCTRL_R1INTEN;
461 if (intsrc & STAT_DAC1) sctrl &= ~SCTRL_P1INTEN;
462 if (intsrc & STAT_DAC2) sctrl &= ~SCTRL_P2INTEN;
463
464 bus_space_write_4(es->st, es->sh, ES1370_REG_SERIAL_CONTROL, sctrl);
465 bus_space_write_4(es->st, es->sh, ES1370_REG_SERIAL_CONTROL, es->sctrl);
466
467 if (intsrc & STAT_ADC) chn_intr(es->rch.channel);
468 if (intsrc & STAT_DAC1);
469 if (intsrc & STAT_DAC2) chn_intr(es->pch.channel);
470}
471
472/* ES1370 specific */
473static int
474es1370_init(struct es_info *es)
475{
476 es->ctrl = CTRL_CDC_EN | CTRL_SERR_DIS |
477 (DAC2_SRTODIV(DSP_DEFAULT_SPEED) << CTRL_SH_PCLKDIV);
478 bus_space_write_4(es->st, es->sh, ES1370_REG_CONTROL, es->ctrl);
479
480 es->sctrl = 0;
481 bus_space_write_4(es->st, es->sh, ES1370_REG_SERIAL_CONTROL, es->sctrl);
482
483 es1370_wrcodec(es, CODEC_RES_PD, 3);/* No RST, PD */
484 es1370_wrcodec(es, CODEC_CSEL, 0); /* CODEC ADC and CODEC DAC use
485 * {LR,B}CLK2 and run off the LRCLK2
486 * PLL; program DAC_SYNC=0! */
487 es1370_wrcodec(es, CODEC_ADSEL, 0);/* Recording source is mixer */
488 es1370_wrcodec(es, CODEC_MGAIN, 0);/* MIC amp is 0db */
489
490 return 0;
491}
492
493/* ES1371 specific */
494int
495es1371_init(struct es_info *es, device_t dev)
496{
497 int idx;
498 int devid = pci_get_devid(dev);
499 int revid = pci_get_revid(dev);
500
501 if (debug > 0) printf("es_init\n");
502
503 es->num = 0;
504 es->ctrl = 0;
505 es->sctrl = 0;
506 /* initialize the chips */
507 if ((devid == ES1371_PCI_ID && revid == ES1371REV_ES1373_8) ||
508 (devid == ES1371_PCI_ID && revid == ES1371REV_CT5880_A) ||
509 (devid == CT5880_PCI_ID && revid == CT5880REV_CT5880_C) ||
510 (devid == CT5880_PCI_ID && revid == CT5880REV_CT5880_D) ||
511 (devid == CT5880_PCI_ID && revid == CT5880REV_CT5880_E) ||
512 (devid == CT4730_PCI_ID)) {
513 bus_space_write_4(es->st, es->sh, ES1370_REG_STATUS, 0x20000000);
514 DELAY(20000);
515 if (debug > 0) device_printf(dev, "ac97 2.1 enabled\n");
516 } else { /* pre ac97 2.1 card */
517 bus_space_write_4(es->st, es->sh, ES1370_REG_CONTROL, es->ctrl);
518 if (debug > 0) device_printf(dev, "ac97 pre-2.1 enabled\n");
519 }
520 bus_space_write_4(es->st, es->sh, ES1370_REG_SERIAL_CONTROL, es->sctrl);
521 bus_space_write_4(es->st, es->sh, ES1371_REG_LEGACY, 0);
522 /* AC'97 warm reset to start the bitclk */
523 bus_space_write_4(es->st, es->sh, ES1371_REG_LEGACY, es->ctrl | ES1371_SYNC_RES);
524 DELAY(2000);
525 bus_space_write_4(es->st, es->sh, ES1370_REG_SERIAL_CONTROL, es->ctrl);
526 /* Init the sample rate converter */
527 bus_space_write_4(es->st, es->sh, ES1371_REG_SMPRATE, ES1371_DIS_SRC);
528 for (idx = 0; idx < 0x80; idx++)
529 es1371_src_write(es, idx, 0);
530 es1371_src_write(es, ES_SMPREG_DAC1 + ES_SMPREG_TRUNC_N, 16 << 4);
531 es1371_src_write(es, ES_SMPREG_DAC1 + ES_SMPREG_INT_REGS, 16 << 10);
532 es1371_src_write(es, ES_SMPREG_DAC2 + ES_SMPREG_TRUNC_N, 16 << 4);
533 es1371_src_write(es, ES_SMPREG_DAC2 + ES_SMPREG_INT_REGS, 16 << 10);
534 es1371_src_write(es, ES_SMPREG_VOL_ADC, 1 << 12);
535 es1371_src_write(es, ES_SMPREG_VOL_ADC + 1, 1 << 12);
536 es1371_src_write(es, ES_SMPREG_VOL_DAC1, 1 << 12);
537 es1371_src_write(es, ES_SMPREG_VOL_DAC1 + 1, 1 << 12);
538 es1371_src_write(es, ES_SMPREG_VOL_DAC2, 1 << 12);
539 es1371_src_write(es, ES_SMPREG_VOL_DAC2 + 1, 1 << 12);
540 es1371_adc_rate (es, 22050, 1);
541 es1371_dac_rate (es, 22050, 1);
542 es1371_dac_rate (es, 22050, 2);
543 /* WARNING:
544 * enabling the sample rate converter without properly programming
545 * its parameters causes the chip to lock up (the SRC busy bit will
546 * be stuck high, and I've found no way to rectify this other than
547 * power cycle)
548 */
549 bus_space_write_4(es->st, es->sh, ES1371_REG_SMPRATE, 0);
550
551 return (0);
552}
553
554/* -------------------------------------------------------------------- */
555
556static int
557es1371_wrcd(kobj_t obj, void *s, int addr, u_int32_t data)
558{
559 int sl;
560 unsigned t, x;
561 struct es_info *es = (struct es_info*)s;
562
563 if (debug > 0) printf("wrcodec addr 0x%x data 0x%x\n", addr, data);
564
565 for (t = 0; t < 0x1000; t++)
566 if (!(bus_space_read_4(es->st, es->sh,(ES1371_REG_CODEC & CODEC_WIP))))
567 break;
568 sl = spltty();
569 /* save the current state for later */
570 x = bus_space_read_4(es->st, es->sh, ES1371_REG_SMPRATE);
571 /* enable SRC state data in SRC mux */
572 bus_space_write_4(es->st, es->sh, ES1371_REG_SMPRATE,
573 (es1371_wait_src_ready(s) &
574 (ES1371_DIS_SRC | ES1371_DIS_P1 | ES1371_DIS_P2 | ES1371_DIS_R1)));
575 /* wait for a SAFE time to write addr/data and then do it, dammit */
576 for (t = 0; t < 0x1000; t++)
577 if ((bus_space_read_4(es->st, es->sh, ES1371_REG_SMPRATE) & 0x00070000) == 0x00010000)
578 break;
579
580 if (debug > 2)
581 printf("one b_s_w: 0x%lx 0x%x 0x%x\n",
582 rman_get_start(es->reg), ES1371_REG_CODEC,
583 ((addr << CODEC_POADD_SHIFT) & CODEC_POADD_MASK) |
584 ((data << CODEC_PODAT_SHIFT) & CODEC_PODAT_MASK));
585
586 bus_space_write_4(es->st, es->sh,ES1371_REG_CODEC,
587 ((addr << CODEC_POADD_SHIFT) & CODEC_POADD_MASK) |
588 ((data << CODEC_PODAT_SHIFT) & CODEC_PODAT_MASK));
589 /* restore SRC reg */
590 es1371_wait_src_ready(s);
591 if (debug > 2)
592 printf("two b_s_w: 0x%lx 0x%x 0x%x\n",
593 rman_get_start(es->reg), ES1371_REG_SMPRATE, x);
594 bus_space_write_4(es->st, es->sh, ES1371_REG_SMPRATE, x);
595 splx(sl);
596
597 return 0;
598}
599
600static int
601es1371_rdcd(kobj_t obj, void *s, int addr)
602{
603 int sl;
604 unsigned t, x = 0;
605 struct es_info *es = (struct es_info *)s;
606
607 if (debug > 0) printf("rdcodec addr 0x%x ... ", addr);
608
609 for (t = 0; t < 0x1000; t++)
610 if (!(x = bus_space_read_4(es->st, es->sh, ES1371_REG_CODEC) & CODEC_WIP))
611 break;
612 if (debug > 0) printf("loop 1 t 0x%x x 0x%x ", t, x);
613
614 sl = spltty();
615
616 /* save the current state for later */
617 x = bus_space_read_4(es->st, es->sh, ES1371_REG_SMPRATE);
618 /* enable SRC state data in SRC mux */
619 bus_space_write_4(es->st, es->sh, ES1371_REG_SMPRATE,
620 (es1371_wait_src_ready(s) &
621 (ES1371_DIS_SRC | ES1371_DIS_P1 | ES1371_DIS_P2 | ES1371_DIS_R1)));
622 /* wait for a SAFE time to write addr/data and then do it, dammit */
623 for (t = 0; t < 0x5000; t++)
624 if ((x = bus_space_read_4(es->st, es->sh, ES1371_REG_SMPRATE) & 0x00070000) == 0x00010000)
625 break;
626 if (debug > 0) printf("loop 2 t 0x%x x 0x%x ", t, x);
627 bus_space_write_4(es->st, es->sh, ES1371_REG_CODEC,
628 ((addr << CODEC_POADD_SHIFT) & CODEC_POADD_MASK) | CODEC_PORD);
629
630 /* restore SRC reg */
631 es1371_wait_src_ready(s);
632 bus_space_write_4(es->st, es->sh, ES1371_REG_SMPRATE, x);
633
634 splx(sl);
635
636 /* now wait for the stinkin' data (RDY) */
637 for (t = 0; t < 0x1000; t++)
638 if ((x = bus_space_read_4(es->st, es->sh, ES1371_REG_CODEC)) & CODEC_RDY)
639 break;
640 if (debug > 0) printf("loop 3 t 0x%x 0x%x ret 0x%x\n", t, x, ((x & CODEC_PIDAT_MASK) >> CODEC_PIDAT_SHIFT));
641 return ((x & CODEC_PIDAT_MASK) >> CODEC_PIDAT_SHIFT);
642}
643
644static kobj_method_t es1371_ac97_methods[] = {
645 KOBJMETHOD(ac97_read, es1371_rdcd),
646 KOBJMETHOD(ac97_write, es1371_wrcd),
647 { 0, 0 }
648};
649AC97_DECLARE(es1371_ac97);
650
651/* -------------------------------------------------------------------- */
652
653static u_int
654es1371_src_read(struct es_info *es, u_short reg)
655{
656 unsigned int r;
657
658 r = es1371_wait_src_ready(es) &
659 (ES1371_DIS_SRC | ES1371_DIS_P1 | ES1371_DIS_P2 | ES1371_DIS_R1);
660 r |= ES1371_SRC_RAM_ADDRO(reg);
661 bus_space_write_4(es->st, es->sh, ES1371_REG_SMPRATE,r);
662 return ES1371_SRC_RAM_DATAI(es1371_wait_src_ready(es));
663}
664
665static void
666es1371_src_write(struct es_info *es, u_short reg, u_short data){
667 u_int r;
668
669 r = es1371_wait_src_ready(es) &
670 (ES1371_DIS_SRC | ES1371_DIS_P1 | ES1371_DIS_P2 | ES1371_DIS_R1);
671 r |= ES1371_SRC_RAM_ADDRO(reg) | ES1371_SRC_RAM_DATAO(data);
672 /* printf("es1371_src_write 0x%x 0x%x\n",ES1371_REG_SMPRATE,r | ES1371_SRC_RAM_WE); */
673 bus_space_write_4(es->st, es->sh, ES1371_REG_SMPRATE, r | ES1371_SRC_RAM_WE);
674}
675
676static u_int
677es1371_adc_rate(struct es_info *es, u_int rate, int set)
678{
679 u_int n, truncm, freq, result;
680
681 if (rate > 48000) rate = 48000;
682 if (rate < 4000) rate = 4000;
683 n = rate / 3000;
684 if ((1 << n) & ((1 << 15) | (1 << 13) | (1 << 11) | (1 << 9)))
685 n--;
686 truncm = (21 * n - 1) | 1;
687 freq = ((48000UL << 15) / rate) * n;
688 result = (48000UL << 15) / (freq / n);
689 if (set) {
690 if (rate >= 24000) {
691 if (truncm > 239) truncm = 239;
692 es1371_src_write(es, ES_SMPREG_ADC + ES_SMPREG_TRUNC_N,
693 (((239 - truncm) >> 1) << 9) | (n << 4));
694 } else {
695 if (truncm > 119) truncm = 119;
696 es1371_src_write(es, ES_SMPREG_ADC + ES_SMPREG_TRUNC_N,
697 0x8000 | (((119 - truncm) >> 1) << 9) | (n << 4));
698 }
699 es1371_src_write(es, ES_SMPREG_ADC + ES_SMPREG_INT_REGS,
700 (es1371_src_read(es, ES_SMPREG_ADC + ES_SMPREG_INT_REGS) &
701 0x00ff) | ((freq >> 5) & 0xfc00));
702 es1371_src_write(es, ES_SMPREG_ADC + ES_SMPREG_VFREQ_FRAC, freq & 0x7fff);
703 es1371_src_write(es, ES_SMPREG_VOL_ADC, n << 8);
704 es1371_src_write(es, ES_SMPREG_VOL_ADC + 1, n << 8);
705 }
706 return result;
707}
708
709static u_int
710es1371_dac_rate(struct es_info *es, u_int rate, int set)
711{
712 u_int freq, r, result, dac, dis;
713
714 if (rate > 48000) rate = 48000;
715 if (rate < 4000) rate = 4000;
716 freq = (rate << 15) / 3000;
717 result = (freq * 3000) >> 15;
718 if (set) {
719 dac = (set == 1)? ES_SMPREG_DAC1 : ES_SMPREG_DAC2;
720 dis = (set == 1)? ES1371_DIS_P2 : ES1371_DIS_P1;
721
722 r = (es1371_wait_src_ready(es) & (ES1371_DIS_SRC | ES1371_DIS_P1 | ES1371_DIS_P2 | ES1371_DIS_R1));
723 bus_space_write_4(es->st, es->sh, ES1371_REG_SMPRATE, r);
724 es1371_src_write(es, dac + ES_SMPREG_INT_REGS,
725 (es1371_src_read(es, dac + ES_SMPREG_INT_REGS) & 0x00ff) | ((freq >> 5) & 0xfc00));
726 es1371_src_write(es, dac + ES_SMPREG_VFREQ_FRAC, freq & 0x7fff);
727 r = (es1371_wait_src_ready(es) & (ES1371_DIS_SRC | dis | ES1371_DIS_R1));
728 bus_space_write_4(es->st, es->sh, ES1371_REG_SMPRATE, r);
729 }
730 return result;
731}
732
733static u_int
734es1371_wait_src_ready(struct es_info *es)
735{
736 u_int t, r;
737
738 for (t = 0; t < 500; t++) {
739 if (!((r = bus_space_read_4(es->st, es->sh, ES1371_REG_SMPRATE)) & ES1371_SRC_RAM_BUSY))
740 return r;
741 DELAY(1000);
742 }
743 printf("es1371: wait src ready timeout 0x%x [0x%x]\n", ES1371_REG_SMPRATE, r);
744 return 0;
745}
746
747/* -------------------------------------------------------------------- */
748
749/*
750 * Probe and attach the card
751 */
752
753static int
754es_pci_probe(device_t dev)
755{
756 switch(pci_get_devid(dev)) {
757 case ES1370_PCI_ID:
758 device_set_desc(dev, "AudioPCI ES1370");
759 return 0;
760
761 case ES1371_PCI_ID:
762 switch(pci_get_revid(dev)) {
763 case ES1371REV_ES1371_A:
764 device_set_desc(dev, "AudioPCI ES1371-A");
765 return 0;
766
767 case ES1371REV_ES1371_B:
768 device_set_desc(dev, "AudioPCI ES1371-B");
769 return 0;
770
771 case ES1371REV_ES1373_A:
772 device_set_desc(dev, "AudioPCI ES1373-A");
773 return 0;
774
775 case ES1371REV_ES1373_B:
776 device_set_desc(dev, "AudioPCI ES1373-B");
777 return 0;
778
779 case ES1371REV_ES1373_8:
780 device_set_desc(dev, "AudioPCI ES1373-8");
781 return 0;
782
783 case ES1371REV_CT5880_A:
784 device_set_desc(dev, "Creative CT5880-A");
785 return 0;
786
787 default:
788 device_set_desc(dev, "AudioPCI ES1371-?");
789 device_printf(dev, "unknown revision %d -- please report to cg@freebsd.org\n", pci_get_revid(dev));
790 return 0;
791 }
792
793 case ES1371_PCI_ID2:
794 device_set_desc(dev, "Strange AudioPCI ES1371-? (vid=3274)");
795 device_printf(dev, "unknown revision %d -- please report to cg@freebsd.org\n", pci_get_revid(dev));
796 return 0;
797
798 case CT4730_PCI_ID:
799 switch(pci_get_revid(dev)) {
800 case CT4730REV_CT4730_A:
801 device_set_desc(dev, "Creative SB AudioPCI CT4730");
802 return 0;
803 default:
804 device_set_desc(dev, "Creative SB AudioPCI CT4730-?");
805 device_printf(dev, "unknown revision %d -- please report to cg@freebsd.org\n", pci_get_revid(dev));
806 return 0;
807 }
808
809 case CT5880_PCI_ID:
810 switch(pci_get_revid(dev)) {
811 case CT5880REV_CT5880_C:
812 device_set_desc(dev, "Creative CT5880-C");
813 return 0;
814
815 case CT5880REV_CT5880_D:
816 device_set_desc(dev, "Creative CT5880-D");
817 return 0;
818
819 case CT5880REV_CT5880_E:
820 device_set_desc(dev, "Creative CT5880-E");
821 return 0;
822
823 default:
824 device_set_desc(dev, "Creative CT5880-?");
825 device_printf(dev, "unknown revision %d -- please report to cg@freebsd.org\n", pci_get_revid(dev));
826 return 0;
827 }
828
829 default:
830 return ENXIO;
831 }
832}
833
834static int
835es_pci_attach(device_t dev)
836{
837 u_int32_t data;
838 struct es_info *es = 0;
839 int mapped;
840 char status[SND_STATUSLEN];
841 struct ac97_info *codec = 0;
842 kobj_class_t ct = NULL;
843
844 if ((es = malloc(sizeof *es, M_DEVBUF, M_NOWAIT | M_ZERO)) == NULL) {
845 device_printf(dev, "cannot allocate softc\n");
846 return ENXIO;
847 }
848
849 es->dev = dev;
850 mapped = 0;
851 data = pci_read_config(dev, PCIR_COMMAND, 2);
852 data |= (PCIM_CMD_PORTEN|PCIM_CMD_MEMEN|PCIM_CMD_BUSMASTEREN);
853 pci_write_config(dev, PCIR_COMMAND, data, 2);
854 data = pci_read_config(dev, PCIR_COMMAND, 2);
855 if (mapped == 0 && (data & PCIM_CMD_MEMEN)) {
856 es->regid = MEM_MAP_REG;
857 es->regtype = SYS_RES_MEMORY;
858 es->reg = bus_alloc_resource(dev, es->regtype, &es->regid,
859 0, ~0, 1, RF_ACTIVE);
860 if (es->reg) {
861 es->st = rman_get_bustag(es->reg);
862 es->sh = rman_get_bushandle(es->reg);
863 mapped++;
864 }
865 }
866 if (mapped == 0 && (data & PCIM_CMD_PORTEN)) {
867 es->regid = PCIR_BAR(0);
868 es->regtype = SYS_RES_IOPORT;
869 es->reg = bus_alloc_resource(dev, es->regtype, &es->regid,
870 0, ~0, 1, RF_ACTIVE);
871 if (es->reg) {
872 es->st = rman_get_bustag(es->reg);
873 es->sh = rman_get_bushandle(es->reg);
874 mapped++;
875 }
876 }
877 if (mapped == 0) {
878 device_printf(dev, "unable to map register space\n");
879 goto bad;
880 }
881
882 es->bufsz = pcm_getbuffersize(dev, 4096, ES_DEFAULT_BUFSZ, 65536);
883
884 if (pci_get_devid(dev) == ES1371_PCI_ID ||
885 pci_get_devid(dev) == ES1371_PCI_ID2 ||
886 pci_get_devid(dev) == CT5880_PCI_ID ||
887 pci_get_devid(dev) == CT4730_PCI_ID) {
888 if(-1 == es1371_init(es, dev)) {
889 device_printf(dev, "unable to initialize the card\n");
890 goto bad;
891 }
892 codec = AC97_CREATE(dev, es, es1371_ac97);
893 if (codec == NULL) goto bad;
894 /* our init routine does everything for us */
895 /* set to NULL; flag mixer_init not to run the ac97_init */
896 /* ac97_mixer.init = NULL; */
897 if (mixer_init(dev, ac97_getmixerclass(), codec)) goto bad;
898 ct = &eschan1371_class;
899 } else if (pci_get_devid(dev) == ES1370_PCI_ID) {
900 if (-1 == es1370_init(es)) {
901 device_printf(dev, "unable to initialize the card\n");
902 goto bad;
903 }
904 if (mixer_init(dev, &es1370_mixer_class, es)) goto bad;
905 ct = &eschan1370_class;
906 } else goto bad;
907
908 es->irqid = 0;
909 es->irq = bus_alloc_resource(dev, SYS_RES_IRQ, &es->irqid,
910 0, ~0, 1, RF_ACTIVE | RF_SHAREABLE);
911 if (!es->irq || snd_setup_intr(dev, es->irq, 0, es_intr, es, &es->ih)) {
912 device_printf(dev, "unable to map interrupt\n");
913 goto bad;
914 }
915
916 if (bus_dma_tag_create(/*parent*/NULL, /*alignment*/2, /*boundary*/0,
917 /*lowaddr*/BUS_SPACE_MAXADDR_32BIT,
918 /*highaddr*/BUS_SPACE_MAXADDR,
919 /*filter*/NULL, /*filterarg*/NULL,
920 /*maxsize*/es->bufsz, /*nsegments*/1, /*maxsegz*/0x3ffff,
921 /*flags*/0, /*lockfunc*/busdma_lock_mutex,
922 /*lockarg*/&Giant, &es->parent_dmat) != 0) {
923 device_printf(dev, "unable to create dma tag\n");
924 goto bad;
925 }
926
927 snprintf(status, SND_STATUSLEN, "at %s 0x%lx irq %ld",
928 (es->regtype == SYS_RES_IOPORT)? "io" : "memory",
929 rman_get_start(es->reg), rman_get_start(es->irq));
930
931 if (pcm_register(dev, es, 1, 1)) goto bad;
932 pcm_addchan(dev, PCMDIR_REC, ct, es);
933 pcm_addchan(dev, PCMDIR_PLAY, ct, es);
934 pcm_setstatus(dev, status);
935
936 return 0;
937
938 bad:
939 if (codec) ac97_destroy(codec);
940 if (es->reg) bus_release_resource(dev, es->regtype, es->regid, es->reg);
941 if (es->ih) bus_teardown_intr(dev, es->irq, es->ih);
942 if (es->irq) bus_release_resource(dev, SYS_RES_IRQ, es->irqid, es->irq);
943 if (es->parent_dmat) bus_dma_tag_destroy(es->parent_dmat);
944 if (es) free(es, M_DEVBUF);
945 return ENXIO;
946}
947
948static int
949es_pci_detach(device_t dev)
950{
951 int r;
952 struct es_info *es;
953
954 r = pcm_unregister(dev);
955 if (r)
956 return r;
957
958 es = pcm_getdevinfo(dev);
959 bus_release_resource(dev, es->regtype, es->regid, es->reg);
960 bus_teardown_intr(dev, es->irq, es->ih);
961 bus_release_resource(dev, SYS_RES_IRQ, es->irqid, es->irq);
962 bus_dma_tag_destroy(es->parent_dmat);
963 free(es, M_DEVBUF);
964
965 return 0;
966}
967
968static device_method_t es_methods[] = {
969 /* Device interface */
970 DEVMETHOD(device_probe, es_pci_probe),
971 DEVMETHOD(device_attach, es_pci_attach),
972 DEVMETHOD(device_detach, es_pci_detach),
973
974 { 0, 0 }
975};
976
977static driver_t es_driver = {
978 "pcm",
979 es_methods,
980 PCM_SOFTC_SIZE,
981};
982
983DRIVER_MODULE(snd_es137x, pci, es_driver, pcm_devclass, 0, 0);
984MODULE_DEPEND(snd_es137x, snd_pcm, PCM_MINVER, PCM_PREFVER, PCM_MAXVER);
985MODULE_VERSION(snd_es137x, 1);
|