Deleted Added
sdiff udiff text old ( 170721 ) new ( 170815 )
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1/*-
2 * Support the ENSONIQ AudioPCI board and Creative Labs SoundBlaster PCI
3 * boards based on the ES1370, ES1371 and ES1373 chips.
4 *
5 * Copyright (c) 1999 Russell Cattelan <cattelan@thebarn.com>
6 * Copyright (c) 1999 Cameron Grant <cg@freebsd.org>
7 * Copyright (c) 1998 by Joachim Kuebart. All rights reserved.
8 *
9 * Redistribution and use in source and binary forms, with or without
10 * modification, are permitted provided that the following conditions
11 * are met:
12 *
13 * 1. Redistributions of source code must retain the above copyright
14 * notice, this list of conditions and the following disclaimer.
15 *
16 * 2. Redistributions in binary form must reproduce the above copyright
17 * notice, this list of conditions and the following disclaimer in
18 * the documentation and/or other materials provided with the
19 * distribution.
20 *
21 * 3. All advertising materials mentioning features or use of this
22 * software must display the following acknowledgement:
23 * This product includes software developed by Joachim Kuebart.
24 *
25 * 4. The name of the author may not be used to endorse or promote
26 * products derived from this software without specific prior
27 * written permission.
28 *
29 * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
30 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
31 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
32 * DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT,
33 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
34 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
35 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
36 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
37 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
38 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
39 * OF THE POSSIBILITY OF SUCH DAMAGE.
40 */
41
42/*
43 * Part of this code was heavily inspired by the linux driver from
44 * Thomas Sailer (sailer@ife.ee.ethz.ch)
45 * Just about everything has been touched and reworked in some way but
46 * the all the underlying sequences/timing/register values are from
47 * Thomas' code.
48 *
49*/
50
51#include <dev/sound/pcm/sound.h>
52#include <dev/sound/pcm/ac97.h>
53#include <dev/sound/pci/es137x.h>
54
55#include <dev/pci/pcireg.h>
56#include <dev/pci/pcivar.h>
57
58#include <sys/sysctl.h>
59
60#include "mixer_if.h"
61
62SND_DECLARE_FILE("$FreeBSD: head/sys/dev/sound/pci/es137x.c 170721 2007-06-14 11:13:38Z ariff $");
63
64#define MEM_MAP_REG 0x14
65
66/* PCI IDs of supported chips */
67#define ES1370_PCI_ID 0x50001274
68#define ES1371_PCI_ID 0x13711274
69#define ES1371_PCI_ID2 0x13713274
70#define CT5880_PCI_ID 0x58801274
71#define CT4730_PCI_ID 0x89381102
72
73#define ES1371REV_ES1371_A 0x02
74#define ES1371REV_ES1371_B 0x09
75
76#define ES1371REV_ES1373_8 0x08
77#define ES1371REV_ES1373_A 0x04
78#define ES1371REV_ES1373_B 0x06
79
80#define ES1371REV_CT5880_A 0x07
81
82#define CT5880REV_CT5880_C 0x02
83#define CT5880REV_CT5880_D 0x03
84#define CT5880REV_CT5880_E 0x04
85
86#define CT4730REV_CT4730_A 0x00
87
88#define ES_DEFAULT_BUFSZ 4096
89
90/* 2 DAC for playback, 1 ADC for record */
91#define ES_DAC1 0
92#define ES_DAC2 1
93#define ES_ADC 2
94#define ES_NCHANS 3
95
96#define ES_DMA_SEGS_MIN 2
97#define ES_DMA_SEGS_MAX 256
98#define ES_BLK_MIN 64
99#define ES_BLK_ALIGN (~(ES_BLK_MIN - 1))
100
101#define ES1370_DAC1_MINSPEED 5512
102#define ES1370_DAC1_MAXSPEED 44100
103
104/* device private data */
105struct es_info;
106
107struct es_chinfo {
108 struct es_info *parent;
109 struct pcm_channel *channel;
110 struct snd_dbuf *buffer;
111 struct pcmchan_caps caps;
112 int dir, num, index;
113 uint32_t fmt, blksz, blkcnt, bufsz;
114 uint32_t ptr, prevptr;
115 int active;
116};
117
118/*
119 * 32bit Ensoniq Configuration (es->escfg).
120 * ----------------------------------------
121 *
122 * +-------+--------+------+------+---------+--------+---------+---------+
123 * len | 16 | 1 | 1 | 1 | 2 | 2 | 1 | 8 |
124 * +-------+--------+------+------+---------+--------+---------+---------+
125 * | fixed | single | | | | | is | general |
126 * | rate | pcm | DACx | DACy | numplay | numrec | es1370? | purpose |
127 * | | mixer | | | | | | |
128 * +-------+--------+------+------+---------+--------+---------+---------+
129 */
130#define ES_FIXED_RATE(cfgv) \
131 (((cfgv) & 0xffff0000) >> 16)
132#define ES_SET_FIXED_RATE(cfgv, nv) \
133 (((cfgv) & ~0xffff0000) | (((nv) & 0xffff) << 16))
134#define ES_SINGLE_PCM_MIX(cfgv) \
135 (((cfgv) & 0x8000) >> 15)
136#define ES_SET_SINGLE_PCM_MIX(cfgv, nv) \
137 (((cfgv) & ~0x8000) | (((nv) ? 1 : 0) << 15))
138#define ES_DAC_FIRST(cfgv) \
139 (((cfgv) & 0x4000) >> 14)
140#define ES_SET_DAC_FIRST(cfgv, nv) \
141 (((cfgv) & ~0x4000) | (((nv) & 0x1) << 14))
142#define ES_DAC_SECOND(cfgv) \
143 (((cfgv) & 0x2000) >> 13)
144#define ES_SET_DAC_SECOND(cfgv, nv) \
145 (((cfgv) & ~0x2000) | (((nv) & 0x1) << 13))
146#define ES_NUMPLAY(cfgv) \
147 (((cfgv) & 0x1800) >> 11)
148#define ES_SET_NUMPLAY(cfgv, nv) \
149 (((cfgv) & ~0x1800) | (((nv) & 0x3) << 11))
150#define ES_NUMREC(cfgv) \
151 (((cfgv) & 0x600) >> 9)
152#define ES_SET_NUMREC(cfgv, nv) \
153 (((cfgv) & ~0x600) | (((nv) & 0x3) << 9))
154#define ES_IS_ES1370(cfgv) \
155 (((cfgv) & 0x100) >> 8)
156#define ES_SET_IS_ES1370(cfgv, nv) \
157 (((cfgv) & ~0x100) | (((nv) ? 1 : 0) << 8))
158#define ES_GP(cfgv) \
159 ((cfgv) & 0xff)
160#define ES_SET_GP(cfgv, nv) \
161 (((cfgv) & ~0xff) | ((nv) & 0xff))
162
163#define ES_DAC1_ENABLED(cfgv) \
164 (ES_NUMPLAY(cfgv) > 1 || \
165 (ES_NUMPLAY(cfgv) == 1 && ES_DAC_FIRST(cfgv) == ES_DAC1))
166#define ES_DAC2_ENABLED(cfgv) \
167 (ES_NUMPLAY(cfgv) > 1 || \
168 (ES_NUMPLAY(cfgv) == 1 && ES_DAC_FIRST(cfgv) == ES_DAC2))
169
170/*
171 * DAC 1/2 configuration through kernel hint - hint.pcm.<unit>.dac="val"
172 *
173 * 0 = Enable both DACs - Default
174 * 1 = Enable single DAC (DAC1)
175 * 2 = Enable single DAC (DAC2)
176 * 3 = Enable both DACs, swap position (DAC2 comes first instead of DAC1)
177 */
178#define ES_DEFAULT_DAC_CFG 0
179
180struct es_info {
181 bus_space_tag_t st;
182 bus_space_handle_t sh;
183 bus_dma_tag_t parent_dmat;
184
185 struct resource *reg, *irq;
186 int regtype, regid, irqid;
187 void *ih;
188
189 device_t dev;
190 int num;
191 unsigned int bufsz, blkcnt;
192
193 /* Contents of board's registers */
194 uint32_t ctrl;
195 uint32_t sctrl;
196 uint32_t escfg;
197 struct es_chinfo ch[ES_NCHANS];
198 struct mtx *lock;
199 struct callout poll_timer;
200 int poll_ticks, polling;
201};
202
203#define ES_LOCK(sc) snd_mtxlock((sc)->lock)
204#define ES_UNLOCK(sc) snd_mtxunlock((sc)->lock)
205#define ES_LOCK_ASSERT(sc) snd_mtxassert((sc)->lock)
206
207/* prototypes */
208static void es_intr(void *);
209static uint32_t es1371_wait_src_ready(struct es_info *);
210static void es1371_src_write(struct es_info *,
211 unsigned short, unsigned short);
212static unsigned int es1371_adc_rate(struct es_info *, unsigned int, int);
213static unsigned int es1371_dac_rate(struct es_info *, unsigned int, int);
214static int es1371_init(struct es_info *);
215static int es1370_init(struct es_info *);
216static int es1370_wrcodec(struct es_info *, unsigned char, unsigned char);
217
218static uint32_t es_fmt[] = {
219 AFMT_U8,
220 AFMT_STEREO | AFMT_U8,
221 AFMT_S16_LE,
222 AFMT_STEREO | AFMT_S16_LE,
223 0
224};
225static struct pcmchan_caps es_caps = {4000, 48000, es_fmt, 0};
226
227static const struct {
228 unsigned volidx:4;
229 unsigned left:4;
230 unsigned right:4;
231 unsigned stereo:1;
232 unsigned recmask:13;
233 unsigned avail:1;
234} mixtable[SOUND_MIXER_NRDEVICES] = {
235 [SOUND_MIXER_VOLUME] = { 0, 0x0, 0x1, 1, 0x1f7f, 1 },
236 [SOUND_MIXER_PCM] = { 1, 0x2, 0x3, 1, 0x0400, 1 },
237 [SOUND_MIXER_SYNTH] = { 2, 0x4, 0x5, 1, 0x0060, 1 },
238 [SOUND_MIXER_CD] = { 3, 0x6, 0x7, 1, 0x0006, 1 },
239 [SOUND_MIXER_LINE] = { 4, 0x8, 0x9, 1, 0x0018, 1 },
240 [SOUND_MIXER_LINE1] = { 5, 0xa, 0xb, 1, 0x1800, 1 },
241 [SOUND_MIXER_LINE2] = { 6, 0xc, 0x0, 0, 0x0100, 1 },
242 [SOUND_MIXER_LINE3] = { 7, 0xd, 0x0, 0, 0x0200, 1 },
243 [SOUND_MIXER_MIC] = { 8, 0xe, 0x0, 0, 0x0001, 1 },
244 [SOUND_MIXER_OGAIN] = { 9, 0xf, 0x0, 0, 0x0000, 1 }
245};
246
247static __inline uint32_t
248es_rd(struct es_info *es, int regno, int size)
249{
250 switch (size) {
251 case 1:
252 return (bus_space_read_1(es->st, es->sh, regno));
253 case 2:
254 return (bus_space_read_2(es->st, es->sh, regno));
255 case 4:
256 return (bus_space_read_4(es->st, es->sh, regno));
257 default:
258 return (0xFFFFFFFF);
259 }
260}
261
262static __inline void
263es_wr(struct es_info *es, int regno, uint32_t data, int size)
264{
265
266 switch (size) {
267 case 1:
268 bus_space_write_1(es->st, es->sh, regno, data);
269 break;
270 case 2:
271 bus_space_write_2(es->st, es->sh, regno, data);
272 break;
273 case 4:
274 bus_space_write_4(es->st, es->sh, regno, data);
275 break;
276 }
277}
278
279/* -------------------------------------------------------------------- */
280/* The es1370 mixer interface */
281
282static int
283es1370_mixinit(struct snd_mixer *m)
284{
285 struct es_info *es;
286 int i;
287 uint32_t v;
288
289 es = mix_getdevinfo(m);
290 v = 0;
291 for (i = 0; i < SOUND_MIXER_NRDEVICES; i++) {
292 if (mixtable[i].avail)
293 v |= (1 << i);
294 }
295 /*
296 * Each DAC1/2 for ES1370 can be controlled independently
297 * DAC1 = controlled by synth
298 * DAC2 = controlled by pcm
299 * This is indeed can confuse user if DAC1 become primary playback
300 * channel. Try to be smart and combine both if necessary.
301 */
302 if (ES_SINGLE_PCM_MIX(es->escfg))
303 v &= ~(1 << SOUND_MIXER_SYNTH);
304 mix_setdevs(m, v);
305 v = 0;
306 for (i = 0; i < SOUND_MIXER_NRDEVICES; i++) {
307 if (mixtable[i].recmask)
308 v |= (1 << i);
309 }
310 if (ES_SINGLE_PCM_MIX(es->escfg)) /* ditto */
311 v &= ~(1 << SOUND_MIXER_SYNTH);
312 mix_setrecdevs(m, v);
313 return (0);
314}
315
316static int
317es1370_mixset(struct snd_mixer *m, unsigned dev, unsigned left, unsigned right)
318{
319 struct es_info *es;
320 int l, r, rl, rr, set_dac1;
321
322 if (!mixtable[dev].avail)
323 return (-1);
324 l = left;
325 r = (mixtable[dev].stereo) ? right : l;
326 if (mixtable[dev].left == 0xf)
327 rl = (l < 2) ? 0x80 : 7 - (l - 2) / 14;
328 else
329 rl = (l < 10) ? 0x80 : 15 - (l - 10) / 6;
330 es = mix_getdevinfo(m);
331 ES_LOCK(es);
332 if (dev == SOUND_MIXER_PCM && (ES_SINGLE_PCM_MIX(es->escfg)) &&
333 ES_DAC1_ENABLED(es->escfg))
334 set_dac1 = 1;
335 else
336 set_dac1 = 0;
337 if (mixtable[dev].stereo) {
338 rr = (r < 10) ? 0x80 : 15 - (r - 10) / 6;
339 es1370_wrcodec(es, mixtable[dev].right, rr);
340 if (set_dac1 && mixtable[SOUND_MIXER_SYNTH].stereo)
341 es1370_wrcodec(es,
342 mixtable[SOUND_MIXER_SYNTH].right, rr);
343 }
344 es1370_wrcodec(es, mixtable[dev].left, rl);
345 if (set_dac1)
346 es1370_wrcodec(es, mixtable[SOUND_MIXER_SYNTH].left, rl);
347 ES_UNLOCK(es);
348
349 return (l | (r << 8));
350}
351
352static int
353es1370_mixsetrecsrc(struct snd_mixer *m, uint32_t src)
354{
355 struct es_info *es;
356 int i, j = 0;
357
358 es = mix_getdevinfo(m);
359 if (src == 0) src = 1 << SOUND_MIXER_MIC;
360 src &= mix_getrecdevs(m);
361 for (i = 0; i < SOUND_MIXER_NRDEVICES; i++)
362 if ((src & (1 << i)) != 0) j |= mixtable[i].recmask;
363
364 ES_LOCK(es);
365 if ((src & (1 << SOUND_MIXER_PCM)) && ES_SINGLE_PCM_MIX(es->escfg) &&
366 ES_DAC1_ENABLED(es->escfg))
367 j |= mixtable[SOUND_MIXER_SYNTH].recmask;
368 es1370_wrcodec(es, CODEC_LIMIX1, j & 0x55);
369 es1370_wrcodec(es, CODEC_RIMIX1, j & 0xaa);
370 es1370_wrcodec(es, CODEC_LIMIX2, (j >> 8) & 0x17);
371 es1370_wrcodec(es, CODEC_RIMIX2, (j >> 8) & 0x0f);
372 es1370_wrcodec(es, CODEC_OMIX1, 0x7f);
373 es1370_wrcodec(es, CODEC_OMIX2, 0x3f);
374 ES_UNLOCK(es);
375
376 return (src);
377}
378
379static kobj_method_t es1370_mixer_methods[] = {
380 KOBJMETHOD(mixer_init, es1370_mixinit),
381 KOBJMETHOD(mixer_set, es1370_mixset),
382 KOBJMETHOD(mixer_setrecsrc, es1370_mixsetrecsrc),
383 { 0, 0 }
384};
385MIXER_DECLARE(es1370_mixer);
386
387/* -------------------------------------------------------------------- */
388
389static int
390es1370_wrcodec(struct es_info *es, unsigned char i, unsigned char data)
391{
392 unsigned int t;
393
394 ES_LOCK_ASSERT(es);
395
396 for (t = 0; t < 0x1000; t++) {
397 if ((es_rd(es, ES1370_REG_STATUS, 4) &
398 STAT_CSTAT) == 0) {
399 es_wr(es, ES1370_REG_CODEC,
400 ((unsigned short)i << CODEC_INDEX_SHIFT) | data, 2);
401 return (0);
402 }
403 DELAY(1);
404 }
405 device_printf(es->dev, "%s: timed out\n", __func__);
406 return (-1);
407}
408
409/* -------------------------------------------------------------------- */
410
411/* channel interface */
412static void *
413eschan_init(kobj_t obj, void *devinfo, struct snd_dbuf *b,
414 struct pcm_channel *c, int dir)
415{
416 struct es_info *es = devinfo;
417 struct es_chinfo *ch;
418 uint32_t index;
419
420 ES_LOCK(es);
421
422 if (dir == PCMDIR_PLAY) {
423 index = ES_GP(es->escfg);
424 es->escfg = ES_SET_GP(es->escfg, index + 1);
425 if (index == 0)
426 index = ES_DAC_FIRST(es->escfg);
427 else if (index == 1)
428 index = ES_DAC_SECOND(es->escfg);
429 else {
430 device_printf(es->dev,
431 "Invalid ES_GP index: %d\n", index);
432 ES_UNLOCK(es);
433 return (NULL);
434 }
435 if (!(index == ES_DAC1 || index == ES_DAC2)) {
436 device_printf(es->dev, "Unknown DAC: %d\n", index + 1);
437 ES_UNLOCK(es);
438 return (NULL);
439 }
440 if (es->ch[index].channel != NULL) {
441 device_printf(es->dev, "DAC%d already initialized!\n",
442 index + 1);
443 ES_UNLOCK(es);
444 return (NULL);
445 }
446 } else
447 index = ES_ADC;
448
449 ch = &es->ch[index];
450 ch->index = index;
451 ch->num = es->num++;
452 ch->caps = es_caps;
453 if (ES_IS_ES1370(es->escfg)) {
454 if (ch->index == ES_DAC1) {
455 ch->caps.maxspeed = ES1370_DAC1_MAXSPEED;
456 ch->caps.minspeed = ES1370_DAC1_MINSPEED;
457 } else {
458 uint32_t fixed_rate = ES_FIXED_RATE(es->escfg);
459 if (!(fixed_rate < es_caps.minspeed ||
460 fixed_rate > es_caps.maxspeed)) {
461 ch->caps.maxspeed = fixed_rate;
462 ch->caps.minspeed = fixed_rate;
463 }
464 }
465 }
466 ch->parent = es;
467 ch->channel = c;
468 ch->buffer = b;
469 ch->bufsz = es->bufsz;
470 ch->blkcnt = es->blkcnt;
471 ch->blksz = ch->bufsz / ch->blkcnt;
472 ch->dir = dir;
473 ES_UNLOCK(es);
474 if (sndbuf_alloc(ch->buffer, es->parent_dmat, 0, ch->bufsz) != 0)
475 return (NULL);
476 ES_LOCK(es);
477 if (dir == PCMDIR_PLAY) {
478 if (ch->index == ES_DAC1) {
479 es_wr(es, ES1370_REG_MEMPAGE,
480 ES1370_REG_DAC1_FRAMEADR >> 8, 1);
481 es_wr(es, ES1370_REG_DAC1_FRAMEADR & 0xff,
482 sndbuf_getbufaddr(ch->buffer), 4);
483 es_wr(es, ES1370_REG_DAC1_FRAMECNT & 0xff,
484 (ch->bufsz >> 2) - 1, 4);
485 } else {
486 es_wr(es, ES1370_REG_MEMPAGE,
487 ES1370_REG_DAC2_FRAMEADR >> 8, 1);
488 es_wr(es, ES1370_REG_DAC2_FRAMEADR & 0xff,
489 sndbuf_getbufaddr(ch->buffer), 4);
490 es_wr(es, ES1370_REG_DAC2_FRAMECNT & 0xff,
491 (ch->bufsz >> 2) - 1, 4);
492 }
493 } else {
494 es_wr(es, ES1370_REG_MEMPAGE, ES1370_REG_ADC_FRAMEADR >> 8, 1);
495 es_wr(es, ES1370_REG_ADC_FRAMEADR & 0xff,
496 sndbuf_getbufaddr(ch->buffer), 4);
497 es_wr(es, ES1370_REG_ADC_FRAMECNT & 0xff,
498 (ch->bufsz >> 2) - 1, 4);
499 }
500 ES_UNLOCK(es);
501 return (ch);
502}
503
504static int
505eschan_setformat(kobj_t obj, void *data, uint32_t format)
506{
507 struct es_chinfo *ch = data;
508 struct es_info *es = ch->parent;
509
510 ES_LOCK(es);
511 if (ch->dir == PCMDIR_PLAY) {
512 if (ch->index == ES_DAC1) {
513 es->sctrl &= ~SCTRL_P1FMT;
514 if (format & AFMT_S16_LE)
515 es->sctrl |= SCTRL_P1SEB;
516 if (format & AFMT_STEREO)
517 es->sctrl |= SCTRL_P1SMB;
518 } else {
519 es->sctrl &= ~SCTRL_P2FMT;
520 if (format & AFMT_S16_LE)
521 es->sctrl |= SCTRL_P2SEB;
522 if (format & AFMT_STEREO)
523 es->sctrl |= SCTRL_P2SMB;
524 }
525 } else {
526 es->sctrl &= ~SCTRL_R1FMT;
527 if (format & AFMT_S16_LE)
528 es->sctrl |= SCTRL_R1SEB;
529 if (format & AFMT_STEREO)
530 es->sctrl |= SCTRL_R1SMB;
531 }
532 es_wr(es, ES1370_REG_SERIAL_CONTROL, es->sctrl, 4);
533 ES_UNLOCK(es);
534 ch->fmt = format;
535 return (0);
536}
537
538static int
539eschan1370_setspeed(kobj_t obj, void *data, uint32_t speed)
540{
541 struct es_chinfo *ch = data;
542 struct es_info *es = ch->parent;
543
544 ES_LOCK(es);
545 /* Fixed rate , do nothing. */
546 if (ch->caps.minspeed == ch->caps.maxspeed)
547 return (ch->caps.maxspeed);
548 if (speed < ch->caps.minspeed)
549 speed = ch->caps.minspeed;
550 if (speed > ch->caps.maxspeed)
551 speed = ch->caps.maxspeed;
552 if (ch->index == ES_DAC1) {
553 /*
554 * DAC1 does not support continuous rate settings.
555 * Pick the nearest and use it since FEEDER_RATE will
556 * do the the proper conversion for us.
557 */
558 es->ctrl &= ~CTRL_WTSRSEL;
559 if (speed < 8268) {
560 speed = 5512;
561 es->ctrl |= 0 << CTRL_SH_WTSRSEL;
562 } else if (speed < 16537) {
563 speed = 11025;
564 es->ctrl |= 1 << CTRL_SH_WTSRSEL;
565 } else if (speed < 33075) {
566 speed = 22050;
567 es->ctrl |= 2 << CTRL_SH_WTSRSEL;
568 } else {
569 speed = 44100;
570 es->ctrl |= 3 << CTRL_SH_WTSRSEL;
571 }
572 } else {
573 es->ctrl &= ~CTRL_PCLKDIV;
574 es->ctrl |= DAC2_SRTODIV(speed) << CTRL_SH_PCLKDIV;
575 }
576 es_wr(es, ES1370_REG_CONTROL, es->ctrl, 4);
577 ES_UNLOCK(es);
578 return (speed);
579}
580
581static int
582eschan1371_setspeed(kobj_t obj, void *data, uint32_t speed)
583{
584 struct es_chinfo *ch = data;
585 struct es_info *es = ch->parent;
586 uint32_t i;
587 int delta;
588
589 ES_LOCK(es);
590 if (ch->dir == PCMDIR_PLAY)
591 i = es1371_dac_rate(es, speed, ch->index); /* play */
592 else
593 i = es1371_adc_rate(es, speed, ch->index); /* record */
594 ES_UNLOCK(es);
595 delta = (speed > i) ? (speed - i) : (i - speed);
596 if (delta < 2)
597 return (speed);
598 return (i);
599}
600
601static int
602eschan_setfragments(kobj_t obj, void *data, uint32_t blksz, uint32_t blkcnt)
603{
604 struct es_chinfo *ch = data;
605 struct es_info *es = ch->parent;
606
607 blksz &= ES_BLK_ALIGN;
608
609 if (blksz > (sndbuf_getmaxsize(ch->buffer) / ES_DMA_SEGS_MIN))
610 blksz = sndbuf_getmaxsize(ch->buffer) / ES_DMA_SEGS_MIN;
611 if (blksz < ES_BLK_MIN)
612 blksz = ES_BLK_MIN;
613 if (blkcnt > ES_DMA_SEGS_MAX)
614 blkcnt = ES_DMA_SEGS_MAX;
615 if (blkcnt < ES_DMA_SEGS_MIN)
616 blkcnt = ES_DMA_SEGS_MIN;
617
618 while ((blksz * blkcnt) > sndbuf_getmaxsize(ch->buffer)) {
619 if ((blkcnt >> 1) >= ES_DMA_SEGS_MIN)
620 blkcnt >>= 1;
621 else if ((blksz >> 1) >= ES_BLK_MIN)
622 blksz >>= 1;
623 else
624 break;
625 }
626
627 if ((sndbuf_getblksz(ch->buffer) != blksz ||
628 sndbuf_getblkcnt(ch->buffer) != blkcnt) &&
629 sndbuf_resize(ch->buffer, blkcnt, blksz) != 0)
630 device_printf(es->dev, "%s: failed blksz=%u blkcnt=%u\n",
631 __func__, blksz, blkcnt);
632
633 ch->bufsz = sndbuf_getsize(ch->buffer);
634 ch->blksz = sndbuf_getblksz(ch->buffer);
635 ch->blkcnt = sndbuf_getblkcnt(ch->buffer);
636
637 return (1);
638}
639
640static int
641eschan_setblocksize(kobj_t obj, void *data, uint32_t blksz)
642{
643 struct es_chinfo *ch = data;
644 struct es_info *es = ch->parent;
645
646 eschan_setfragments(obj, data, blksz, es->blkcnt);
647
648 return (ch->blksz);
649}
650
651#define es_chan_active(es) ((es)->ch[ES_DAC1].active + \
652 (es)->ch[ES_DAC2].active + \
653 (es)->ch[ES_ADC].active)
654
655static __inline int
656es_poll_channel(struct es_chinfo *ch)
657{
658 struct es_info *es;
659 uint32_t sz, delta;
660 uint32_t reg, ptr;
661
662 if (ch == NULL || ch->channel == NULL || ch->active == 0)
663 return (0);
664
665 es = ch->parent;
666 if (ch->dir == PCMDIR_PLAY) {
667 if (ch->index == ES_DAC1)
668 reg = ES1370_REG_DAC1_FRAMECNT;
669 else
670 reg = ES1370_REG_DAC2_FRAMECNT;
671 } else
672 reg = ES1370_REG_ADC_FRAMECNT;
673 sz = ch->blksz * ch->blkcnt;
674 es_wr(es, ES1370_REG_MEMPAGE, reg >> 8, 4);
675 ptr = es_rd(es, reg & 0x000000ff, 4) >> 16;
676 ptr <<= 2;
677 ch->ptr = ptr;
678 ptr %= sz;
679 ptr &= ~(ch->blksz - 1);
680 delta = (sz + ptr - ch->prevptr) % sz;
681
682 if (delta < ch->blksz)
683 return (0);
684
685 ch->prevptr = ptr;
686
687 return (1);
688}
689
690static void
691es_poll_callback(void *arg)
692{
693 struct es_info *es = arg;
694 uint32_t trigger = 0;
695 int i;
696
697 if (es == NULL)
698 return;
699
700 ES_LOCK(es);
701 if (es->polling == 0 || es_chan_active(es) == 0) {
702 ES_UNLOCK(es);
703 return;
704 }
705
706 for (i = 0; i < ES_NCHANS; i++) {
707 if (es_poll_channel(&es->ch[i]) != 0)
708 trigger |= 1 << i;
709 }
710
711 /* XXX */
712 callout_reset(&es->poll_timer, 1/*es->poll_ticks*/,
713 es_poll_callback, es);
714
715 ES_UNLOCK(es);
716
717 for (i = 0; i < ES_NCHANS; i++) {
718 if (trigger & (1 << i))
719 chn_intr(es->ch[i].channel);
720 }
721}
722
723static int
724eschan_trigger(kobj_t obj, void *data, int go)
725{
726 struct es_chinfo *ch = data;
727 struct es_info *es = ch->parent;
728 uint32_t cnt, b = 0;
729
730 if (!PCMTRIG_COMMON(go))
731 return 0;
732
733 ES_LOCK(es);
734 cnt = (ch->blksz / sndbuf_getbps(ch->buffer)) - 1;
735 if (ch->fmt & AFMT_16BIT)
736 b |= 0x02;
737 if (ch->fmt & AFMT_STEREO)
738 b |= 0x01;
739 if (ch->dir == PCMDIR_PLAY) {
740 if (go == PCMTRIG_START) {
741 if (ch->index == ES_DAC1) {
742 es->ctrl |= CTRL_DAC1_EN;
743 es->sctrl &= ~(SCTRL_P1LOOPSEL |
744 SCTRL_P1PAUSE | SCTRL_P1SCTRLD);
745 if (es->polling == 0)
746 es->sctrl |= SCTRL_P1INTEN;
747 else
748 es->sctrl &= ~SCTRL_P1INTEN;
749 es->sctrl |= b;
750 es_wr(es, ES1370_REG_DAC1_SCOUNT, cnt, 4);
751 /* start at beginning of buffer */
752 es_wr(es, ES1370_REG_MEMPAGE,
753 ES1370_REG_DAC1_FRAMECNT >> 8, 4);
754 es_wr(es, ES1370_REG_DAC1_FRAMECNT & 0xff,
755 (ch->bufsz >> 2) - 1, 4);
756 } else {
757 es->ctrl |= CTRL_DAC2_EN;
758 es->sctrl &= ~(SCTRL_P2ENDINC | SCTRL_P2STINC |
759 SCTRL_P2LOOPSEL | SCTRL_P2PAUSE |
760 SCTRL_P2DACSEN);
761 if (es->polling == 0)
762 es->sctrl |= SCTRL_P2INTEN;
763 else
764 es->sctrl &= ~SCTRL_P2INTEN;
765 es->sctrl |= (b << 2) |
766 ((((b >> 1) & 1) + 1) << SCTRL_SH_P2ENDINC);
767 es_wr(es, ES1370_REG_DAC2_SCOUNT, cnt, 4);
768 /* start at beginning of buffer */
769 es_wr(es, ES1370_REG_MEMPAGE,
770 ES1370_REG_DAC2_FRAMECNT >> 8, 4);
771 es_wr(es, ES1370_REG_DAC2_FRAMECNT & 0xff,
772 (ch->bufsz >> 2) - 1, 4);
773 }
774 } else
775 es->ctrl &= ~((ch->index == ES_DAC1) ?
776 CTRL_DAC1_EN : CTRL_DAC2_EN);
777 } else {
778 if (go == PCMTRIG_START) {
779 es->ctrl |= CTRL_ADC_EN;
780 es->sctrl &= ~SCTRL_R1LOOPSEL;
781 if (es->polling == 0)
782 es->sctrl |= SCTRL_R1INTEN;
783 else
784 es->sctrl &= ~SCTRL_R1INTEN;
785 es->sctrl |= b << 4;
786 es_wr(es, ES1370_REG_ADC_SCOUNT, cnt, 4);
787 /* start at beginning of buffer */
788 es_wr(es, ES1370_REG_MEMPAGE,
789 ES1370_REG_ADC_FRAMECNT >> 8, 4);
790 es_wr(es, ES1370_REG_ADC_FRAMECNT & 0xff,
791 (ch->bufsz >> 2) - 1, 4);
792 } else
793 es->ctrl &= ~CTRL_ADC_EN;
794 }
795 es_wr(es, ES1370_REG_SERIAL_CONTROL, es->sctrl, 4);
796 es_wr(es, ES1370_REG_CONTROL, es->ctrl, 4);
797 if (go == PCMTRIG_START) {
798 if (es->polling != 0) {
799 ch->ptr = 0;
800 ch->prevptr = 0;
801 if (es_chan_active(es) == 0) {
802 es->poll_ticks = 1;
803 callout_reset(&es->poll_timer, 1,
804 es_poll_callback, es);
805 }
806 }
807 ch->active = 1;
808 } else {
809 ch->active = 0;
810 if (es->polling != 0) {
811 if (es_chan_active(es) == 0) {
812 callout_stop(&es->poll_timer);
813 es->poll_ticks = 1;
814 }
815 }
816 }
817 ES_UNLOCK(es);
818 return (0);
819}
820
821static int
822eschan_getptr(kobj_t obj, void *data)
823{
824 struct es_chinfo *ch = data;
825 struct es_info *es = ch->parent;
826 uint32_t reg, cnt;
827
828 ES_LOCK(es);
829 if (es->polling != 0)
830 cnt = ch->ptr;
831 else {
832 if (ch->dir == PCMDIR_PLAY) {
833 if (ch->index == ES_DAC1)
834 reg = ES1370_REG_DAC1_FRAMECNT;
835 else
836 reg = ES1370_REG_DAC2_FRAMECNT;
837 } else
838 reg = ES1370_REG_ADC_FRAMECNT;
839 es_wr(es, ES1370_REG_MEMPAGE, reg >> 8, 4);
840 cnt = es_rd(es, reg & 0x000000ff, 4) >> 16;
841 /* cnt is longwords */
842 cnt <<= 2;
843 }
844 ES_UNLOCK(es);
845
846 cnt &= ES_BLK_ALIGN;
847
848 return (cnt);
849}
850
851static struct pcmchan_caps *
852eschan_getcaps(kobj_t obj, void *data)
853{
854 struct es_chinfo *ch = data;
855
856 return (&ch->caps);
857}
858
859static kobj_method_t eschan1370_methods[] = {
860 KOBJMETHOD(channel_init, eschan_init),
861 KOBJMETHOD(channel_setformat, eschan_setformat),
862 KOBJMETHOD(channel_setspeed, eschan1370_setspeed),
863 KOBJMETHOD(channel_setblocksize, eschan_setblocksize),
864 KOBJMETHOD(channel_setfragments, eschan_setfragments),
865 KOBJMETHOD(channel_trigger, eschan_trigger),
866 KOBJMETHOD(channel_getptr, eschan_getptr),
867 KOBJMETHOD(channel_getcaps, eschan_getcaps),
868 { 0, 0 }
869};
870CHANNEL_DECLARE(eschan1370);
871
872static kobj_method_t eschan1371_methods[] = {
873 KOBJMETHOD(channel_init, eschan_init),
874 KOBJMETHOD(channel_setformat, eschan_setformat),
875 KOBJMETHOD(channel_setspeed, eschan1371_setspeed),
876 KOBJMETHOD(channel_setblocksize, eschan_setblocksize),
877 KOBJMETHOD(channel_setfragments, eschan_setfragments),
878 KOBJMETHOD(channel_trigger, eschan_trigger),
879 KOBJMETHOD(channel_getptr, eschan_getptr),
880 KOBJMETHOD(channel_getcaps, eschan_getcaps),
881 { 0, 0 }
882};
883CHANNEL_DECLARE(eschan1371);
884
885/* -------------------------------------------------------------------- */
886/* The interrupt handler */
887static void
888es_intr(void *p)
889{
890 struct es_info *es = p;
891 uint32_t intsrc, sctrl;
892
893 ES_LOCK(es);
894 if (es->polling != 0) {
895 ES_UNLOCK(es);
896 return;
897 }
898 intsrc = es_rd(es, ES1370_REG_STATUS, 4);
899 if ((intsrc & STAT_INTR) == 0) {
900 ES_UNLOCK(es);
901 return;
902 }
903
904 sctrl = es->sctrl;
905 if (intsrc & STAT_ADC)
906 sctrl &= ~SCTRL_R1INTEN;
907 if (intsrc & STAT_DAC1)
908 sctrl &= ~SCTRL_P1INTEN;
909 if (intsrc & STAT_DAC2)
910 sctrl &= ~SCTRL_P2INTEN;
911
912 es_wr(es, ES1370_REG_SERIAL_CONTROL, sctrl, 4);
913 es_wr(es, ES1370_REG_SERIAL_CONTROL, es->sctrl, 4);
914 ES_UNLOCK(es);
915
916 if (intsrc & STAT_ADC)
917 chn_intr(es->ch[ES_ADC].channel);
918 if (intsrc & STAT_DAC1)
919 chn_intr(es->ch[ES_DAC1].channel);
920 if (intsrc & STAT_DAC2)
921 chn_intr(es->ch[ES_DAC2].channel);
922}
923
924/* ES1370 specific */
925static int
926es1370_init(struct es_info *es)
927{
928 uint32_t fixed_rate;
929 int r, single_pcm;
930
931 /* ES1370 default to fixed rate operation */
932 if (resource_int_value(device_get_name(es->dev),
933 device_get_unit(es->dev), "fixed_rate", &r) == 0) {
934 fixed_rate = r;
935 if (fixed_rate) {
936 if (fixed_rate < es_caps.minspeed)
937 fixed_rate = es_caps.minspeed;
938 if (fixed_rate > es_caps.maxspeed)
939 fixed_rate = es_caps.maxspeed;
940 }
941 } else
942 fixed_rate = es_caps.maxspeed;
943
944 if (resource_int_value(device_get_name(es->dev),
945 device_get_unit(es->dev), "single_pcm_mixer", &r) == 0)
946 single_pcm = (r != 0) ? 1 : 0;
947 else
948 single_pcm = 1;
949
950 ES_LOCK(es);
951 if (ES_NUMPLAY(es->escfg) == 1)
952 single_pcm = 1;
953 /* This is ES1370 */
954 es->escfg = ES_SET_IS_ES1370(es->escfg, 1);
955 if (fixed_rate)
956 es->escfg = ES_SET_FIXED_RATE(es->escfg, fixed_rate);
957 else {
958 es->escfg = ES_SET_FIXED_RATE(es->escfg, 0);
959 fixed_rate = DSP_DEFAULT_SPEED;
960 }
961 if (single_pcm)
962 es->escfg = ES_SET_SINGLE_PCM_MIX(es->escfg, 1);
963 else
964 es->escfg = ES_SET_SINGLE_PCM_MIX(es->escfg, 0);
965 es->ctrl = CTRL_CDC_EN | CTRL_JYSTK_EN | CTRL_SERR_DIS |
966 (DAC2_SRTODIV(fixed_rate) << CTRL_SH_PCLKDIV);
967 es->ctrl |= 3 << CTRL_SH_WTSRSEL;
968 es_wr(es, ES1370_REG_CONTROL, es->ctrl, 4);
969
970 es->sctrl = 0;
971 es_wr(es, ES1370_REG_SERIAL_CONTROL, es->sctrl, 4);
972
973 /* No RST, PD */
974 es1370_wrcodec(es, CODEC_RES_PD, 3);
975 /*
976 * CODEC ADC and CODEC DAC use {LR,B}CLK2 and run off the LRCLK2 PLL;
977 * program DAC_SYNC=0!
978 */
979 es1370_wrcodec(es, CODEC_CSEL, 0);
980 /* Recording source is mixer */
981 es1370_wrcodec(es, CODEC_ADSEL, 0);
982 /* MIC amp is 0db */
983 es1370_wrcodec(es, CODEC_MGAIN, 0);
984 ES_UNLOCK(es);
985
986 return (0);
987}
988
989/* ES1371 specific */
990int
991es1371_init(struct es_info *es)
992{
993 uint32_t cssr, devid, revid, subdev;
994 int idx;
995
996 ES_LOCK(es);
997 /* This is NOT ES1370 */
998 es->escfg = ES_SET_IS_ES1370(es->escfg, 0);
999 es->num = 0;
1000 es->sctrl = 0;
1001 cssr = 0;
1002 devid = pci_get_devid(es->dev);
1003 revid = pci_get_revid(es->dev);
1004 subdev = (pci_get_subdevice(es->dev) << 16) |
1005 pci_get_subvendor(es->dev);
1006 /*
1007 * Joyport blacklist. Either we're facing with broken hardware
1008 * or because this hardware need special (unknown) initialization
1009 * procedures.
1010 */
1011 switch (subdev) {
1012 case 0x20001274: /* old Ensoniq */
1013 es->ctrl = 0;
1014 break;
1015 default:
1016 es->ctrl = CTRL_JYSTK_EN;
1017 break;
1018 }
1019 if (devid == CT4730_PCI_ID) {
1020 /* XXX amplifier hack? */
1021 es->ctrl |= (1 << 16);
1022 }
1023 /* initialize the chips */
1024 es_wr(es, ES1370_REG_CONTROL, es->ctrl, 4);
1025 es_wr(es, ES1370_REG_SERIAL_CONTROL, es->sctrl, 4);
1026 es_wr(es, ES1371_REG_LEGACY, 0, 4);
1027 if ((devid == ES1371_PCI_ID && revid == ES1371REV_ES1373_8) ||
1028 (devid == ES1371_PCI_ID && revid == ES1371REV_CT5880_A) ||
1029 (devid == CT5880_PCI_ID && revid == CT5880REV_CT5880_C) ||
1030 (devid == CT5880_PCI_ID && revid == CT5880REV_CT5880_D) ||
1031 (devid == CT5880_PCI_ID && revid == CT5880REV_CT5880_E)) {
1032 cssr = 1 << 29;
1033 es_wr(es, ES1370_REG_STATUS, cssr, 4);
1034 DELAY(20000);
1035 }
1036 /* AC'97 warm reset to start the bitclk */
1037 es_wr(es, ES1370_REG_CONTROL, es->ctrl, 4);
1038 es_wr(es, ES1371_REG_LEGACY, ES1371_SYNC_RES, 4);
1039 DELAY(2000);
1040 es_wr(es, ES1370_REG_CONTROL, es->sctrl, 4);
1041 es1371_wait_src_ready(es);
1042 /* Init the sample rate converter */
1043 es_wr(es, ES1371_REG_SMPRATE, ES1371_DIS_SRC, 4);
1044 for (idx = 0; idx < 0x80; idx++)
1045 es1371_src_write(es, idx, 0);
1046 es1371_src_write(es, ES_SMPREG_DAC1 + ES_SMPREG_TRUNC_N, 16 << 4);
1047 es1371_src_write(es, ES_SMPREG_DAC1 + ES_SMPREG_INT_REGS, 16 << 10);
1048 es1371_src_write(es, ES_SMPREG_DAC2 + ES_SMPREG_TRUNC_N, 16 << 4);
1049 es1371_src_write(es, ES_SMPREG_DAC2 + ES_SMPREG_INT_REGS, 16 << 10);
1050 es1371_src_write(es, ES_SMPREG_VOL_ADC, 1 << 12);
1051 es1371_src_write(es, ES_SMPREG_VOL_ADC + 1, 1 << 12);
1052 es1371_src_write(es, ES_SMPREG_VOL_DAC1, 1 << 12);
1053 es1371_src_write(es, ES_SMPREG_VOL_DAC1 + 1, 1 << 12);
1054 es1371_src_write(es, ES_SMPREG_VOL_DAC2, 1 << 12);
1055 es1371_src_write(es, ES_SMPREG_VOL_DAC2 + 1, 1 << 12);
1056 es1371_adc_rate(es, 22050, ES_ADC);
1057 es1371_dac_rate(es, 22050, ES_DAC1);
1058 es1371_dac_rate(es, 22050, ES_DAC2);
1059 /*
1060 * WARNING:
1061 * enabling the sample rate converter without properly programming
1062 * its parameters causes the chip to lock up (the SRC busy bit will
1063 * be stuck high, and I've found no way to rectify this other than
1064 * power cycle)
1065 */
1066 es1371_wait_src_ready(es);
1067 es_wr(es, ES1371_REG_SMPRATE, 0, 4);
1068 /* try to reset codec directly */
1069 es_wr(es, ES1371_REG_CODEC, 0, 4);
1070 es_wr(es, ES1370_REG_STATUS, cssr, 4);
1071 ES_UNLOCK(es);
1072
1073 return (0);
1074}
1075
1076/* -------------------------------------------------------------------- */
1077
1078static int
1079es1371_wrcd(kobj_t obj, void *s, int addr, uint32_t data)
1080{
1081 uint32_t t, x, orig;
1082 struct es_info *es = (struct es_info*)s;
1083
1084 for (t = 0; t < 0x1000; t++) {
1085 if (!es_rd(es, ES1371_REG_CODEC & CODEC_WIP, 4))
1086 break;
1087 }
1088 /* save the current state for later */
1089 x = orig = es_rd(es, ES1371_REG_SMPRATE, 4);
1090 /* enable SRC state data in SRC mux */
1091 es_wr(es, ES1371_REG_SMPRATE, (x & (ES1371_DIS_SRC | ES1371_DIS_P1 |
1092 ES1371_DIS_P2 | ES1371_DIS_R1)) | 0x00010000, 4);
1093 /* busy wait */
1094 for (t = 0; t < 0x1000; t++) {
1095 if ((es_rd(es, ES1371_REG_SMPRATE, 4) & 0x00870000) ==
1096 0x00000000)
1097 break;
1098 }
1099 /* wait for a SAFE time to write addr/data and then do it, dammit */
1100 for (t = 0; t < 0x1000; t++) {
1101 if ((es_rd(es, ES1371_REG_SMPRATE, 4) & 0x00870000) ==
1102 0x00010000)
1103 break;
1104 }
1105
1106 es_wr(es, ES1371_REG_CODEC, ((addr << CODEC_POADD_SHIFT) &
1107 CODEC_POADD_MASK) | ((data << CODEC_PODAT_SHIFT) &
1108 CODEC_PODAT_MASK), 4);
1109 /* restore SRC reg */
1110 es1371_wait_src_ready(s);
1111 es_wr(es, ES1371_REG_SMPRATE, orig, 4);
1112
1113 return (0);
1114}
1115
1116static int
1117es1371_rdcd(kobj_t obj, void *s, int addr)
1118{
1119 uint32_t t, x, orig;
1120 struct es_info *es = (struct es_info *)s;
1121
1122 for (t = 0; t < 0x1000; t++) {
1123 if (!(x = es_rd(es, ES1371_REG_CODEC, 4) & CODEC_WIP))
1124 break;
1125 }
1126
1127 /* save the current state for later */
1128 x = orig = es_rd(es, ES1371_REG_SMPRATE, 4);
1129 /* enable SRC state data in SRC mux */
1130 es_wr(es, ES1371_REG_SMPRATE, (x & (ES1371_DIS_SRC | ES1371_DIS_P1 |
1131 ES1371_DIS_P2 | ES1371_DIS_R1)) | 0x00010000, 4);
1132 /* busy wait */
1133 for (t = 0; t < 0x1000; t++) {
1134 if ((x = es_rd(es, ES1371_REG_SMPRATE, 4) & 0x00870000) ==
1135 0x00000000)
1136 break;
1137 }
1138 /* wait for a SAFE time to write addr/data and then do it, dammit */
1139 for (t = 0; t < 0x1000; t++) {
1140 if ((x = es_rd(es, ES1371_REG_SMPRATE, 4) & 0x00870000) ==
1141 0x00010000)
1142 break;
1143 }
1144
1145 es_wr(es, ES1371_REG_CODEC, ((addr << CODEC_POADD_SHIFT) &
1146 CODEC_POADD_MASK) | CODEC_PORD, 4);
1147
1148 /* restore SRC reg */
1149 es1371_wait_src_ready(s);
1150 es_wr(es, ES1371_REG_SMPRATE, orig, 4);
1151
1152 /* now wait for the stinkin' data (RDY) */
1153 for (t = 0; t < 0x1000; t++) {
1154 if ((x = es_rd(es, ES1371_REG_CODEC, 4)) & CODEC_RDY)
1155 break;
1156 }
1157
1158 return ((x & CODEC_PIDAT_MASK) >> CODEC_PIDAT_SHIFT);
1159}
1160
1161static kobj_method_t es1371_ac97_methods[] = {
1162 KOBJMETHOD(ac97_read, es1371_rdcd),
1163 KOBJMETHOD(ac97_write, es1371_wrcd),
1164 { 0, 0 }
1165};
1166AC97_DECLARE(es1371_ac97);
1167
1168/* -------------------------------------------------------------------- */
1169
1170static unsigned int
1171es1371_src_read(struct es_info *es, unsigned short reg)
1172{
1173 uint32_t r;
1174
1175 r = es1371_wait_src_ready(es) & (ES1371_DIS_SRC | ES1371_DIS_P1 |
1176 ES1371_DIS_P2 | ES1371_DIS_R1);
1177 r |= ES1371_SRC_RAM_ADDRO(reg);
1178 es_wr(es, ES1371_REG_SMPRATE, r, 4);
1179 return (ES1371_SRC_RAM_DATAI(es1371_wait_src_ready(es)));
1180}
1181
1182static void
1183es1371_src_write(struct es_info *es, unsigned short reg, unsigned short data)
1184{
1185 uint32_t r;
1186
1187 r = es1371_wait_src_ready(es) & (ES1371_DIS_SRC | ES1371_DIS_P1 |
1188 ES1371_DIS_P2 | ES1371_DIS_R1);
1189 r |= ES1371_SRC_RAM_ADDRO(reg) | ES1371_SRC_RAM_DATAO(data);
1190 es_wr(es, ES1371_REG_SMPRATE, r | ES1371_SRC_RAM_WE, 4);
1191}
1192
1193static unsigned int
1194es1371_adc_rate(struct es_info *es, unsigned int rate, int set)
1195{
1196 unsigned int n, truncm, freq, result;
1197
1198 ES_LOCK_ASSERT(es);
1199
1200 if (rate > 48000)
1201 rate = 48000;
1202 if (rate < 4000)
1203 rate = 4000;
1204 n = rate / 3000;
1205 if ((1 << n) & ((1 << 15) | (1 << 13) | (1 << 11) | (1 << 9)))
1206 n--;
1207 truncm = (21 * n - 1) | 1;
1208 freq = ((48000UL << 15) / rate) * n;
1209 result = (48000UL << 15) / (freq / n);
1210 if (set) {
1211 if (rate >= 24000) {
1212 if (truncm > 239)
1213 truncm = 239;
1214 es1371_src_write(es, ES_SMPREG_ADC + ES_SMPREG_TRUNC_N,
1215 (((239 - truncm) >> 1) << 9) | (n << 4));
1216 } else {
1217 if (truncm > 119)
1218 truncm = 119;
1219 es1371_src_write(es, ES_SMPREG_ADC + ES_SMPREG_TRUNC_N,
1220 0x8000 | (((119 - truncm) >> 1) << 9) | (n << 4));
1221 }
1222 es1371_src_write(es, ES_SMPREG_ADC + ES_SMPREG_INT_REGS,
1223 (es1371_src_read(es, ES_SMPREG_ADC + ES_SMPREG_INT_REGS) &
1224 0x00ff) | ((freq >> 5) & 0xfc00));
1225 es1371_src_write(es, ES_SMPREG_ADC + ES_SMPREG_VFREQ_FRAC,
1226 freq & 0x7fff);
1227 es1371_src_write(es, ES_SMPREG_VOL_ADC, n << 8);
1228 es1371_src_write(es, ES_SMPREG_VOL_ADC + 1, n << 8);
1229 }
1230 return (result);
1231}
1232
1233static unsigned int
1234es1371_dac_rate(struct es_info *es, unsigned int rate, int set)
1235{
1236 unsigned int freq, r, result, dac, dis;
1237
1238 ES_LOCK_ASSERT(es);
1239
1240 if (rate > 48000)
1241 rate = 48000;
1242 if (rate < 4000)
1243 rate = 4000;
1244 freq = ((rate << 15) + 1500) / 3000;
1245 result = (freq * 3000) >> 15;
1246
1247 dac = (set == ES_DAC1) ? ES_SMPREG_DAC1 : ES_SMPREG_DAC2;
1248 dis = (set == ES_DAC1) ? ES1371_DIS_P2 : ES1371_DIS_P1;
1249 r = (es1371_wait_src_ready(es) & (ES1371_DIS_SRC | ES1371_DIS_P1 |
1250 ES1371_DIS_P2 | ES1371_DIS_R1));
1251 es_wr(es, ES1371_REG_SMPRATE, r, 4);
1252 es1371_src_write(es, dac + ES_SMPREG_INT_REGS,
1253 (es1371_src_read(es, dac + ES_SMPREG_INT_REGS) & 0x00ff) |
1254 ((freq >> 5) & 0xfc00));
1255 es1371_src_write(es, dac + ES_SMPREG_VFREQ_FRAC, freq & 0x7fff);
1256 r = (es1371_wait_src_ready(es) &
1257 (ES1371_DIS_SRC | dis | ES1371_DIS_R1));
1258 es_wr(es, ES1371_REG_SMPRATE, r, 4);
1259 return (result);
1260}
1261
1262static uint32_t
1263es1371_wait_src_ready(struct es_info *es)
1264{
1265 uint32_t t, r;
1266
1267 for (t = 0; t < 0x1000; t++) {
1268 if (!((r = es_rd(es, ES1371_REG_SMPRATE, 4)) &
1269 ES1371_SRC_RAM_BUSY))
1270 return (r);
1271 DELAY(1);
1272 }
1273 device_printf(es->dev, "%s: timed out 0x%x [0x%x]\n", __func__,
1274 ES1371_REG_SMPRATE, r);
1275 return (0);
1276}
1277
1278/* -------------------------------------------------------------------- */
1279
1280/*
1281 * Probe and attach the card
1282 */
1283
1284static int
1285es_pci_probe(device_t dev)
1286{
1287 switch(pci_get_devid(dev)) {
1288 case ES1370_PCI_ID:
1289 device_set_desc(dev, "AudioPCI ES1370");
1290 return (BUS_PROBE_DEFAULT);
1291 case ES1371_PCI_ID:
1292 switch(pci_get_revid(dev)) {
1293 case ES1371REV_ES1371_A:
1294 device_set_desc(dev, "AudioPCI ES1371-A");
1295 return (BUS_PROBE_DEFAULT);
1296 case ES1371REV_ES1371_B:
1297 device_set_desc(dev, "AudioPCI ES1371-B");
1298 return (BUS_PROBE_DEFAULT);
1299 case ES1371REV_ES1373_A:
1300 device_set_desc(dev, "AudioPCI ES1373-A");
1301 return (BUS_PROBE_DEFAULT);
1302 case ES1371REV_ES1373_B:
1303 device_set_desc(dev, "AudioPCI ES1373-B");
1304 return (BUS_PROBE_DEFAULT);
1305 case ES1371REV_ES1373_8:
1306 device_set_desc(dev, "AudioPCI ES1373-8");
1307 return (BUS_PROBE_DEFAULT);
1308 case ES1371REV_CT5880_A:
1309 device_set_desc(dev, "Creative CT5880-A");
1310 return (BUS_PROBE_DEFAULT);
1311 default:
1312 device_set_desc(dev, "AudioPCI ES1371-?");
1313 device_printf(dev,
1314 "unknown revision %d -- please report to "
1315 "freebsd-multimedia@freebsd.org\n",
1316 pci_get_revid(dev));
1317 return (BUS_PROBE_DEFAULT);
1318 }
1319 case ES1371_PCI_ID2:
1320 device_set_desc(dev, "Strange AudioPCI ES1371-? (vid=3274)");
1321 device_printf(dev,
1322 "unknown revision %d -- please report to "
1323 "freebsd-multimedia@freebsd.org\n", pci_get_revid(dev));
1324 return (BUS_PROBE_DEFAULT);
1325 case CT4730_PCI_ID:
1326 switch(pci_get_revid(dev)) {
1327 case CT4730REV_CT4730_A:
1328 device_set_desc(dev,
1329 "Creative SB AudioPCI CT4730/EV1938");
1330 return (BUS_PROBE_DEFAULT);
1331 default:
1332 device_set_desc(dev, "Creative SB AudioPCI CT4730-?");
1333 device_printf(dev,
1334 "unknown revision %d -- please report to "
1335 "freebsd-multimedia@freebsd.org\n",
1336 pci_get_revid(dev));
1337 return (BUS_PROBE_DEFAULT);
1338 }
1339 case CT5880_PCI_ID:
1340 switch(pci_get_revid(dev)) {
1341 case CT5880REV_CT5880_C:
1342 device_set_desc(dev, "Creative CT5880-C");
1343 return (BUS_PROBE_DEFAULT);
1344 case CT5880REV_CT5880_D:
1345 device_set_desc(dev, "Creative CT5880-D");
1346 return (BUS_PROBE_DEFAULT);
1347 case CT5880REV_CT5880_E:
1348 device_set_desc(dev, "Creative CT5880-E");
1349 return (BUS_PROBE_DEFAULT);
1350 default:
1351 device_set_desc(dev, "Creative CT5880-?");
1352 device_printf(dev,
1353 "unknown revision %d -- please report to "
1354 "freebsd-multimedia@freebsd.org\n",
1355 pci_get_revid(dev));
1356 return (BUS_PROBE_DEFAULT);
1357 }
1358 default:
1359 return (ENXIO);
1360 }
1361}
1362
1363#ifdef SND_DYNSYSCTL
1364static int
1365sysctl_es137x_spdif_enable(SYSCTL_HANDLER_ARGS)
1366{
1367 struct es_info *es;
1368 device_t dev;
1369 uint32_t r;
1370 int err, new_en;
1371
1372 dev = oidp->oid_arg1;
1373 es = pcm_getdevinfo(dev);
1374 ES_LOCK(es);
1375 r = es_rd(es, ES1370_REG_STATUS, 4);
1376 ES_UNLOCK(es);
1377 new_en = (r & ENABLE_SPDIF) ? 1 : 0;
1378 err = sysctl_handle_int(oidp, &new_en, 0, req);
1379
1380 if (err || req->newptr == NULL)
1381 return (err);
1382 if (new_en < 0 || new_en > 1)
1383 return (EINVAL);
1384
1385 ES_LOCK(es);
1386 if (new_en) {
1387 r |= ENABLE_SPDIF;
1388 es->ctrl |= SPDIFEN_B;
1389 es->ctrl |= RECEN_B;
1390 } else {
1391 r &= ~ENABLE_SPDIF;
1392 es->ctrl &= ~SPDIFEN_B;
1393 es->ctrl &= ~RECEN_B;
1394 }
1395 es_wr(es, ES1370_REG_CONTROL, es->ctrl, 4);
1396 es_wr(es, ES1370_REG_STATUS, r, 4);
1397 ES_UNLOCK(es);
1398
1399 return (0);
1400}
1401
1402static int
1403sysctl_es137x_latency_timer(SYSCTL_HANDLER_ARGS)
1404{
1405 struct es_info *es;
1406 device_t dev;
1407 uint32_t val;
1408 int err;
1409
1410 dev = oidp->oid_arg1;
1411 es = pcm_getdevinfo(dev);
1412 ES_LOCK(es);
1413 val = pci_read_config(dev, PCIR_LATTIMER, 1);
1414 ES_UNLOCK(es);
1415 err = sysctl_handle_int(oidp, &val, 0, req);
1416
1417 if (err || req->newptr == NULL)
1418 return (err);
1419 if (val > 255)
1420 return (EINVAL);
1421
1422 ES_LOCK(es);
1423 pci_write_config(dev, PCIR_LATTIMER, val, 1);
1424 ES_UNLOCK(es);
1425
1426 return (0);
1427}
1428
1429static int
1430sysctl_es137x_fixed_rate(SYSCTL_HANDLER_ARGS)
1431{
1432 struct es_info *es;
1433 device_t dev;
1434 uint32_t val;
1435 int err;
1436
1437 dev = oidp->oid_arg1;
1438 es = pcm_getdevinfo(dev);
1439 ES_LOCK(es);
1440 val = ES_FIXED_RATE(es->escfg);
1441 if (val < es_caps.minspeed)
1442 val = 0;
1443 ES_UNLOCK(es);
1444 err = sysctl_handle_int(oidp, &val, 0, req);
1445
1446 if (err || req->newptr == NULL)
1447 return (err);
1448 if (val != 0 && (val < es_caps.minspeed || val > es_caps.maxspeed))
1449 return (EINVAL);
1450
1451 ES_LOCK(es);
1452 if (es->ctrl & (CTRL_DAC2_EN|CTRL_ADC_EN)) {
1453 ES_UNLOCK(es);
1454 return (EBUSY);
1455 }
1456 if (val) {
1457 if (val != ES_FIXED_RATE(es->escfg)) {
1458 es->escfg = ES_SET_FIXED_RATE(es->escfg, val);
1459 es->ch[ES_DAC2].caps.maxspeed = val;
1460 es->ch[ES_DAC2].caps.minspeed = val;
1461 es->ch[ES_ADC].caps.maxspeed = val;
1462 es->ch[ES_ADC].caps.minspeed = val;
1463 es->ctrl &= ~CTRL_PCLKDIV;
1464 es->ctrl |= DAC2_SRTODIV(val) << CTRL_SH_PCLKDIV;
1465 es_wr(es, ES1370_REG_CONTROL, es->ctrl, 4);
1466 }
1467 } else {
1468 es->escfg = ES_SET_FIXED_RATE(es->escfg, 0);
1469 es->ch[ES_DAC2].caps = es_caps;
1470 es->ch[ES_ADC].caps = es_caps;
1471 }
1472 ES_UNLOCK(es);
1473
1474 return (0);
1475}
1476
1477static int
1478sysctl_es137x_single_pcm_mixer(SYSCTL_HANDLER_ARGS)
1479{
1480 struct es_info *es;
1481 struct snddev_info *d;
1482 struct snd_mixer *m;
1483 struct cdev *i_dev;
1484 device_t dev;
1485 uint32_t val, set;
1486 int recsrc, level, err;
1487
1488 dev = oidp->oid_arg1;
1489 d = device_get_softc(dev);
1490 if (d == NULL || d->mixer_dev == NULL || d->mixer_dev->si_drv1 == NULL)
1491 return (EINVAL);
1492 es = d->devinfo;
1493 if (es == NULL)
1494 return (EINVAL);
1495 ES_LOCK(es);
1496 set = ES_SINGLE_PCM_MIX(es->escfg);
1497 val = set;
1498 ES_UNLOCK(es);
1499 err = sysctl_handle_int(oidp, &val, 0, req);
1500
1501 if (err || req->newptr == NULL)
1502 return (err);
1503 if (!(val == 0 || val == 1))
1504 return (EINVAL);
1505 if (val == set)
1506 return (0);
1507 i_dev = d->mixer_dev;
1508 if (mixer_ioctl(i_dev, 0, (caddr_t)&recsrc, 0, NULL) != EBADF)
1509 return (EBUSY);
1510 err = mixer_ioctl(i_dev, MIXER_READ(SOUND_MIXER_PCM), (caddr_t)&level,
1511 -1, NULL);
1512 if (!err)
1513 err = mixer_ioctl(i_dev, MIXER_READ(SOUND_MIXER_RECSRC),
1514 (caddr_t)&recsrc, -1, NULL);
1515 if (err)
1516 return (err);
1517 if (level < 0)
1518 return (EINVAL);
1519
1520 ES_LOCK(es);
1521 if (es->ctrl & (CTRL_ADC_EN | CTRL_DAC1_EN | CTRL_DAC2_EN)) {
1522 ES_UNLOCK(es);
1523 return (EBUSY);
1524 }
1525 if (val)
1526 es->escfg = ES_SET_SINGLE_PCM_MIX(es->escfg, 1);
1527 else
1528 es->escfg = ES_SET_SINGLE_PCM_MIX(es->escfg, 0);
1529 ES_UNLOCK(es);
1530 m = i_dev->si_drv1;
1531 if (!val) {
1532 mix_setdevs(m, mix_getdevs(d->mixer_dev->si_drv1) |
1533 (1 << SOUND_MIXER_SYNTH));
1534 mix_setrecdevs(m, mix_getrecdevs(d->mixer_dev->si_drv1) |
1535 (1 << SOUND_MIXER_SYNTH));
1536 err = mixer_ioctl(i_dev, MIXER_WRITE(SOUND_MIXER_SYNTH),
1537 (caddr_t)&level, -1, NULL);
1538 } else {
1539 err = mixer_ioctl(i_dev, MIXER_WRITE(SOUND_MIXER_SYNTH),
1540 (caddr_t)&level, -1, NULL);
1541 mix_setdevs(m, mix_getdevs(d->mixer_dev->si_drv1) &
1542 ~(1 << SOUND_MIXER_SYNTH));
1543 mix_setrecdevs(m, mix_getrecdevs(d->mixer_dev->si_drv1) &
1544 ~(1 << SOUND_MIXER_SYNTH));
1545 }
1546 if (!err) {
1547 level = recsrc;
1548 if (recsrc & (1 << SOUND_MIXER_PCM))
1549 recsrc |= 1 << SOUND_MIXER_SYNTH;
1550 else if (recsrc & (1 << SOUND_MIXER_SYNTH))
1551 recsrc |= 1 << SOUND_MIXER_PCM;
1552 if (level != recsrc)
1553 err = mixer_ioctl(i_dev,
1554 MIXER_WRITE(SOUND_MIXER_RECSRC),
1555 (caddr_t)&recsrc, -1, NULL);
1556 }
1557 return (err);
1558}
1559
1560static int
1561sysctl_es_polling(SYSCTL_HANDLER_ARGS)
1562{
1563 struct es_info *es;
1564 device_t dev;
1565 int err, val;
1566
1567 dev = oidp->oid_arg1;
1568 es = pcm_getdevinfo(dev);
1569 if (es == NULL)
1570 return (EINVAL);
1571 ES_LOCK(es);
1572 val = es->polling;
1573 ES_UNLOCK(es);
1574 err = sysctl_handle_int(oidp, &val, 0, req);
1575
1576 if (err || req->newptr == NULL)
1577 return (err);
1578 if (val < 0 || val > 1)
1579 return (EINVAL);
1580
1581 ES_LOCK(es);
1582 if (val != es->polling) {
1583 if (es_chan_active(es) != 0)
1584 err = EBUSY;
1585 else if (val == 0)
1586 es->polling = 0;
1587 else
1588 es->polling = 1;
1589 }
1590 ES_UNLOCK(es);
1591
1592 return (err);
1593}
1594#endif /* SND_DYNSYSCTL */
1595
1596static void
1597es_init_sysctls(device_t dev)
1598{
1599#ifdef SND_DYNSYSCTL
1600 struct es_info *es;
1601 int r, devid, revid;
1602
1603 devid = pci_get_devid(dev);
1604 revid = pci_get_revid(dev);
1605 es = pcm_getdevinfo(dev);
1606 if ((devid == ES1371_PCI_ID && revid == ES1371REV_ES1373_8) ||
1607 (devid == ES1371_PCI_ID && revid == ES1371REV_CT5880_A) ||
1608 (devid == CT5880_PCI_ID && revid == CT5880REV_CT5880_C) ||
1609 (devid == CT5880_PCI_ID && revid == CT5880REV_CT5880_D) ||
1610 (devid == CT5880_PCI_ID && revid == CT5880REV_CT5880_E)) {
1611 /* XXX: an user should be able to set this with a control tool,
1612 if not done before 7.0-RELEASE, this needs to be converted
1613 to a device specific sysctl "dev.pcm.X.yyy" via
1614 device_get_sysctl_*() as discussed on multimedia@ in msg-id
1615 <861wujij2q.fsf@xps.des.no> */
1616 SYSCTL_ADD_PROC(device_get_sysctl_ctx(dev),
1617 SYSCTL_CHILDREN(device_get_sysctl_tree(dev)), OID_AUTO,
1618 "spdif_enabled", CTLTYPE_INT | CTLFLAG_RW, dev, sizeof(dev),
1619 sysctl_es137x_spdif_enable, "I",
1620 "Enable S/PDIF output on primary playback channel");
1621 } else if (devid == ES1370_PCI_ID) {
1622 /*
1623 * Enable fixed rate sysctl if both DAC2 / ADC enabled.
1624 */
1625 if (es->ch[ES_DAC2].channel != NULL &&
1626 es->ch[ES_ADC].channel != NULL) {
1627 /* XXX: an user should be able to set this with a control tool,
1628 if not done before 7.0-RELEASE, this needs to be converted
1629 to a device specific sysctl "dev.pcm.X.yyy" via
1630 device_get_sysctl_*() as discussed on multimedia@ in msg-id
1631 <861wujij2q.fsf@xps.des.no> */
1632 SYSCTL_ADD_PROC(device_get_sysctl_ctx(dev),
1633 SYSCTL_CHILDREN(device_get_sysctl_tree(dev)),
1634 OID_AUTO, "fixed_rate", CTLTYPE_INT | CTLFLAG_RW,
1635 dev, sizeof(dev), sysctl_es137x_fixed_rate, "I",
1636 "Enable fixed rate playback/recording");
1637 }
1638 /*
1639 * Enable single pcm mixer sysctl if both DAC1/2 enabled.
1640 */
1641 if (es->ch[ES_DAC1].channel != NULL &&
1642 es->ch[ES_DAC2].channel != NULL) {
1643 /* XXX: an user should be able to set this with a control tool,
1644 if not done before 7.0-RELEASE, this needs to be converted
1645 to a device specific sysctl "dev.pcm.X.yyy" via
1646 device_get_sysctl_*() as discussed on multimedia@ in msg-id
1647 <861wujij2q.fsf@xps.des.no> */
1648 SYSCTL_ADD_PROC(device_get_sysctl_ctx(dev),
1649 SYSCTL_CHILDREN(device_get_sysctl_tree(dev)),
1650 OID_AUTO, "single_pcm_mixer",
1651 CTLTYPE_INT | CTLFLAG_RW, dev, sizeof(dev),
1652 sysctl_es137x_single_pcm_mixer, "I",
1653 "Single PCM mixer controller for both DAC1/DAC2");
1654 }
1655 }
1656 if (resource_int_value(device_get_name(dev), device_get_unit(dev),
1657 "latency_timer", &r) == 0 && !(r < 0 || r > 255))
1658 pci_write_config(dev, PCIR_LATTIMER, r, 1);
1659 /* XXX: this needs to be converted to a device specific sysctl
1660 "dev.pcm.X.yyy" via device_get_sysctl_*() as discussed on
1661 multimedia@ in msg-id <861wujij2q.fsf@xps.des.no> */
1662 SYSCTL_ADD_PROC(device_get_sysctl_ctx(dev),
1663 SYSCTL_CHILDREN(device_get_sysctl_tree(dev)), OID_AUTO,
1664 "latency_timer", CTLTYPE_INT | CTLFLAG_RW, dev, sizeof(dev),
1665 sysctl_es137x_latency_timer, "I",
1666 "PCI Latency Timer configuration");
1667 SYSCTL_ADD_PROC(device_get_sysctl_ctx(dev),
1668 SYSCTL_CHILDREN(device_get_sysctl_tree(dev)), OID_AUTO,
1669 "polling", CTLTYPE_INT | CTLFLAG_RW, dev, sizeof(dev),
1670 sysctl_es_polling, "I",
1671 "Enable polling mode");
1672#endif /* SND_DYNSYSCTL */
1673}
1674
1675static int
1676es_pci_attach(device_t dev)
1677{
1678 uint32_t data;
1679 struct es_info *es = NULL;
1680 int mapped, i, numplay, dac_cfg;
1681 char status[SND_STATUSLEN];
1682 struct ac97_info *codec = NULL;
1683 kobj_class_t ct = NULL;
1684 uint32_t devid;
1685
1686 if ((es = malloc(sizeof *es, M_DEVBUF, M_NOWAIT | M_ZERO)) == NULL) {
1687 device_printf(dev, "cannot allocate softc\n");
1688 return (ENXIO);
1689 }
1690 es->lock = snd_mtxcreate(device_get_nameunit(dev), "snd_es137x softc");
1691 es->dev = dev;
1692 es->escfg = 0;
1693 mapped = 0;
1694
1695 pci_enable_busmaster(dev);
1696 data = pci_read_config(dev, PCIR_COMMAND, 2);
1697 data |= (PCIM_CMD_PORTEN|PCIM_CMD_MEMEN);
1698 pci_write_config(dev, PCIR_COMMAND, data, 2);
1699 data = pci_read_config(dev, PCIR_COMMAND, 2);
1700 if (mapped == 0 && (data & PCIM_CMD_MEMEN)) {
1701 es->regid = MEM_MAP_REG;
1702 es->regtype = SYS_RES_MEMORY;
1703 es->reg = bus_alloc_resource_any(dev, es->regtype, &es->regid,
1704 RF_ACTIVE);
1705 if (es->reg)
1706 mapped++;
1707 }
1708 if (mapped == 0 && (data & PCIM_CMD_PORTEN)) {
1709 es->regid = PCIR_BAR(0);
1710 es->regtype = SYS_RES_IOPORT;
1711 es->reg = bus_alloc_resource_any(dev, es->regtype, &es->regid,
1712 RF_ACTIVE);
1713 if (es->reg)
1714 mapped++;
1715 }
1716 if (mapped == 0) {
1717 device_printf(dev, "unable to map register space\n");
1718 goto bad;
1719 }
1720
1721 es->st = rman_get_bustag(es->reg);
1722 es->sh = rman_get_bushandle(es->reg);
1723 callout_init(&es->poll_timer, CALLOUT_MPSAFE);
1724 es->poll_ticks = 1;
1725
1726 if (resource_int_value(device_get_name(dev),
1727 device_get_unit(dev), "polling", &i) == 0 && i != 0)
1728 es->polling = 1;
1729 else
1730 es->polling = 0;
1731
1732 es->bufsz = pcm_getbuffersize(dev, 4096, ES_DEFAULT_BUFSZ, 65536);
1733 if (resource_int_value(device_get_name(dev),
1734 device_get_unit(dev), "blocksize", &i) == 0 && i > 0) {
1735 i &= ES_BLK_ALIGN;
1736 if (i < ES_BLK_MIN)
1737 i = ES_BLK_MIN;
1738 es->blkcnt = es->bufsz / i;
1739 i = 0;
1740 while (es->blkcnt >> i)
1741 i++;
1742 es->blkcnt = 1 << (i - 1);
1743 if (es->blkcnt < ES_DMA_SEGS_MIN)
1744 es->blkcnt = ES_DMA_SEGS_MIN;
1745 else if (es->blkcnt > ES_DMA_SEGS_MAX)
1746 es->blkcnt = ES_DMA_SEGS_MAX;
1747
1748 } else
1749 es->blkcnt = 2;
1750
1751 if (resource_int_value(device_get_name(dev), device_get_unit(dev),
1752 "dac", &dac_cfg) == 0) {
1753 if (dac_cfg < 0 || dac_cfg > 3)
1754 dac_cfg = ES_DEFAULT_DAC_CFG;
1755 } else
1756 dac_cfg = ES_DEFAULT_DAC_CFG;
1757
1758 switch (dac_cfg) {
1759 case 0: /* Enable all DAC: DAC1, DAC2 */
1760 numplay = 2;
1761 es->escfg = ES_SET_DAC_FIRST(es->escfg, ES_DAC1);
1762 es->escfg = ES_SET_DAC_SECOND(es->escfg, ES_DAC2);
1763 break;
1764 case 1: /* Only DAC1 */
1765 numplay = 1;
1766 es->escfg = ES_SET_DAC_FIRST(es->escfg, ES_DAC1);
1767 break;
1768 case 3: /* Enable all DAC / swap position: DAC2, DAC1 */
1769 numplay = 2;
1770 es->escfg = ES_SET_DAC_FIRST(es->escfg, ES_DAC2);
1771 es->escfg = ES_SET_DAC_SECOND(es->escfg, ES_DAC1);
1772 break;
1773 case 2: /* Only DAC2 */
1774 default:
1775 numplay = 1;
1776 es->escfg = ES_SET_DAC_FIRST(es->escfg, ES_DAC2);
1777 break;
1778 }
1779 es->escfg = ES_SET_NUMPLAY(es->escfg, numplay);
1780 es->escfg = ES_SET_NUMREC(es->escfg, 1);
1781
1782 devid = pci_get_devid(dev);
1783 switch (devid) {
1784 case ES1371_PCI_ID:
1785 case ES1371_PCI_ID2:
1786 case CT5880_PCI_ID:
1787 case CT4730_PCI_ID:
1788 es1371_init(es);
1789 codec = AC97_CREATE(dev, es, es1371_ac97);
1790 if (codec == NULL)
1791 goto bad;
1792 /* our init routine does everything for us */
1793 /* set to NULL; flag mixer_init not to run the ac97_init */
1794 /* ac97_mixer.init = NULL; */
1795 if (mixer_init(dev, ac97_getmixerclass(), codec))
1796 goto bad;
1797 ct = &eschan1371_class;
1798 break;
1799 case ES1370_PCI_ID:
1800 es1370_init(es);
1801 /*
1802 * Disable fixed rate operation if DAC2 disabled.
1803 * This is a special case for es1370 only, where the
1804 * speed of both ADC and DAC2 locked together.
1805 */
1806 if (!ES_DAC2_ENABLED(es->escfg))
1807 es->escfg = ES_SET_FIXED_RATE(es->escfg, 0);
1808 if (mixer_init(dev, &es1370_mixer_class, es))
1809 goto bad;
1810 ct = &eschan1370_class;
1811 break;
1812 default:
1813 goto bad;
1814 /* NOTREACHED */
1815 }
1816
1817 es->irqid = 0;
1818 es->irq = bus_alloc_resource_any(dev, SYS_RES_IRQ, &es->irqid,
1819 RF_ACTIVE | RF_SHAREABLE);
1820 if (!es->irq || snd_setup_intr(dev, es->irq, INTR_MPSAFE, es_intr,
1821 es, &es->ih)) {
1822 device_printf(dev, "unable to map interrupt\n");
1823 goto bad;
1824 }
1825
1826 if (bus_dma_tag_create(/*parent*/bus_get_dma_tag(dev),
1827 /*alignment*/2, /*boundary*/0,
1828 /*lowaddr*/BUS_SPACE_MAXADDR_32BIT,
1829 /*highaddr*/BUS_SPACE_MAXADDR,
1830 /*filter*/NULL, /*filterarg*/NULL,
1831 /*maxsize*/es->bufsz, /*nsegments*/1, /*maxsegz*/0x3ffff,
1832 /*flags*/0, /*lockfunc*/NULL,
1833 /*lockarg*/NULL, &es->parent_dmat) != 0) {
1834 device_printf(dev, "unable to create dma tag\n");
1835 goto bad;
1836 }
1837
1838 snprintf(status, SND_STATUSLEN, "at %s 0x%lx irq %ld %s",
1839 (es->regtype == SYS_RES_IOPORT)? "io" : "memory",
1840 rman_get_start(es->reg), rman_get_start(es->irq),
1841 PCM_KLDSTRING(snd_es137x));
1842
1843 if (pcm_register(dev, es, numplay, 1))
1844 goto bad;
1845 for (i = 0; i < numplay; i++)
1846 pcm_addchan(dev, PCMDIR_PLAY, ct, es);
1847 pcm_addchan(dev, PCMDIR_REC, ct, es);
1848 es_init_sysctls(dev);
1849 pcm_setstatus(dev, status);
1850 es->escfg = ES_SET_GP(es->escfg, 0);
1851 if (numplay == 1)
1852 device_printf(dev, "<Playback: DAC%d / Record: ADC>\n",
1853 ES_DAC_FIRST(es->escfg) + 1);
1854 else if (numplay == 2)
1855 device_printf(dev, "<Playback: DAC%d,DAC%d / Record: ADC>\n",
1856 ES_DAC_FIRST(es->escfg) + 1, ES_DAC_SECOND(es->escfg) + 1);
1857 return (0);
1858
1859bad:
1860 if (es->parent_dmat)
1861 bus_dma_tag_destroy(es->parent_dmat);
1862 if (es->ih)
1863 bus_teardown_intr(dev, es->irq, es->ih);
1864 if (es->irq)
1865 bus_release_resource(dev, SYS_RES_IRQ, es->irqid, es->irq);
1866 if (codec)
1867 ac97_destroy(codec);
1868 if (es->reg)
1869 bus_release_resource(dev, es->regtype, es->regid, es->reg);
1870 if (es->lock)
1871 snd_mtxfree(es->lock);
1872 if (es)
1873 free(es, M_DEVBUF);
1874 return (ENXIO);
1875}
1876
1877static int
1878es_pci_detach(device_t dev)
1879{
1880 int r;
1881 struct es_info *es;
1882
1883 r = pcm_unregister(dev);
1884 if (r)
1885 return (r);
1886
1887 es = pcm_getdevinfo(dev);
1888
1889 if (es != NULL && es->num != 0) {
1890 ES_LOCK(es);
1891 es->polling = 0;
1892 callout_stop(&es->poll_timer);
1893 ES_UNLOCK(es);
1894 callout_drain(&es->poll_timer);
1895 }
1896
1897 bus_teardown_intr(dev, es->irq, es->ih);
1898 bus_release_resource(dev, SYS_RES_IRQ, es->irqid, es->irq);
1899 bus_release_resource(dev, es->regtype, es->regid, es->reg);
1900 bus_dma_tag_destroy(es->parent_dmat);
1901 snd_mtxfree(es->lock);
1902 free(es, M_DEVBUF);
1903
1904 return (0);
1905}
1906
1907static device_method_t es_methods[] = {
1908 /* Device interface */
1909 DEVMETHOD(device_probe, es_pci_probe),
1910 DEVMETHOD(device_attach, es_pci_attach),
1911 DEVMETHOD(device_detach, es_pci_detach),
1912
1913 { 0, 0 }
1914};
1915
1916static driver_t es_driver = {
1917 "pcm",
1918 es_methods,
1919 PCM_SOFTC_SIZE,
1920};
1921
1922DRIVER_MODULE(snd_es137x, pci, es_driver, pcm_devclass, 0, 0);
1923MODULE_DEPEND(snd_es137x, sound, SOUND_MINVER, SOUND_PREFVER, SOUND_MAXVER);
1924MODULE_VERSION(snd_es137x, 1);