1/*
2 * Support the ENSONIQ AudioPCI board and Creative Labs SoundBlaster PCI
3 * boards based on the ES1370, ES1371 and ES1373 chips.
4 *
5 * Copyright (c) 1999 Russell Cattelan <cattelan@thebarn.com>
6 * Copyright (c) 1999 Cameron Grant <gandalf@vilnya.demon.co.uk>
7 * Copyright (c) 1998 by Joachim Kuebart. All rights reserved.
8 *
9 * Redistribution and use in source and binary forms, with or without
10 * modification, are permitted provided that the following conditions
11 * are met:
12 *
13 * 1. Redistributions of source code must retain the above copyright
14 * notice, this list of conditions and the following disclaimer.
15 *
16 * 2. Redistributions in binary form must reproduce the above copyright
17 * notice, this list of conditions and the following disclaimer in
18 * the documentation and/or other materials provided with the
19 * distribution.
20 *
21 * 3. All advertising materials mentioning features or use of this
22 * software must display the following acknowledgement:
23 * This product includes software developed by Joachim Kuebart.
24 *
25 * 4. The name of the author may not be used to endorse or promote
26 * products derived from this software without specific prior
27 * written permission.
28 *
29 * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
30 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
31 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
32 * DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT,
33 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
34 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
35 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
36 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
37 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
38 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
39 * OF THE POSSIBILITY OF SUCH DAMAGE.
40 *
41 * $FreeBSD: head/sys/dev/sound/pci/es137x.c 60958 2000-05-26 21:15:47Z cg $
42 */
43
44/*
45 * Part of this code was heavily inspired by the linux driver from
46 * Thomas Sailer (sailer@ife.ee.ethz.ch)
47 * Just about everything has been touched and reworked in some way but
48 * the all the underlying sequences/timing/register values are from
49 * Thomas' code.
50 *
51*/
52
53#include <dev/sound/pcm/sound.h>
54#include <dev/sound/pcm/ac97.h>
55#include <dev/sound/pci/es137x.h>
56
57#include <pci/pcireg.h>
58#include <pci/pcivar.h>
59
60#include <sys/sysctl.h>
61
62static int debug = 0;
63SYSCTL_INT(_debug, OID_AUTO, es_debug, CTLFLAG_RW, &debug, 0, "");
64
65#define MEM_MAP_REG 0x14
66
67/* PCI IDs of supported chips */
68#define ES1370_PCI_ID 0x50001274
69#define ES1371_PCI_ID 0x13711274
70#define ES1371_PCI_ID2 0x13713274
71
72#define ES_BUFFSIZE 4096
73
74/* device private data */
75struct es_info;
76
77struct es_chinfo {
78 struct es_info *parent;
79 pcm_channel *channel;
80 snd_dbuf *buffer;
81 int dir, num;
82 u_int32_t fmt;
83};
84
85struct es_info {
86 bus_space_tag_t st;
87 bus_space_handle_t sh;
88 bus_dma_tag_t parent_dmat;
89
90 device_t dev;
91 int num;
92 /* Contents of board's registers */
93 u_long ctrl;
94 u_long sctrl;
95 struct es_chinfo pch, rch;
96};
97
98/* -------------------------------------------------------------------- */
99
100/* prototypes */
101static void es_intr(void *);
102
103static void es1371_wrcodec(void *, int, u_int32_t);
104static u_int32_t es1371_rdcodec(void *, int);
105static u_int es1371_wait_src_ready(struct es_info *);
106static void es1371_src_write(struct es_info *, u_short, unsigned short);
107static u_int es1371_adc_rate(struct es_info *, u_int, int);
108static u_int es1371_dac_rate(struct es_info *, u_int, int);
109static int es1371_init(struct es_info *es, int);
110static int es1370_init(struct es_info *);
111static int es1370_wrcodec(struct es_info *, u_char, u_char);
112
113/* channel interface */
114static void *eschan_init(void *devinfo, snd_dbuf *b, pcm_channel *c, int dir);
115static int eschan_setdir(void *data, int dir);
116static int eschan_setformat(void *data, u_int32_t format);
117static int eschan1370_setspeed(void *data, u_int32_t speed);
118static int eschan1371_setspeed(void *data, u_int32_t speed);
119static int eschan_setblocksize(void *data, u_int32_t blocksize);
120static int eschan_trigger(void *data, int go);
121static int eschan_getptr(void *data);
122static pcmchan_caps *eschan_getcaps(void *data);
123
124static pcmchan_caps es_playcaps = {
125 4000, 48000,
126 AFMT_STEREO | AFMT_U8 | AFMT_S16_LE,
127 AFMT_STEREO | AFMT_S16_LE
128};
129
130static pcmchan_caps es_reccaps = {
131 4000, 48000,
132 AFMT_STEREO | AFMT_U8 | AFMT_S16_LE,
133 AFMT_STEREO | AFMT_S16_LE
134};
135
136static pcm_channel es1370_chantemplate = {
137 eschan_init,
138 eschan_setdir,
139 eschan_setformat,
140 eschan1370_setspeed,
141 eschan_setblocksize,
142 eschan_trigger,
143 eschan_getptr,
144 eschan_getcaps,
145};
146
147static pcm_channel es1371_chantemplate = {
148 eschan_init,
149 eschan_setdir,
150 eschan_setformat,
151 eschan1371_setspeed,
152 eschan_setblocksize,
153 eschan_trigger,
154 eschan_getptr,
155 eschan_getcaps,
156};
157
158/* -------------------------------------------------------------------- */
159
160/* The es1370 mixer interface */
161
162static int es1370_mixinit(snd_mixer *m);
163static int es1370_mixset(snd_mixer *m, unsigned dev, unsigned left, unsigned right);
164static int es1370_mixsetrecsrc(snd_mixer *m, u_int32_t src);
165
166static snd_mixer es1370_mixer = {
167 "AudioPCI 1370 mixer",
168 es1370_mixinit,
169 es1370_mixset,
170 es1370_mixsetrecsrc,
171};
172
173static const struct {
174 unsigned volidx:4;
175 unsigned left:4;
176 unsigned right:4;
177 unsigned stereo:1;
178 unsigned recmask:13;
179 unsigned avail:1;
180} mixtable[SOUND_MIXER_NRDEVICES] = {
181 [SOUND_MIXER_VOLUME] = { 0, 0x0, 0x1, 1, 0x0000, 1 },
182 [SOUND_MIXER_PCM] = { 1, 0x2, 0x3, 1, 0x0400, 1 },
183 [SOUND_MIXER_SYNTH] = { 2, 0x4, 0x5, 1, 0x0060, 1 },
184 [SOUND_MIXER_CD] = { 3, 0x6, 0x7, 1, 0x0006, 1 },
185 [SOUND_MIXER_LINE] = { 4, 0x8, 0x9, 1, 0x0018, 1 },
186 [SOUND_MIXER_LINE1] = { 5, 0xa, 0xb, 1, 0x1800, 1 },
187 [SOUND_MIXER_LINE2] = { 6, 0xc, 0x0, 0, 0x0100, 1 },
188 [SOUND_MIXER_LINE3] = { 7, 0xd, 0x0, 0, 0x0200, 1 },
189 [SOUND_MIXER_MIC] = { 8, 0xe, 0x0, 0, 0x0001, 1 },
190 [SOUND_MIXER_OGAIN] = { 9, 0xf, 0x0, 0, 0x0000, 1 }
191};
192
193static int
194es1370_mixinit(snd_mixer *m)
195{
196 int i;
197 u_int32_t v;
198
199 v = 0;
200 for (i = 0; i < SOUND_MIXER_NRDEVICES; i++)
201 if (mixtable[i].avail) v |= (1 << i);
202 mix_setdevs(m, v);
203 v = 0;
204 for (i = 0; i < SOUND_MIXER_NRDEVICES; i++)
205 if (mixtable[i].recmask) v |= (1 << i);
206 mix_setrecdevs(m, v);
207 return 0;
208}
209
210static int
211es1370_mixset(snd_mixer *m, unsigned dev, unsigned left, unsigned right)
212{
213 int l, r, rl, rr;
214
215 if (!mixtable[dev].avail) return -1;
216 l = left;
217 r = mixtable[dev].stereo? right : l;
218 if (mixtable[dev].left == 0xf) {
219 rl = (l < 2)? 0x80 : 7 - (l - 2) / 14;
220 } else {
221 rl = (l < 10)? 0x80 : 15 - (l - 10) / 6;
222 }
223 if (mixtable[dev].stereo) {
224 rr = (r < 10)? 0x80 : 15 - (r - 10) / 6;
225 es1370_wrcodec(mix_getdevinfo(m), mixtable[dev].right, rr);
226 }
227 es1370_wrcodec(mix_getdevinfo(m), mixtable[dev].left, rl);
228 return l | (r << 8);
229}
230
231static int
232es1370_mixsetrecsrc(snd_mixer *m, u_int32_t src)
233{
234 int i, j = 0;
235
236 if (src == 0) src = 1 << SOUND_MIXER_MIC;
237 src &= mix_getrecdevs(m);
238 for (i = 0; i < SOUND_MIXER_NRDEVICES; i++)
239 if ((src & (1 << i)) != 0) j |= mixtable[i].recmask;
240
241 es1370_wrcodec(mix_getdevinfo(m), CODEC_LIMIX1, j & 0x55);
242 es1370_wrcodec(mix_getdevinfo(m), CODEC_RIMIX1, j & 0xaa);
243 es1370_wrcodec(mix_getdevinfo(m), CODEC_LIMIX2, (j >> 8) & 0x17);
244 es1370_wrcodec(mix_getdevinfo(m), CODEC_RIMIX2, (j >> 8) & 0x0f);
245 es1370_wrcodec(mix_getdevinfo(m), CODEC_OMIX1, 0x7f);
246 es1370_wrcodec(mix_getdevinfo(m), CODEC_OMIX2, 0x3f);
247 return src;
248}
249
250static int
251es1370_wrcodec(struct es_info *es, u_char i, u_char data)
252{
253 int wait = 100; /* 100 msec timeout */
254
255 do {
256 if ((bus_space_read_4(es->st, es->sh, ES1370_REG_STATUS) &
257 STAT_CSTAT) == 0) {
258 bus_space_write_2(es->st, es->sh, ES1370_REG_CODEC,
259 ((u_short)i << CODEC_INDEX_SHIFT) | data);
260 return 0;
261 }
262 DELAY(1000);
263 } while (--wait);
264 printf("pcm: es1370_wrcodec timed out\n");
265 return -1;
266}
267
268/* -------------------------------------------------------------------- */
269
270/* channel interface */
271static void *
272eschan_init(void *devinfo, snd_dbuf *b, pcm_channel *c, int dir)
273{
274 struct es_info *es = devinfo;
275 struct es_chinfo *ch = (dir == PCMDIR_PLAY)? &es->pch : &es->rch;
276
277 ch->parent = es;
278 ch->channel = c;
279 ch->buffer = b;
280 ch->buffer->bufsize = ES_BUFFSIZE;
281 ch->num = ch->parent->num++;
282 if (chn_allocbuf(ch->buffer, es->parent_dmat) == -1) return NULL;
283 return ch;
284}
285
286static int
287eschan_setdir(void *data, int dir)
288{
289 struct es_chinfo *ch = data;
290 struct es_info *es = ch->parent;
291
292 if (dir == PCMDIR_PLAY) {
293 bus_space_write_1(es->st, es->sh, ES1370_REG_MEMPAGE,
294 ES1370_REG_DAC2_FRAMEADR >> 8);
295 bus_space_write_4(es->st, es->sh, ES1370_REG_DAC2_FRAMEADR & 0xff,
296 vtophys(ch->buffer->buf));
297 bus_space_write_4(es->st, es->sh, ES1370_REG_DAC2_FRAMECNT & 0xff,
298 (ch->buffer->bufsize >> 2) - 1);
299 } else {
300 bus_space_write_1(es->st, es->sh, ES1370_REG_MEMPAGE,
301 ES1370_REG_ADC_FRAMEADR >> 8);
302 bus_space_write_4(es->st, es->sh, ES1370_REG_ADC_FRAMEADR & 0xff,
303 vtophys(ch->buffer->buf));
304 bus_space_write_4(es->st, es->sh, ES1370_REG_ADC_FRAMECNT & 0xff,
305 (ch->buffer->bufsize >> 2) - 1);
306 }
307 ch->dir = dir;
308 return 0;
309}
310
311static int
312eschan_setformat(void *data, u_int32_t format)
313{
314 struct es_chinfo *ch = data;
315 struct es_info *es = ch->parent;
316
317 if (ch->dir == PCMDIR_PLAY) {
318 es->sctrl &= ~SCTRL_P2FMT;
319 if (format & AFMT_S16_LE) es->sctrl |= SCTRL_P2SEB;
320 if (format & AFMT_STEREO) es->sctrl |= SCTRL_P2SMB;
321 } else {
322 es->sctrl &= ~SCTRL_R1FMT;
323 if (format & AFMT_S16_LE) es->sctrl |= SCTRL_R1SEB;
324 if (format & AFMT_STEREO) es->sctrl |= SCTRL_R1SMB;
325 }
326 bus_space_write_4(es->st, es->sh, ES1370_REG_SERIAL_CONTROL, es->sctrl);
327 ch->fmt = format;
328 return 0;
329}
330
331static int
332eschan1370_setspeed(void *data, u_int32_t speed)
333{
334 struct es_chinfo *ch = data;
335 struct es_info *es = ch->parent;
336
337 es->ctrl &= ~CTRL_PCLKDIV;
338 es->ctrl |= DAC2_SRTODIV(speed) << CTRL_SH_PCLKDIV;
339 bus_space_write_4(es->st, es->sh, ES1370_REG_CONTROL, es->ctrl);
340 /* rec/play speeds locked together - should indicate in flags */
341 return speed; /* XXX calc real speed */
342}
343
344int
345eschan1371_setspeed(void *data, u_int32_t speed)
346{
347 struct es_chinfo *ch = data;
348 struct es_info *es = ch->parent;
349
350 if (ch->dir == PCMDIR_PLAY) {
351 return es1371_dac_rate(es, speed, 3 - ch->num); /* play */
352 } else {
353 return es1371_adc_rate(es, speed, 1); /* record */
354 }
355}
356
357static int
358eschan_setblocksize(void *data, u_int32_t blocksize)
359{
360 return blocksize;
361}
362
363static int
364eschan_trigger(void *data, int go)
365{
366 struct es_chinfo *ch = data;
367 struct es_info *es = ch->parent;
368 unsigned ss, cnt;
369
370 if (go == PCMTRIG_EMLDMAWR || go == PCMTRIG_EMLDMARD)
371 return 0;
372
373 ss = 1;
374 ss <<= (ch->fmt & AFMT_STEREO)? 1 : 0;
375 ss <<= (ch->fmt & AFMT_16BIT)? 1 : 0;
376 cnt = ch->buffer->dl / ss - 1;
377
378 if (ch->dir == PCMDIR_PLAY) {
379 if (go == PCMTRIG_START) {
380 int b = (ch->fmt & AFMT_S16_LE)? 2 : 1;
381 es->ctrl |= CTRL_DAC2_EN;
382 es->sctrl &= ~(SCTRL_P2ENDINC | SCTRL_P2STINC |
383 SCTRL_P2LOOPSEL | SCTRL_P2PAUSE |
384 SCTRL_P2DACSEN);
385 es->sctrl |= SCTRL_P2INTEN | (b << SCTRL_SH_P2ENDINC);
386 bus_space_write_4(es->st, es->sh,
387 ES1370_REG_DAC2_SCOUNT, cnt);
388 /* start at beginning of buffer */
389 bus_space_write_4(es->st, es->sh, ES1370_REG_MEMPAGE,
390 ES1370_REG_DAC2_FRAMECNT >> 8);
391 bus_space_write_4(es->st, es->sh,
392 ES1370_REG_DAC2_FRAMECNT & 0xff,
393 (ch->buffer->bufsize >> 2) - 1);
394 } else es->ctrl &= ~CTRL_DAC2_EN;
395 } else {
396 if (go == PCMTRIG_START) {
397 es->ctrl |= CTRL_ADC_EN;
398 es->sctrl &= ~SCTRL_R1LOOPSEL;
399 es->sctrl |= SCTRL_R1INTEN;
400 bus_space_write_4(es->st, es->sh,
401 ES1370_REG_ADC_SCOUNT, cnt);
402 /* start at beginning of buffer */
403 bus_space_write_4(es->st, es->sh, ES1370_REG_MEMPAGE,
404 ES1370_REG_ADC_FRAMECNT >> 8);
405 bus_space_write_4(es->st, es->sh,
406 ES1370_REG_ADC_FRAMECNT & 0xff,
407 (ch->buffer->bufsize >> 2) - 1);
408 } else es->ctrl &= ~CTRL_ADC_EN;
409 }
410 bus_space_write_4(es->st, es->sh, ES1370_REG_SERIAL_CONTROL, es->sctrl);
411 bus_space_write_4(es->st, es->sh, ES1370_REG_CONTROL, es->ctrl);
412 return 0;
413}
414
415static int
416eschan_getptr(void *data)
417{
418 struct es_chinfo *ch = data;
419 struct es_info *es = ch->parent;
420 u_int32_t reg, cnt;
421
422 if (ch->dir == PCMDIR_PLAY)
423 reg = ES1370_REG_DAC2_FRAMECNT;
424 else
425 reg = ES1370_REG_ADC_FRAMECNT;
426
427 bus_space_write_4(es->st, es->sh, ES1370_REG_MEMPAGE, reg >> 8);
428 cnt = bus_space_read_4(es->st, es->sh, reg & 0x000000ff) >> 16;
429 /* cnt is longwords */
430 return cnt << 2;
431}
432
433static pcmchan_caps *
434eschan_getcaps(void *data)
435{
436 struct es_chinfo *ch = data;
437 return (ch->dir == PCMDIR_PLAY)? &es_playcaps : &es_reccaps;
438}
439
440/* The interrupt handler */
441static void
442es_intr(void *p)
443{
444 struct es_info *es = p;
445 unsigned intsrc, sctrl;
446
447 intsrc = bus_space_read_4(es->st, es->sh, ES1370_REG_STATUS);
448 if ((intsrc & STAT_INTR) == 0) return;
449
450 sctrl = es->sctrl;
451 if (intsrc & STAT_ADC) sctrl &= ~SCTRL_R1INTEN;
452 if (intsrc & STAT_DAC1) sctrl &= ~SCTRL_P1INTEN;
453 if (intsrc & STAT_DAC2) sctrl &= ~SCTRL_P2INTEN;
454
455 bus_space_write_4(es->st, es->sh, ES1370_REG_SERIAL_CONTROL, sctrl);
456 bus_space_write_4(es->st, es->sh, ES1370_REG_SERIAL_CONTROL, es->sctrl);
457
458 if (intsrc & STAT_ADC) chn_intr(es->rch.channel);
459 if (intsrc & STAT_DAC1);
460 if (intsrc & STAT_DAC2) chn_intr(es->pch.channel);
461}
462
463/* ES1370 specific */
464static int
465es1370_init(struct es_info *es)
466{
467 es->ctrl = CTRL_CDC_EN | CTRL_SERR_DIS |
468 (DAC2_SRTODIV(DSP_DEFAULT_SPEED) << CTRL_SH_PCLKDIV);
469 bus_space_write_4(es->st, es->sh, ES1370_REG_CONTROL, es->ctrl);
470
471 es->sctrl = 0;
472 bus_space_write_4(es->st, es->sh, ES1370_REG_SERIAL_CONTROL, es->sctrl);
473
474 es1370_wrcodec(es, CODEC_RES_PD, 3);/* No RST, PD */
475 es1370_wrcodec(es, CODEC_CSEL, 0); /* CODEC ADC and CODEC DAC use
476 * {LR,B}CLK2 and run off the LRCLK2
477 * PLL; program DAC_SYNC=0! */
478 es1370_wrcodec(es, CODEC_ADSEL, 0);/* Recording source is mixer */
479 es1370_wrcodec(es, CODEC_MGAIN, 0);/* MIC amp is 0db */
480
481 return 0;
482}
483
484/* ES1371 specific */
485int
486es1371_init(struct es_info *es, int rev)
487{
488 int idx;
489
490 if (debug > 0) printf("es_init\n");
491
492 es->num = 0;
493 es->ctrl = 0;
494 es->sctrl = 0;
495 /* initialize the chips */
496 if (rev == 7 || rev >= 9) {
497#define ES1371_BINTSUMM_OFF 0x07
498 bus_space_write_4(es->st, es->sh, ES1371_BINTSUMM_OFF, 0x20);
499 if (debug > 0) printf("es_init rev == 7 || rev >= 9\n");
500 } else { /* pre ac97 2.1 card */
501 bus_space_write_4(es->st, es->sh, ES1370_REG_CONTROL, es->ctrl);
502 if (debug > 0) printf("es_init pre ac97 2.1\n");
503 }
504 bus_space_write_4(es->st, es->sh, ES1370_REG_SERIAL_CONTROL, es->sctrl);
505 bus_space_write_4(es->st, es->sh, ES1371_REG_LEGACY, 0);
506 /* AC'97 warm reset to start the bitclk */
507 bus_space_write_4(es->st, es->sh, ES1371_REG_LEGACY, es->ctrl | ES1371_SYNC_RES);
508 DELAY(2000);
509 bus_space_write_4(es->st, es->sh, ES1370_REG_SERIAL_CONTROL, es->ctrl);
510 /* Init the sample rate converter */
511 bus_space_write_4(es->st, es->sh, ES1371_REG_SMPRATE, ES1371_DIS_SRC);
512 for (idx = 0; idx < 0x80; idx++)
513 es1371_src_write(es, idx, 0);
514 es1371_src_write(es, ES_SMPREG_DAC1 + ES_SMPREG_TRUNC_N, 16 << 4);
515 es1371_src_write(es, ES_SMPREG_DAC1 + ES_SMPREG_INT_REGS, 16 << 10);
516 es1371_src_write(es, ES_SMPREG_DAC2 + ES_SMPREG_TRUNC_N, 16 << 4);
517 es1371_src_write(es, ES_SMPREG_DAC2 + ES_SMPREG_INT_REGS, 16 << 10);
518 es1371_src_write(es, ES_SMPREG_VOL_ADC, 1 << 12);
519 es1371_src_write(es, ES_SMPREG_VOL_ADC + 1, 1 << 12);
520 es1371_src_write(es, ES_SMPREG_VOL_DAC1, 1 << 12);
521 es1371_src_write(es, ES_SMPREG_VOL_DAC1 + 1, 1 << 12);
522 es1371_src_write(es, ES_SMPREG_VOL_DAC2, 1 << 12);
523 es1371_src_write(es, ES_SMPREG_VOL_DAC2 + 1, 1 << 12);
524 es1371_adc_rate (es, 22050, 1);
525 es1371_dac_rate (es, 22050, 1);
526 es1371_dac_rate (es, 22050, 2);
527 /* WARNING:
528 * enabling the sample rate converter without properly programming
529 * its parameters causes the chip to lock up (the SRC busy bit will
530 * be stuck high, and I've found no way to rectify this other than
531 * power cycle)
532 */
533 bus_space_write_4(es->st, es->sh, ES1371_REG_SMPRATE, 0);
534
535 return (0);
536}
537
538static void
539es1371_wrcodec(void *s, int addr, u_int32_t data)
540{
541 int sl;
542 unsigned t, x;
543 struct es_info *es = (struct es_info*)s;
544
545 if (debug > 0) printf("wrcodec addr 0x%x data 0x%x\n", addr, data);
546
547 for (t = 0; t < 0x1000; t++)
548 if (!(bus_space_read_4(es->st, es->sh,(ES1371_REG_CODEC & CODEC_WIP))))
549 break;
550 sl = spltty();
551 /* save the current state for later */
552 x = bus_space_read_4(es->st, es->sh, ES1371_REG_SMPRATE);
553 /* enable SRC state data in SRC mux */
554 bus_space_write_4(es->st, es->sh, ES1371_REG_SMPRATE,
555 (es1371_wait_src_ready(s) &
556 (ES1371_DIS_SRC | ES1371_DIS_P1 | ES1371_DIS_P2 | ES1371_DIS_R1)));
557 /* wait for a SAFE time to write addr/data and then do it, dammit */
558 for (t = 0; t < 0x1000; t++)
559 if ((bus_space_read_4(es->st, es->sh, ES1371_REG_SMPRATE) & 0x00070000) == 0x00010000)
560 break;
561
562 if (debug > 2) printf("one b_s_w: 0x%x 0x%x 0x%x\n", es->sh, ES1371_REG_CODEC,
563 ((addr << CODEC_POADD_SHIFT) & CODEC_POADD_MASK) |
564 ((data << CODEC_PODAT_SHIFT) & CODEC_PODAT_MASK));
565
566 bus_space_write_4(es->st, es->sh,ES1371_REG_CODEC,
567 ((addr << CODEC_POADD_SHIFT) & CODEC_POADD_MASK) |
568 ((data << CODEC_PODAT_SHIFT) & CODEC_PODAT_MASK));
569 /* restore SRC reg */
570 es1371_wait_src_ready(s);
571 if (debug > 2) printf("two b_s_w: 0x%x 0x%x 0x%x\n", es->sh, ES1371_REG_SMPRATE, x);
572 bus_space_write_4(es->st, es->sh, ES1371_REG_SMPRATE, x);
573 splx(sl);
574}
575
576static u_int32_t
577es1371_rdcodec(void *s, int addr)
578{
579 int sl;
580 unsigned t, x;
581 struct es_info *es = (struct es_info *)s;
582
583 if (debug > 0) printf("rdcodec addr 0x%x ... ", addr);
584
585 for (t = 0; t < 0x1000; t++)
586 if (!(x = bus_space_read_4(es->st, es->sh, ES1371_REG_CODEC) & CODEC_WIP))
587 break;
588 if (debug > 0) printf("loop 1 t 0x%x x 0x%x ", t, x);
589
590 sl = spltty();
591
592 /* save the current state for later */
593 x = bus_space_read_4(es->st, es->sh, ES1371_REG_SMPRATE);
594 /* enable SRC state data in SRC mux */
595 bus_space_write_4(es->st, es->sh, ES1371_REG_SMPRATE,
596 (es1371_wait_src_ready(s) &
597 (ES1371_DIS_SRC | ES1371_DIS_P1 | ES1371_DIS_P2 | ES1371_DIS_R1)));
598 /* wait for a SAFE time to write addr/data and then do it, dammit */
599 for (t = 0; t < 0x5000; t++)
600 if ((x = bus_space_read_4(es->st, es->sh, ES1371_REG_SMPRATE) & 0x00070000) == 0x00010000)
601 break;
602 if (debug > 0) printf("loop 2 t 0x%x x 0x%x ", t, x);
603 bus_space_write_4(es->st, es->sh, ES1371_REG_CODEC,
604 ((addr << CODEC_POADD_SHIFT) & CODEC_POADD_MASK) | CODEC_PORD);
605
606 /* restore SRC reg */
607 es1371_wait_src_ready(s);
608 bus_space_write_4(es->st, es->sh, ES1371_REG_SMPRATE, x);
609
610 splx(sl);
611
612 /* now wait for the stinkin' data (RDY) */
613 for (t = 0; t < 0x1000; t++)
614 if ((x = bus_space_read_4(es->st, es->sh, ES1371_REG_CODEC)) & CODEC_RDY)
615 break;
616 if (debug > 0) printf("loop 3 t 0x%x 0x%x ret 0x%x\n", t, x, ((x & CODEC_PIDAT_MASK) >> CODEC_PIDAT_SHIFT));
617 return ((x & CODEC_PIDAT_MASK) >> CODEC_PIDAT_SHIFT);
618}
619
620static u_int
621es1371_src_read(struct es_info *es, u_short reg)
622{
623 unsigned int r;
624
625 r = es1371_wait_src_ready(es) &
626 (ES1371_DIS_SRC | ES1371_DIS_P1 | ES1371_DIS_P2 | ES1371_DIS_R1);
627 r |= ES1371_SRC_RAM_ADDRO(reg);
628 bus_space_write_4(es->st, es->sh, ES1371_REG_SMPRATE,r);
629 return ES1371_SRC_RAM_DATAI(es1371_wait_src_ready(es));
630}
631
632static void
633es1371_src_write(struct es_info *es, u_short reg, u_short data){
634 u_int r;
635
636 r = es1371_wait_src_ready(es) &
637 (ES1371_DIS_SRC | ES1371_DIS_P1 | ES1371_DIS_P2 | ES1371_DIS_R1);
638 r |= ES1371_SRC_RAM_ADDRO(reg) | ES1371_SRC_RAM_DATAO(data);
639 /* printf("es1371_src_write 0x%x 0x%x\n",ES1371_REG_SMPRATE,r | ES1371_SRC_RAM_WE); */
640 bus_space_write_4(es->st, es->sh, ES1371_REG_SMPRATE, r | ES1371_SRC_RAM_WE);
641}
642
643static u_int
644es1371_adc_rate(struct es_info *es, u_int rate, int set)
645{
646 u_int n, truncm, freq, result;
647
648 if (rate > 48000) rate = 48000;
649 if (rate < 4000) rate = 4000;
650 n = rate / 3000;
651 if ((1 << n) & ((1 << 15) | (1 << 13) | (1 << 11) | (1 << 9)))
652 n--;
653 truncm = (21 * n - 1) | 1;
654 freq = ((48000UL << 15) / rate) * n;
655 result = (48000UL << 15) / (freq / n);
656 if (set) {
657 if (rate >= 24000) {
658 if (truncm > 239) truncm = 239;
659 es1371_src_write(es, ES_SMPREG_ADC + ES_SMPREG_TRUNC_N,
660 (((239 - truncm) >> 1) << 9) | (n << 4));
661 } else {
662 if (truncm > 119) truncm = 119;
663 es1371_src_write(es, ES_SMPREG_ADC + ES_SMPREG_TRUNC_N,
664 0x8000 | (((119 - truncm) >> 1) << 9) | (n << 4));
665 }
666 es1371_src_write(es, ES_SMPREG_ADC + ES_SMPREG_INT_REGS,
667 (es1371_src_read(es, ES_SMPREG_ADC + ES_SMPREG_INT_REGS) &
668 0x00ff) | ((freq >> 5) & 0xfc00));
669 es1371_src_write(es, ES_SMPREG_ADC + ES_SMPREG_VFREQ_FRAC, freq & 0x7fff);
670 es1371_src_write(es, ES_SMPREG_VOL_ADC, n << 8);
671 es1371_src_write(es, ES_SMPREG_VOL_ADC + 1, n << 8);
672 }
673 return result;
674}
675
676static u_int
677es1371_dac_rate(struct es_info *es, u_int rate, int set)
678{
679 u_int freq, r, result, dac, dis;
680
681 if (rate > 48000) rate = 48000;
682 if (rate < 4000) rate = 4000;
683 freq = (rate << 15) / 3000;
684 result = (freq * 3000) >> 15;
685 if (set) {
686 dac = (set == 1)? ES_SMPREG_DAC1 : ES_SMPREG_DAC2;
687 dis = (set == 1)? ES1371_DIS_P2 : ES1371_DIS_P1;
688
689 r = (es1371_wait_src_ready(es) & (ES1371_DIS_SRC | ES1371_DIS_P1 | ES1371_DIS_P2 | ES1371_DIS_R1));
690 bus_space_write_4(es->st, es->sh, ES1371_REG_SMPRATE, r);
691 es1371_src_write(es, dac + ES_SMPREG_INT_REGS,
692 (es1371_src_read(es, dac + ES_SMPREG_INT_REGS) & 0x00ff) | ((freq >> 5) & 0xfc00));
693 es1371_src_write(es, dac + ES_SMPREG_VFREQ_FRAC, freq & 0x7fff);
694 r = (es1371_wait_src_ready(es) & (ES1371_DIS_SRC | dis | ES1371_DIS_R1));
695 bus_space_write_4(es->st, es->sh, ES1371_REG_SMPRATE, r);
696 }
697 return result;
698}
699
700static u_int
701es1371_wait_src_ready(struct es_info *es)
702{
703 u_int t, r;
704
705 for (t = 0; t < 500; t++) {
706 if (!((r = bus_space_read_4(es->st, es->sh, ES1371_REG_SMPRATE)) & ES1371_SRC_RAM_BUSY))
707 return r;
708 DELAY(1000);
709 }
710 printf("es1371: wait src ready timeout 0x%x [0x%x]\n", ES1371_REG_SMPRATE, r);
711 return 0;
712}
713
714/* -------------------------------------------------------------------- */
715
716/*
717 * Probe and attach the card
718 */
719
720static int
721es_pci_probe(device_t dev)
722{
723 if (pci_get_devid(dev) == ES1370_PCI_ID) {
724 device_set_desc(dev, "AudioPCI ES1370");
725 return 0;
726 } else if (pci_get_devid(dev) == ES1371_PCI_ID ||
727 pci_get_devid(dev) == ES1371_PCI_ID2) {
728 device_set_desc(dev, "AudioPCI ES1371");
729 return 0;
730 }
731 return ENXIO;
732}
733
734static int
735es_pci_attach(device_t dev)
736{
737 snddev_info *d;
738 u_int32_t data;
739 struct es_info *es = 0;
740 int type = 0;
741 int regid;
742 struct resource *reg = 0;
743 int mapped;
744 int irqid;
745 struct resource *irq = 0;
746 void *ih = 0;
747 char status[SND_STATUSLEN];
748 struct ac97_info *codec;
749 pcm_channel *ct = NULL;
750
751 d = device_get_softc(dev);
752 if ((es = malloc(sizeof *es, M_DEVBUF, M_NOWAIT)) == NULL) {
753 device_printf(dev, "cannot allocate softc\n");
754 return ENXIO;
755 }
756 bzero(es, sizeof *es);
757
758 es->dev = dev;
759 mapped = 0;
760 data = pci_read_config(dev, PCIR_COMMAND, 2);
761 data |= (PCIM_CMD_PORTEN|PCIM_CMD_MEMEN|PCIM_CMD_BUSMASTEREN);
762 pci_write_config(dev, PCIR_COMMAND, data, 2);
763 data = pci_read_config(dev, PCIR_COMMAND, 2);
764 if (mapped == 0 && (data & PCIM_CMD_MEMEN)) {
765 regid = MEM_MAP_REG;
766 type = SYS_RES_MEMORY;
767 reg = bus_alloc_resource(dev, type, ®id,
768 0, ~0, 1, RF_ACTIVE);
769 if (reg) {
770 es->st = rman_get_bustag(reg);
771 es->sh = rman_get_bushandle(reg);
772 mapped++;
773 }
774 }
775 if (mapped == 0 && (data & PCIM_CMD_PORTEN)) {
776 regid = PCI_MAP_REG_START;
777 type = SYS_RES_IOPORT;
778 reg = bus_alloc_resource(dev, type, ®id,
779 0, ~0, 1, RF_ACTIVE);
780 if (reg) {
781 es->st = rman_get_bustag(reg);
782 es->sh = rman_get_bushandle(reg);
783 mapped++;
784 }
785 }
786 if (mapped == 0) {
787 device_printf(dev, "unable to map register space\n");
788 goto bad;
789 }
790
791 if (pci_get_devid(dev) == ES1371_PCI_ID ||
792 pci_get_devid(dev) == ES1371_PCI_ID2) {
793 if(-1 == es1371_init(es, pci_get_revid(dev))) {
794 device_printf(dev, "unable to initialize the card\n");
795 goto bad;
796 }
797 codec = ac97_create(dev, es, NULL, es1371_rdcodec, es1371_wrcodec);
798 if (codec == NULL) goto bad;
799 /* our init routine does everything for us */
800 /* set to NULL; flag mixer_init not to run the ac97_init */
801 /* ac97_mixer.init = NULL; */
802 if (mixer_init(d, &ac97_mixer, codec) == -1) goto bad;
803 ct = &es1371_chantemplate;
804 } else if (pci_get_devid(dev) == ES1370_PCI_ID) {
805 if (-1 == es1370_init(es)) {
806 device_printf(dev, "unable to initialize the card\n");
807 goto bad;
808 }
809 mixer_init(d, &es1370_mixer, es);
810 ct = &es1370_chantemplate;
811 } else goto bad;
812
813 irqid = 0;
814 irq = bus_alloc_resource(dev, SYS_RES_IRQ, &irqid,
815 0, ~0, 1, RF_ACTIVE | RF_SHAREABLE);
816 if (!irq
817 || bus_setup_intr(dev, irq, INTR_TYPE_TTY, es_intr, es, &ih)) {
818 device_printf(dev, "unable to map interrupt\n");
819 goto bad;
820 }
821
822 if (bus_dma_tag_create(/*parent*/NULL, /*alignment*/2, /*boundary*/0,
823 /*lowaddr*/BUS_SPACE_MAXADDR_32BIT,
824 /*highaddr*/BUS_SPACE_MAXADDR,
825 /*filter*/NULL, /*filterarg*/NULL,
826 /*maxsize*/ES_BUFFSIZE, /*nsegments*/1, /*maxsegz*/0x3ffff,
827 /*flags*/0, &es->parent_dmat) != 0) {
828 device_printf(dev, "unable to create dma tag\n");
829 goto bad;
830 }
831
832 snprintf(status, SND_STATUSLEN, "at %s 0x%lx irq %ld",
833 (type == SYS_RES_IOPORT)? "io" : "memory",
834 rman_get_start(reg), rman_get_start(irq));
835
836 if (pcm_register(dev, es, 1, 1)) goto bad;
837 pcm_addchan(dev, PCMDIR_REC, ct, es);
838 pcm_addchan(dev, PCMDIR_PLAY, ct, es);
839 pcm_setstatus(dev, status);
840
841 return 0;
842
843 bad:
844 if (es) free(es, M_DEVBUF);
845 if (reg) bus_release_resource(dev, type, regid, reg);
846 if (ih) bus_teardown_intr(dev, irq, ih);
847 if (irq) bus_release_resource(dev, SYS_RES_IRQ, irqid, irq);
848 return ENXIO;
849}
850
851static device_method_t es_methods[] = {
852 /* Device interface */
853 DEVMETHOD(device_probe, es_pci_probe),
854 DEVMETHOD(device_attach, es_pci_attach),
855
856 { 0, 0 }
857};
858
859static driver_t es_driver = {
860 "pcm",
861 es_methods,
862 sizeof(snddev_info),
863};
864
865static devclass_t pcm_devclass;
866
867DRIVER_MODULE(es, pci, es_driver, pcm_devclass, 0, 0);
2 * Support the ENSONIQ AudioPCI board and Creative Labs SoundBlaster PCI
3 * boards based on the ES1370, ES1371 and ES1373 chips.
4 *
5 * Copyright (c) 1999 Russell Cattelan <cattelan@thebarn.com>
6 * Copyright (c) 1999 Cameron Grant <gandalf@vilnya.demon.co.uk>
7 * Copyright (c) 1998 by Joachim Kuebart. All rights reserved.
8 *
9 * Redistribution and use in source and binary forms, with or without
10 * modification, are permitted provided that the following conditions
11 * are met:
12 *
13 * 1. Redistributions of source code must retain the above copyright
14 * notice, this list of conditions and the following disclaimer.
15 *
16 * 2. Redistributions in binary form must reproduce the above copyright
17 * notice, this list of conditions and the following disclaimer in
18 * the documentation and/or other materials provided with the
19 * distribution.
20 *
21 * 3. All advertising materials mentioning features or use of this
22 * software must display the following acknowledgement:
23 * This product includes software developed by Joachim Kuebart.
24 *
25 * 4. The name of the author may not be used to endorse or promote
26 * products derived from this software without specific prior
27 * written permission.
28 *
29 * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
30 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
31 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
32 * DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT,
33 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
34 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
35 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
36 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
37 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
38 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
39 * OF THE POSSIBILITY OF SUCH DAMAGE.
40 *
41 * $FreeBSD: head/sys/dev/sound/pci/es137x.c 60958 2000-05-26 21:15:47Z cg $
42 */
43
44/*
45 * Part of this code was heavily inspired by the linux driver from
46 * Thomas Sailer (sailer@ife.ee.ethz.ch)
47 * Just about everything has been touched and reworked in some way but
48 * the all the underlying sequences/timing/register values are from
49 * Thomas' code.
50 *
51*/
52
53#include <dev/sound/pcm/sound.h>
54#include <dev/sound/pcm/ac97.h>
55#include <dev/sound/pci/es137x.h>
56
57#include <pci/pcireg.h>
58#include <pci/pcivar.h>
59
60#include <sys/sysctl.h>
61
62static int debug = 0;
63SYSCTL_INT(_debug, OID_AUTO, es_debug, CTLFLAG_RW, &debug, 0, "");
64
65#define MEM_MAP_REG 0x14
66
67/* PCI IDs of supported chips */
68#define ES1370_PCI_ID 0x50001274
69#define ES1371_PCI_ID 0x13711274
70#define ES1371_PCI_ID2 0x13713274
71
72#define ES_BUFFSIZE 4096
73
74/* device private data */
75struct es_info;
76
77struct es_chinfo {
78 struct es_info *parent;
79 pcm_channel *channel;
80 snd_dbuf *buffer;
81 int dir, num;
82 u_int32_t fmt;
83};
84
85struct es_info {
86 bus_space_tag_t st;
87 bus_space_handle_t sh;
88 bus_dma_tag_t parent_dmat;
89
90 device_t dev;
91 int num;
92 /* Contents of board's registers */
93 u_long ctrl;
94 u_long sctrl;
95 struct es_chinfo pch, rch;
96};
97
98/* -------------------------------------------------------------------- */
99
100/* prototypes */
101static void es_intr(void *);
102
103static void es1371_wrcodec(void *, int, u_int32_t);
104static u_int32_t es1371_rdcodec(void *, int);
105static u_int es1371_wait_src_ready(struct es_info *);
106static void es1371_src_write(struct es_info *, u_short, unsigned short);
107static u_int es1371_adc_rate(struct es_info *, u_int, int);
108static u_int es1371_dac_rate(struct es_info *, u_int, int);
109static int es1371_init(struct es_info *es, int);
110static int es1370_init(struct es_info *);
111static int es1370_wrcodec(struct es_info *, u_char, u_char);
112
113/* channel interface */
114static void *eschan_init(void *devinfo, snd_dbuf *b, pcm_channel *c, int dir);
115static int eschan_setdir(void *data, int dir);
116static int eschan_setformat(void *data, u_int32_t format);
117static int eschan1370_setspeed(void *data, u_int32_t speed);
118static int eschan1371_setspeed(void *data, u_int32_t speed);
119static int eschan_setblocksize(void *data, u_int32_t blocksize);
120static int eschan_trigger(void *data, int go);
121static int eschan_getptr(void *data);
122static pcmchan_caps *eschan_getcaps(void *data);
123
124static pcmchan_caps es_playcaps = {
125 4000, 48000,
126 AFMT_STEREO | AFMT_U8 | AFMT_S16_LE,
127 AFMT_STEREO | AFMT_S16_LE
128};
129
130static pcmchan_caps es_reccaps = {
131 4000, 48000,
132 AFMT_STEREO | AFMT_U8 | AFMT_S16_LE,
133 AFMT_STEREO | AFMT_S16_LE
134};
135
136static pcm_channel es1370_chantemplate = {
137 eschan_init,
138 eschan_setdir,
139 eschan_setformat,
140 eschan1370_setspeed,
141 eschan_setblocksize,
142 eschan_trigger,
143 eschan_getptr,
144 eschan_getcaps,
145};
146
147static pcm_channel es1371_chantemplate = {
148 eschan_init,
149 eschan_setdir,
150 eschan_setformat,
151 eschan1371_setspeed,
152 eschan_setblocksize,
153 eschan_trigger,
154 eschan_getptr,
155 eschan_getcaps,
156};
157
158/* -------------------------------------------------------------------- */
159
160/* The es1370 mixer interface */
161
162static int es1370_mixinit(snd_mixer *m);
163static int es1370_mixset(snd_mixer *m, unsigned dev, unsigned left, unsigned right);
164static int es1370_mixsetrecsrc(snd_mixer *m, u_int32_t src);
165
166static snd_mixer es1370_mixer = {
167 "AudioPCI 1370 mixer",
168 es1370_mixinit,
169 es1370_mixset,
170 es1370_mixsetrecsrc,
171};
172
173static const struct {
174 unsigned volidx:4;
175 unsigned left:4;
176 unsigned right:4;
177 unsigned stereo:1;
178 unsigned recmask:13;
179 unsigned avail:1;
180} mixtable[SOUND_MIXER_NRDEVICES] = {
181 [SOUND_MIXER_VOLUME] = { 0, 0x0, 0x1, 1, 0x0000, 1 },
182 [SOUND_MIXER_PCM] = { 1, 0x2, 0x3, 1, 0x0400, 1 },
183 [SOUND_MIXER_SYNTH] = { 2, 0x4, 0x5, 1, 0x0060, 1 },
184 [SOUND_MIXER_CD] = { 3, 0x6, 0x7, 1, 0x0006, 1 },
185 [SOUND_MIXER_LINE] = { 4, 0x8, 0x9, 1, 0x0018, 1 },
186 [SOUND_MIXER_LINE1] = { 5, 0xa, 0xb, 1, 0x1800, 1 },
187 [SOUND_MIXER_LINE2] = { 6, 0xc, 0x0, 0, 0x0100, 1 },
188 [SOUND_MIXER_LINE3] = { 7, 0xd, 0x0, 0, 0x0200, 1 },
189 [SOUND_MIXER_MIC] = { 8, 0xe, 0x0, 0, 0x0001, 1 },
190 [SOUND_MIXER_OGAIN] = { 9, 0xf, 0x0, 0, 0x0000, 1 }
191};
192
193static int
194es1370_mixinit(snd_mixer *m)
195{
196 int i;
197 u_int32_t v;
198
199 v = 0;
200 for (i = 0; i < SOUND_MIXER_NRDEVICES; i++)
201 if (mixtable[i].avail) v |= (1 << i);
202 mix_setdevs(m, v);
203 v = 0;
204 for (i = 0; i < SOUND_MIXER_NRDEVICES; i++)
205 if (mixtable[i].recmask) v |= (1 << i);
206 mix_setrecdevs(m, v);
207 return 0;
208}
209
210static int
211es1370_mixset(snd_mixer *m, unsigned dev, unsigned left, unsigned right)
212{
213 int l, r, rl, rr;
214
215 if (!mixtable[dev].avail) return -1;
216 l = left;
217 r = mixtable[dev].stereo? right : l;
218 if (mixtable[dev].left == 0xf) {
219 rl = (l < 2)? 0x80 : 7 - (l - 2) / 14;
220 } else {
221 rl = (l < 10)? 0x80 : 15 - (l - 10) / 6;
222 }
223 if (mixtable[dev].stereo) {
224 rr = (r < 10)? 0x80 : 15 - (r - 10) / 6;
225 es1370_wrcodec(mix_getdevinfo(m), mixtable[dev].right, rr);
226 }
227 es1370_wrcodec(mix_getdevinfo(m), mixtable[dev].left, rl);
228 return l | (r << 8);
229}
230
231static int
232es1370_mixsetrecsrc(snd_mixer *m, u_int32_t src)
233{
234 int i, j = 0;
235
236 if (src == 0) src = 1 << SOUND_MIXER_MIC;
237 src &= mix_getrecdevs(m);
238 for (i = 0; i < SOUND_MIXER_NRDEVICES; i++)
239 if ((src & (1 << i)) != 0) j |= mixtable[i].recmask;
240
241 es1370_wrcodec(mix_getdevinfo(m), CODEC_LIMIX1, j & 0x55);
242 es1370_wrcodec(mix_getdevinfo(m), CODEC_RIMIX1, j & 0xaa);
243 es1370_wrcodec(mix_getdevinfo(m), CODEC_LIMIX2, (j >> 8) & 0x17);
244 es1370_wrcodec(mix_getdevinfo(m), CODEC_RIMIX2, (j >> 8) & 0x0f);
245 es1370_wrcodec(mix_getdevinfo(m), CODEC_OMIX1, 0x7f);
246 es1370_wrcodec(mix_getdevinfo(m), CODEC_OMIX2, 0x3f);
247 return src;
248}
249
250static int
251es1370_wrcodec(struct es_info *es, u_char i, u_char data)
252{
253 int wait = 100; /* 100 msec timeout */
254
255 do {
256 if ((bus_space_read_4(es->st, es->sh, ES1370_REG_STATUS) &
257 STAT_CSTAT) == 0) {
258 bus_space_write_2(es->st, es->sh, ES1370_REG_CODEC,
259 ((u_short)i << CODEC_INDEX_SHIFT) | data);
260 return 0;
261 }
262 DELAY(1000);
263 } while (--wait);
264 printf("pcm: es1370_wrcodec timed out\n");
265 return -1;
266}
267
268/* -------------------------------------------------------------------- */
269
270/* channel interface */
271static void *
272eschan_init(void *devinfo, snd_dbuf *b, pcm_channel *c, int dir)
273{
274 struct es_info *es = devinfo;
275 struct es_chinfo *ch = (dir == PCMDIR_PLAY)? &es->pch : &es->rch;
276
277 ch->parent = es;
278 ch->channel = c;
279 ch->buffer = b;
280 ch->buffer->bufsize = ES_BUFFSIZE;
281 ch->num = ch->parent->num++;
282 if (chn_allocbuf(ch->buffer, es->parent_dmat) == -1) return NULL;
283 return ch;
284}
285
286static int
287eschan_setdir(void *data, int dir)
288{
289 struct es_chinfo *ch = data;
290 struct es_info *es = ch->parent;
291
292 if (dir == PCMDIR_PLAY) {
293 bus_space_write_1(es->st, es->sh, ES1370_REG_MEMPAGE,
294 ES1370_REG_DAC2_FRAMEADR >> 8);
295 bus_space_write_4(es->st, es->sh, ES1370_REG_DAC2_FRAMEADR & 0xff,
296 vtophys(ch->buffer->buf));
297 bus_space_write_4(es->st, es->sh, ES1370_REG_DAC2_FRAMECNT & 0xff,
298 (ch->buffer->bufsize >> 2) - 1);
299 } else {
300 bus_space_write_1(es->st, es->sh, ES1370_REG_MEMPAGE,
301 ES1370_REG_ADC_FRAMEADR >> 8);
302 bus_space_write_4(es->st, es->sh, ES1370_REG_ADC_FRAMEADR & 0xff,
303 vtophys(ch->buffer->buf));
304 bus_space_write_4(es->st, es->sh, ES1370_REG_ADC_FRAMECNT & 0xff,
305 (ch->buffer->bufsize >> 2) - 1);
306 }
307 ch->dir = dir;
308 return 0;
309}
310
311static int
312eschan_setformat(void *data, u_int32_t format)
313{
314 struct es_chinfo *ch = data;
315 struct es_info *es = ch->parent;
316
317 if (ch->dir == PCMDIR_PLAY) {
318 es->sctrl &= ~SCTRL_P2FMT;
319 if (format & AFMT_S16_LE) es->sctrl |= SCTRL_P2SEB;
320 if (format & AFMT_STEREO) es->sctrl |= SCTRL_P2SMB;
321 } else {
322 es->sctrl &= ~SCTRL_R1FMT;
323 if (format & AFMT_S16_LE) es->sctrl |= SCTRL_R1SEB;
324 if (format & AFMT_STEREO) es->sctrl |= SCTRL_R1SMB;
325 }
326 bus_space_write_4(es->st, es->sh, ES1370_REG_SERIAL_CONTROL, es->sctrl);
327 ch->fmt = format;
328 return 0;
329}
330
331static int
332eschan1370_setspeed(void *data, u_int32_t speed)
333{
334 struct es_chinfo *ch = data;
335 struct es_info *es = ch->parent;
336
337 es->ctrl &= ~CTRL_PCLKDIV;
338 es->ctrl |= DAC2_SRTODIV(speed) << CTRL_SH_PCLKDIV;
339 bus_space_write_4(es->st, es->sh, ES1370_REG_CONTROL, es->ctrl);
340 /* rec/play speeds locked together - should indicate in flags */
341 return speed; /* XXX calc real speed */
342}
343
344int
345eschan1371_setspeed(void *data, u_int32_t speed)
346{
347 struct es_chinfo *ch = data;
348 struct es_info *es = ch->parent;
349
350 if (ch->dir == PCMDIR_PLAY) {
351 return es1371_dac_rate(es, speed, 3 - ch->num); /* play */
352 } else {
353 return es1371_adc_rate(es, speed, 1); /* record */
354 }
355}
356
357static int
358eschan_setblocksize(void *data, u_int32_t blocksize)
359{
360 return blocksize;
361}
362
363static int
364eschan_trigger(void *data, int go)
365{
366 struct es_chinfo *ch = data;
367 struct es_info *es = ch->parent;
368 unsigned ss, cnt;
369
370 if (go == PCMTRIG_EMLDMAWR || go == PCMTRIG_EMLDMARD)
371 return 0;
372
373 ss = 1;
374 ss <<= (ch->fmt & AFMT_STEREO)? 1 : 0;
375 ss <<= (ch->fmt & AFMT_16BIT)? 1 : 0;
376 cnt = ch->buffer->dl / ss - 1;
377
378 if (ch->dir == PCMDIR_PLAY) {
379 if (go == PCMTRIG_START) {
380 int b = (ch->fmt & AFMT_S16_LE)? 2 : 1;
381 es->ctrl |= CTRL_DAC2_EN;
382 es->sctrl &= ~(SCTRL_P2ENDINC | SCTRL_P2STINC |
383 SCTRL_P2LOOPSEL | SCTRL_P2PAUSE |
384 SCTRL_P2DACSEN);
385 es->sctrl |= SCTRL_P2INTEN | (b << SCTRL_SH_P2ENDINC);
386 bus_space_write_4(es->st, es->sh,
387 ES1370_REG_DAC2_SCOUNT, cnt);
388 /* start at beginning of buffer */
389 bus_space_write_4(es->st, es->sh, ES1370_REG_MEMPAGE,
390 ES1370_REG_DAC2_FRAMECNT >> 8);
391 bus_space_write_4(es->st, es->sh,
392 ES1370_REG_DAC2_FRAMECNT & 0xff,
393 (ch->buffer->bufsize >> 2) - 1);
394 } else es->ctrl &= ~CTRL_DAC2_EN;
395 } else {
396 if (go == PCMTRIG_START) {
397 es->ctrl |= CTRL_ADC_EN;
398 es->sctrl &= ~SCTRL_R1LOOPSEL;
399 es->sctrl |= SCTRL_R1INTEN;
400 bus_space_write_4(es->st, es->sh,
401 ES1370_REG_ADC_SCOUNT, cnt);
402 /* start at beginning of buffer */
403 bus_space_write_4(es->st, es->sh, ES1370_REG_MEMPAGE,
404 ES1370_REG_ADC_FRAMECNT >> 8);
405 bus_space_write_4(es->st, es->sh,
406 ES1370_REG_ADC_FRAMECNT & 0xff,
407 (ch->buffer->bufsize >> 2) - 1);
408 } else es->ctrl &= ~CTRL_ADC_EN;
409 }
410 bus_space_write_4(es->st, es->sh, ES1370_REG_SERIAL_CONTROL, es->sctrl);
411 bus_space_write_4(es->st, es->sh, ES1370_REG_CONTROL, es->ctrl);
412 return 0;
413}
414
415static int
416eschan_getptr(void *data)
417{
418 struct es_chinfo *ch = data;
419 struct es_info *es = ch->parent;
420 u_int32_t reg, cnt;
421
422 if (ch->dir == PCMDIR_PLAY)
423 reg = ES1370_REG_DAC2_FRAMECNT;
424 else
425 reg = ES1370_REG_ADC_FRAMECNT;
426
427 bus_space_write_4(es->st, es->sh, ES1370_REG_MEMPAGE, reg >> 8);
428 cnt = bus_space_read_4(es->st, es->sh, reg & 0x000000ff) >> 16;
429 /* cnt is longwords */
430 return cnt << 2;
431}
432
433static pcmchan_caps *
434eschan_getcaps(void *data)
435{
436 struct es_chinfo *ch = data;
437 return (ch->dir == PCMDIR_PLAY)? &es_playcaps : &es_reccaps;
438}
439
440/* The interrupt handler */
441static void
442es_intr(void *p)
443{
444 struct es_info *es = p;
445 unsigned intsrc, sctrl;
446
447 intsrc = bus_space_read_4(es->st, es->sh, ES1370_REG_STATUS);
448 if ((intsrc & STAT_INTR) == 0) return;
449
450 sctrl = es->sctrl;
451 if (intsrc & STAT_ADC) sctrl &= ~SCTRL_R1INTEN;
452 if (intsrc & STAT_DAC1) sctrl &= ~SCTRL_P1INTEN;
453 if (intsrc & STAT_DAC2) sctrl &= ~SCTRL_P2INTEN;
454
455 bus_space_write_4(es->st, es->sh, ES1370_REG_SERIAL_CONTROL, sctrl);
456 bus_space_write_4(es->st, es->sh, ES1370_REG_SERIAL_CONTROL, es->sctrl);
457
458 if (intsrc & STAT_ADC) chn_intr(es->rch.channel);
459 if (intsrc & STAT_DAC1);
460 if (intsrc & STAT_DAC2) chn_intr(es->pch.channel);
461}
462
463/* ES1370 specific */
464static int
465es1370_init(struct es_info *es)
466{
467 es->ctrl = CTRL_CDC_EN | CTRL_SERR_DIS |
468 (DAC2_SRTODIV(DSP_DEFAULT_SPEED) << CTRL_SH_PCLKDIV);
469 bus_space_write_4(es->st, es->sh, ES1370_REG_CONTROL, es->ctrl);
470
471 es->sctrl = 0;
472 bus_space_write_4(es->st, es->sh, ES1370_REG_SERIAL_CONTROL, es->sctrl);
473
474 es1370_wrcodec(es, CODEC_RES_PD, 3);/* No RST, PD */
475 es1370_wrcodec(es, CODEC_CSEL, 0); /* CODEC ADC and CODEC DAC use
476 * {LR,B}CLK2 and run off the LRCLK2
477 * PLL; program DAC_SYNC=0! */
478 es1370_wrcodec(es, CODEC_ADSEL, 0);/* Recording source is mixer */
479 es1370_wrcodec(es, CODEC_MGAIN, 0);/* MIC amp is 0db */
480
481 return 0;
482}
483
484/* ES1371 specific */
485int
486es1371_init(struct es_info *es, int rev)
487{
488 int idx;
489
490 if (debug > 0) printf("es_init\n");
491
492 es->num = 0;
493 es->ctrl = 0;
494 es->sctrl = 0;
495 /* initialize the chips */
496 if (rev == 7 || rev >= 9) {
497#define ES1371_BINTSUMM_OFF 0x07
498 bus_space_write_4(es->st, es->sh, ES1371_BINTSUMM_OFF, 0x20);
499 if (debug > 0) printf("es_init rev == 7 || rev >= 9\n");
500 } else { /* pre ac97 2.1 card */
501 bus_space_write_4(es->st, es->sh, ES1370_REG_CONTROL, es->ctrl);
502 if (debug > 0) printf("es_init pre ac97 2.1\n");
503 }
504 bus_space_write_4(es->st, es->sh, ES1370_REG_SERIAL_CONTROL, es->sctrl);
505 bus_space_write_4(es->st, es->sh, ES1371_REG_LEGACY, 0);
506 /* AC'97 warm reset to start the bitclk */
507 bus_space_write_4(es->st, es->sh, ES1371_REG_LEGACY, es->ctrl | ES1371_SYNC_RES);
508 DELAY(2000);
509 bus_space_write_4(es->st, es->sh, ES1370_REG_SERIAL_CONTROL, es->ctrl);
510 /* Init the sample rate converter */
511 bus_space_write_4(es->st, es->sh, ES1371_REG_SMPRATE, ES1371_DIS_SRC);
512 for (idx = 0; idx < 0x80; idx++)
513 es1371_src_write(es, idx, 0);
514 es1371_src_write(es, ES_SMPREG_DAC1 + ES_SMPREG_TRUNC_N, 16 << 4);
515 es1371_src_write(es, ES_SMPREG_DAC1 + ES_SMPREG_INT_REGS, 16 << 10);
516 es1371_src_write(es, ES_SMPREG_DAC2 + ES_SMPREG_TRUNC_N, 16 << 4);
517 es1371_src_write(es, ES_SMPREG_DAC2 + ES_SMPREG_INT_REGS, 16 << 10);
518 es1371_src_write(es, ES_SMPREG_VOL_ADC, 1 << 12);
519 es1371_src_write(es, ES_SMPREG_VOL_ADC + 1, 1 << 12);
520 es1371_src_write(es, ES_SMPREG_VOL_DAC1, 1 << 12);
521 es1371_src_write(es, ES_SMPREG_VOL_DAC1 + 1, 1 << 12);
522 es1371_src_write(es, ES_SMPREG_VOL_DAC2, 1 << 12);
523 es1371_src_write(es, ES_SMPREG_VOL_DAC2 + 1, 1 << 12);
524 es1371_adc_rate (es, 22050, 1);
525 es1371_dac_rate (es, 22050, 1);
526 es1371_dac_rate (es, 22050, 2);
527 /* WARNING:
528 * enabling the sample rate converter without properly programming
529 * its parameters causes the chip to lock up (the SRC busy bit will
530 * be stuck high, and I've found no way to rectify this other than
531 * power cycle)
532 */
533 bus_space_write_4(es->st, es->sh, ES1371_REG_SMPRATE, 0);
534
535 return (0);
536}
537
538static void
539es1371_wrcodec(void *s, int addr, u_int32_t data)
540{
541 int sl;
542 unsigned t, x;
543 struct es_info *es = (struct es_info*)s;
544
545 if (debug > 0) printf("wrcodec addr 0x%x data 0x%x\n", addr, data);
546
547 for (t = 0; t < 0x1000; t++)
548 if (!(bus_space_read_4(es->st, es->sh,(ES1371_REG_CODEC & CODEC_WIP))))
549 break;
550 sl = spltty();
551 /* save the current state for later */
552 x = bus_space_read_4(es->st, es->sh, ES1371_REG_SMPRATE);
553 /* enable SRC state data in SRC mux */
554 bus_space_write_4(es->st, es->sh, ES1371_REG_SMPRATE,
555 (es1371_wait_src_ready(s) &
556 (ES1371_DIS_SRC | ES1371_DIS_P1 | ES1371_DIS_P2 | ES1371_DIS_R1)));
557 /* wait for a SAFE time to write addr/data and then do it, dammit */
558 for (t = 0; t < 0x1000; t++)
559 if ((bus_space_read_4(es->st, es->sh, ES1371_REG_SMPRATE) & 0x00070000) == 0x00010000)
560 break;
561
562 if (debug > 2) printf("one b_s_w: 0x%x 0x%x 0x%x\n", es->sh, ES1371_REG_CODEC,
563 ((addr << CODEC_POADD_SHIFT) & CODEC_POADD_MASK) |
564 ((data << CODEC_PODAT_SHIFT) & CODEC_PODAT_MASK));
565
566 bus_space_write_4(es->st, es->sh,ES1371_REG_CODEC,
567 ((addr << CODEC_POADD_SHIFT) & CODEC_POADD_MASK) |
568 ((data << CODEC_PODAT_SHIFT) & CODEC_PODAT_MASK));
569 /* restore SRC reg */
570 es1371_wait_src_ready(s);
571 if (debug > 2) printf("two b_s_w: 0x%x 0x%x 0x%x\n", es->sh, ES1371_REG_SMPRATE, x);
572 bus_space_write_4(es->st, es->sh, ES1371_REG_SMPRATE, x);
573 splx(sl);
574}
575
576static u_int32_t
577es1371_rdcodec(void *s, int addr)
578{
579 int sl;
580 unsigned t, x;
581 struct es_info *es = (struct es_info *)s;
582
583 if (debug > 0) printf("rdcodec addr 0x%x ... ", addr);
584
585 for (t = 0; t < 0x1000; t++)
586 if (!(x = bus_space_read_4(es->st, es->sh, ES1371_REG_CODEC) & CODEC_WIP))
587 break;
588 if (debug > 0) printf("loop 1 t 0x%x x 0x%x ", t, x);
589
590 sl = spltty();
591
592 /* save the current state for later */
593 x = bus_space_read_4(es->st, es->sh, ES1371_REG_SMPRATE);
594 /* enable SRC state data in SRC mux */
595 bus_space_write_4(es->st, es->sh, ES1371_REG_SMPRATE,
596 (es1371_wait_src_ready(s) &
597 (ES1371_DIS_SRC | ES1371_DIS_P1 | ES1371_DIS_P2 | ES1371_DIS_R1)));
598 /* wait for a SAFE time to write addr/data and then do it, dammit */
599 for (t = 0; t < 0x5000; t++)
600 if ((x = bus_space_read_4(es->st, es->sh, ES1371_REG_SMPRATE) & 0x00070000) == 0x00010000)
601 break;
602 if (debug > 0) printf("loop 2 t 0x%x x 0x%x ", t, x);
603 bus_space_write_4(es->st, es->sh, ES1371_REG_CODEC,
604 ((addr << CODEC_POADD_SHIFT) & CODEC_POADD_MASK) | CODEC_PORD);
605
606 /* restore SRC reg */
607 es1371_wait_src_ready(s);
608 bus_space_write_4(es->st, es->sh, ES1371_REG_SMPRATE, x);
609
610 splx(sl);
611
612 /* now wait for the stinkin' data (RDY) */
613 for (t = 0; t < 0x1000; t++)
614 if ((x = bus_space_read_4(es->st, es->sh, ES1371_REG_CODEC)) & CODEC_RDY)
615 break;
616 if (debug > 0) printf("loop 3 t 0x%x 0x%x ret 0x%x\n", t, x, ((x & CODEC_PIDAT_MASK) >> CODEC_PIDAT_SHIFT));
617 return ((x & CODEC_PIDAT_MASK) >> CODEC_PIDAT_SHIFT);
618}
619
620static u_int
621es1371_src_read(struct es_info *es, u_short reg)
622{
623 unsigned int r;
624
625 r = es1371_wait_src_ready(es) &
626 (ES1371_DIS_SRC | ES1371_DIS_P1 | ES1371_DIS_P2 | ES1371_DIS_R1);
627 r |= ES1371_SRC_RAM_ADDRO(reg);
628 bus_space_write_4(es->st, es->sh, ES1371_REG_SMPRATE,r);
629 return ES1371_SRC_RAM_DATAI(es1371_wait_src_ready(es));
630}
631
632static void
633es1371_src_write(struct es_info *es, u_short reg, u_short data){
634 u_int r;
635
636 r = es1371_wait_src_ready(es) &
637 (ES1371_DIS_SRC | ES1371_DIS_P1 | ES1371_DIS_P2 | ES1371_DIS_R1);
638 r |= ES1371_SRC_RAM_ADDRO(reg) | ES1371_SRC_RAM_DATAO(data);
639 /* printf("es1371_src_write 0x%x 0x%x\n",ES1371_REG_SMPRATE,r | ES1371_SRC_RAM_WE); */
640 bus_space_write_4(es->st, es->sh, ES1371_REG_SMPRATE, r | ES1371_SRC_RAM_WE);
641}
642
643static u_int
644es1371_adc_rate(struct es_info *es, u_int rate, int set)
645{
646 u_int n, truncm, freq, result;
647
648 if (rate > 48000) rate = 48000;
649 if (rate < 4000) rate = 4000;
650 n = rate / 3000;
651 if ((1 << n) & ((1 << 15) | (1 << 13) | (1 << 11) | (1 << 9)))
652 n--;
653 truncm = (21 * n - 1) | 1;
654 freq = ((48000UL << 15) / rate) * n;
655 result = (48000UL << 15) / (freq / n);
656 if (set) {
657 if (rate >= 24000) {
658 if (truncm > 239) truncm = 239;
659 es1371_src_write(es, ES_SMPREG_ADC + ES_SMPREG_TRUNC_N,
660 (((239 - truncm) >> 1) << 9) | (n << 4));
661 } else {
662 if (truncm > 119) truncm = 119;
663 es1371_src_write(es, ES_SMPREG_ADC + ES_SMPREG_TRUNC_N,
664 0x8000 | (((119 - truncm) >> 1) << 9) | (n << 4));
665 }
666 es1371_src_write(es, ES_SMPREG_ADC + ES_SMPREG_INT_REGS,
667 (es1371_src_read(es, ES_SMPREG_ADC + ES_SMPREG_INT_REGS) &
668 0x00ff) | ((freq >> 5) & 0xfc00));
669 es1371_src_write(es, ES_SMPREG_ADC + ES_SMPREG_VFREQ_FRAC, freq & 0x7fff);
670 es1371_src_write(es, ES_SMPREG_VOL_ADC, n << 8);
671 es1371_src_write(es, ES_SMPREG_VOL_ADC + 1, n << 8);
672 }
673 return result;
674}
675
676static u_int
677es1371_dac_rate(struct es_info *es, u_int rate, int set)
678{
679 u_int freq, r, result, dac, dis;
680
681 if (rate > 48000) rate = 48000;
682 if (rate < 4000) rate = 4000;
683 freq = (rate << 15) / 3000;
684 result = (freq * 3000) >> 15;
685 if (set) {
686 dac = (set == 1)? ES_SMPREG_DAC1 : ES_SMPREG_DAC2;
687 dis = (set == 1)? ES1371_DIS_P2 : ES1371_DIS_P1;
688
689 r = (es1371_wait_src_ready(es) & (ES1371_DIS_SRC | ES1371_DIS_P1 | ES1371_DIS_P2 | ES1371_DIS_R1));
690 bus_space_write_4(es->st, es->sh, ES1371_REG_SMPRATE, r);
691 es1371_src_write(es, dac + ES_SMPREG_INT_REGS,
692 (es1371_src_read(es, dac + ES_SMPREG_INT_REGS) & 0x00ff) | ((freq >> 5) & 0xfc00));
693 es1371_src_write(es, dac + ES_SMPREG_VFREQ_FRAC, freq & 0x7fff);
694 r = (es1371_wait_src_ready(es) & (ES1371_DIS_SRC | dis | ES1371_DIS_R1));
695 bus_space_write_4(es->st, es->sh, ES1371_REG_SMPRATE, r);
696 }
697 return result;
698}
699
700static u_int
701es1371_wait_src_ready(struct es_info *es)
702{
703 u_int t, r;
704
705 for (t = 0; t < 500; t++) {
706 if (!((r = bus_space_read_4(es->st, es->sh, ES1371_REG_SMPRATE)) & ES1371_SRC_RAM_BUSY))
707 return r;
708 DELAY(1000);
709 }
710 printf("es1371: wait src ready timeout 0x%x [0x%x]\n", ES1371_REG_SMPRATE, r);
711 return 0;
712}
713
714/* -------------------------------------------------------------------- */
715
716/*
717 * Probe and attach the card
718 */
719
720static int
721es_pci_probe(device_t dev)
722{
723 if (pci_get_devid(dev) == ES1370_PCI_ID) {
724 device_set_desc(dev, "AudioPCI ES1370");
725 return 0;
726 } else if (pci_get_devid(dev) == ES1371_PCI_ID ||
727 pci_get_devid(dev) == ES1371_PCI_ID2) {
728 device_set_desc(dev, "AudioPCI ES1371");
729 return 0;
730 }
731 return ENXIO;
732}
733
734static int
735es_pci_attach(device_t dev)
736{
737 snddev_info *d;
738 u_int32_t data;
739 struct es_info *es = 0;
740 int type = 0;
741 int regid;
742 struct resource *reg = 0;
743 int mapped;
744 int irqid;
745 struct resource *irq = 0;
746 void *ih = 0;
747 char status[SND_STATUSLEN];
748 struct ac97_info *codec;
749 pcm_channel *ct = NULL;
750
751 d = device_get_softc(dev);
752 if ((es = malloc(sizeof *es, M_DEVBUF, M_NOWAIT)) == NULL) {
753 device_printf(dev, "cannot allocate softc\n");
754 return ENXIO;
755 }
756 bzero(es, sizeof *es);
757
758 es->dev = dev;
759 mapped = 0;
760 data = pci_read_config(dev, PCIR_COMMAND, 2);
761 data |= (PCIM_CMD_PORTEN|PCIM_CMD_MEMEN|PCIM_CMD_BUSMASTEREN);
762 pci_write_config(dev, PCIR_COMMAND, data, 2);
763 data = pci_read_config(dev, PCIR_COMMAND, 2);
764 if (mapped == 0 && (data & PCIM_CMD_MEMEN)) {
765 regid = MEM_MAP_REG;
766 type = SYS_RES_MEMORY;
767 reg = bus_alloc_resource(dev, type, ®id,
768 0, ~0, 1, RF_ACTIVE);
769 if (reg) {
770 es->st = rman_get_bustag(reg);
771 es->sh = rman_get_bushandle(reg);
772 mapped++;
773 }
774 }
775 if (mapped == 0 && (data & PCIM_CMD_PORTEN)) {
776 regid = PCI_MAP_REG_START;
777 type = SYS_RES_IOPORT;
778 reg = bus_alloc_resource(dev, type, ®id,
779 0, ~0, 1, RF_ACTIVE);
780 if (reg) {
781 es->st = rman_get_bustag(reg);
782 es->sh = rman_get_bushandle(reg);
783 mapped++;
784 }
785 }
786 if (mapped == 0) {
787 device_printf(dev, "unable to map register space\n");
788 goto bad;
789 }
790
791 if (pci_get_devid(dev) == ES1371_PCI_ID ||
792 pci_get_devid(dev) == ES1371_PCI_ID2) {
793 if(-1 == es1371_init(es, pci_get_revid(dev))) {
794 device_printf(dev, "unable to initialize the card\n");
795 goto bad;
796 }
797 codec = ac97_create(dev, es, NULL, es1371_rdcodec, es1371_wrcodec);
798 if (codec == NULL) goto bad;
799 /* our init routine does everything for us */
800 /* set to NULL; flag mixer_init not to run the ac97_init */
801 /* ac97_mixer.init = NULL; */
802 if (mixer_init(d, &ac97_mixer, codec) == -1) goto bad;
803 ct = &es1371_chantemplate;
804 } else if (pci_get_devid(dev) == ES1370_PCI_ID) {
805 if (-1 == es1370_init(es)) {
806 device_printf(dev, "unable to initialize the card\n");
807 goto bad;
808 }
809 mixer_init(d, &es1370_mixer, es);
810 ct = &es1370_chantemplate;
811 } else goto bad;
812
813 irqid = 0;
814 irq = bus_alloc_resource(dev, SYS_RES_IRQ, &irqid,
815 0, ~0, 1, RF_ACTIVE | RF_SHAREABLE);
816 if (!irq
817 || bus_setup_intr(dev, irq, INTR_TYPE_TTY, es_intr, es, &ih)) {
818 device_printf(dev, "unable to map interrupt\n");
819 goto bad;
820 }
821
822 if (bus_dma_tag_create(/*parent*/NULL, /*alignment*/2, /*boundary*/0,
823 /*lowaddr*/BUS_SPACE_MAXADDR_32BIT,
824 /*highaddr*/BUS_SPACE_MAXADDR,
825 /*filter*/NULL, /*filterarg*/NULL,
826 /*maxsize*/ES_BUFFSIZE, /*nsegments*/1, /*maxsegz*/0x3ffff,
827 /*flags*/0, &es->parent_dmat) != 0) {
828 device_printf(dev, "unable to create dma tag\n");
829 goto bad;
830 }
831
832 snprintf(status, SND_STATUSLEN, "at %s 0x%lx irq %ld",
833 (type == SYS_RES_IOPORT)? "io" : "memory",
834 rman_get_start(reg), rman_get_start(irq));
835
836 if (pcm_register(dev, es, 1, 1)) goto bad;
837 pcm_addchan(dev, PCMDIR_REC, ct, es);
838 pcm_addchan(dev, PCMDIR_PLAY, ct, es);
839 pcm_setstatus(dev, status);
840
841 return 0;
842
843 bad:
844 if (es) free(es, M_DEVBUF);
845 if (reg) bus_release_resource(dev, type, regid, reg);
846 if (ih) bus_teardown_intr(dev, irq, ih);
847 if (irq) bus_release_resource(dev, SYS_RES_IRQ, irqid, irq);
848 return ENXIO;
849}
850
851static device_method_t es_methods[] = {
852 /* Device interface */
853 DEVMETHOD(device_probe, es_pci_probe),
854 DEVMETHOD(device_attach, es_pci_attach),
855
856 { 0, 0 }
857};
858
859static driver_t es_driver = {
860 "pcm",
861 es_methods,
862 sizeof(snddev_info),
863};
864
865static devclass_t pcm_devclass;
866
867DRIVER_MODULE(es, pci, es_driver, pcm_devclass, 0, 0);