1/*
2 * file: mss.h
3 *
4 * (C) 1997 Luigi Rizzo (luigi@iet.unipi.it)
5 *
6 * This file contains information and macro definitions for
7 * AD1848-compatible devices, used in the MSS/WSS compatible boards.
8 *
9 */
10
11/*
12 *
13
14The codec part of the board is seen as a set of 4 registers mapped
15at the base address for the board (default 0x534). Note that some
16(early) boards implemented 4 additional registers 4 location before
17(usually 0x530) to store configuration information. This is a source
18of confusion in that one never knows what address to specify. The
19(current) convention is to use the old address (0x530) in the kernel
20configuration file and consider MSS registers start four location
21ahead.
22
23 *
24 */
25
26/*
27 * The four visible registers of the MSS :
28 *
29 */
30
31#define io_Index_Addr(d) ((d)->io_base + 4)
32#define IA_BUSY 0x80 /* readonly, set when busy */
33#define IA_MCE 0x40 /* the MCE bit. */
34 /*
35 * the MCE bit must be set whenever the current mode of the
36 * codec is changed; this in particular is true for the
37 * Data Format (I8, I28) and Interface Config(I9) registers.
38 * Only exception are CEN and PEN which can be changed on the fly.
39 * The DAC output is muted when MCE is set.
40 */
41#define IA_TRD 0x20 /* Transfer request disable */
42 /*
43 * When TRD is set, DMA transfers cease when the INT bit in
44 * the MSS status reg is set. Must be cleared for automode
45 * DMA, set otherwise.
46 */
47#define IA_AMASK 0x1f /* mask for indirect address */
48
49#define io_Indexed_Data(d) ((d)->io_base+1+4)
50 /*
51 * data to be transferred to the indirect register addressed
52 * by index addr. During init and sw. powerdown, cannot be
53 * written to, and is always read as 0x80 (consistent with the
54 * busy flag).
55 */
56
57#define io_Status(d) ((d)->io_base+2+4)
58
59#define IS_CUL 0x80 /* capture upper/lower */
60#define IS_CLR 0x40 /* capture left/right */
61#define IS_CRDY 0x20 /* capture ready for programmed i/o */
62#define IS_SER 0x10 /* sample error (overrun/underrun) */
63#define IS_PUL 0x08 /* playback upper/lower */
64#define IS_PLR 0x04 /* playback left/right */
65#define IS_PRDY 0x02 /* playback ready for programmed i/o */
66#define IS_INT 0x01 /* int status (1 = active) */
67 /*
68 * IS_INT is clreared by any write to the status register.
69 */
70
71#define io_Polled_IO(d) ((d)->io_base+3+4)
72 /*
73 * this register is used in case of polled i/o
74 */
75
76/*
77 * The MSS has a set of 16 (or 32 depending on the model) indirect
78 * registers accessible through the data port by specifying the
79 * appropriate address in the address register.
80 *
81 * The 16 low registers are uniformly handled in AD1848/CS4248 compatible
82 * mode (often called MODE1). For the upper 16 registers there are
83 * some differences among different products, mainly Crystal uses them
84 * differently from OPTi.
85 *
86 */
87
88/*
89 * volume registers
90 */
91
92#define I6_MUTE 0x80
93
94/*
95 * register I9 -- interface configuration.
96 */
97
98#define I9_PEN 0x01 /* playback enable */
99#define I9_CEN 0x02 /* capture enable */
100
101/*
102 * values used in bd_flags
103 */
104#define BD_F_MCE_BIT 0x0001
105#define BD_F_IRQ_OK 0x0002
106#define BD_F_TMR_RUN 0x0004
107
108
109/*
110 * sound/ad1848_mixer.h
111 *
112 * Definitions for the mixer of AD1848 and compatible codecs.
113 *
114 * Copyright by Hannu Savolainen 1994
115 *
116 * Redistribution and use in source and binary forms, with or without
117 * modification, are permitted provided that the following conditions are
118 * met: 1. Redistributions of source code must retain the above copyright
119 * notice, this list of conditions and the following disclaimer. 2.
120 * Redistributions in binary form must reproduce the above copyright notice,
121 * this list of conditions and the following disclaimer in the documentation
122 * and/or other materials provided with the distribution.
123 *
124 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND ANY
125 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
126 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
127 * DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR
128 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
129 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
130 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
131 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
132 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
133 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
134 * SUCH DAMAGE.
135 */
136/*
137 * The AD1848 codec has generic input lines called Line, Aux1 and Aux2.
138 * Soundcard manufacturers have connected actual inputs (CD, synth, line,
139 * etc) to these inputs in different order. Therefore it's difficult
140 * to assign mixer channels to to these inputs correctly. The following
141 * contains two alternative mappings. The first one is for GUS MAX and
142 * the second is just a generic one (line1, line2 and line3).
143 * (Actually this is not a mapping but rather some kind of interleaving
144 * solution).
145 */
146#define GUSMAX_MIXER
147#ifdef GUSMAX_MIXER
148#define MODE1_REC_DEVICES \
149 (SOUND_MASK_LINE | SOUND_MASK_MIC | SOUND_MASK_CD|SOUND_MASK_IMIX)
150
151#define MODE1_MIXER_DEVICES \
152 (SOUND_MASK_SYNTH | SOUND_MASK_MIC | SOUND_MASK_CD | \
153 SOUND_MASK_IGAIN | SOUND_MASK_PCM|SOUND_MASK_IMIX)
154
155#define MODE2_MIXER_DEVICES \
156 (SOUND_MASK_SYNTH | SOUND_MASK_LINE | SOUND_MASK_MIC | \
157 SOUND_MASK_CD | SOUND_MASK_SPEAKER | SOUND_MASK_IGAIN | \
158 SOUND_MASK_PCM | SOUND_MASK_IMIX)
159
160#else /* Generic mapping */
161
162#define MODE1_REC_DEVICES \
163 (SOUND_MASK_LINE3 | SOUND_MASK_MIC | SOUND_MASK_LINE1|SOUND_MASK_IMIX)
164
165#define MODE1_MIXER_DEVICES \
166 (SOUND_MASK_LINE1 | SOUND_MASK_MIC | SOUND_MASK_LINE2 | \
167 SOUND_MASK_IGAIN | SOUND_MASK_PCM | SOUND_MASK_IMIX)
168
169#define MODE2_MIXER_DEVICES \
170 (SOUND_MASK_LINE1 | SOUND_MASK_MIC | SOUND_MASK_LINE2 | \
171 SOUND_MASK_LINE3 | SOUND_MASK_SPEAKER | \
172 SOUND_MASK_IGAIN | SOUND_MASK_PCM | SOUND_MASK_IMIX)
173#endif
174
175#define OPTI931_MIXER_DEVICES \
176 (SOUND_MASK_VOLUME | SOUND_MASK_SYNTH | SOUND_MASK_PCM | \
177 SOUND_MASK_LINE | SOUND_MASK_MIC | SOUND_MASK_CD | SOUND_MASK_IGAIN )
178
179/*
180 * Most of the mixer entries work in backwards. Setting the polarity field
181 * makes them to work correctly.
182 *
183 * The channel numbering used by individual soundcards is not fixed.
184 * Some cards have assigned different meanings for the AUX1, AUX2
185 * and LINE inputs. Some have different features...
186 * The current version doesn't try to compensate this.
187 *
188 */
189
190mixer_ent mix_devices[32][2] = { /* As used in GUS MAX */
191MIX_ENT(SOUND_MIXER_VOLUME, 0, 0, 0, 0, 0, 0, 0, 0),
192MIX_ENT(SOUND_MIXER_BASS, 0, 0, 0, 0, 0, 0, 0, 0),
193MIX_ENT(SOUND_MIXER_TREBLE, 0, 0, 0, 0, 0, 0, 0, 0),
194MIX_ENT(SOUND_MIXER_SYNTH, 4, 1, 0, 5, 5, 1, 0, 5),
195MIX_ENT(SOUND_MIXER_PCM, 6, 1, 0, 6, 7, 1, 0, 6),
196MIX_ENT(SOUND_MIXER_SPEAKER, 26, 1, 0, 4, 0, 0, 0, 0),
197MIX_ENT(SOUND_MIXER_LINE, 18, 1, 0, 5, 19, 1, 0, 5),
198MIX_ENT(SOUND_MIXER_MIC, 0, 0, 5, 1, 1, 0, 5, 1),
199MIX_ENT(SOUND_MIXER_CD, 2, 1, 0, 5, 3, 1, 0, 5),
200MIX_ENT(SOUND_MIXER_IMIX, 13, 1, 2, 6, 0, 0, 0, 0),
201MIX_ENT(SOUND_MIXER_ALTPCM, 0, 0, 0, 0, 0, 0, 0, 0),
202MIX_ENT(SOUND_MIXER_RECLEV, 0, 0, 0, 0, 0, 0, 0, 0),
203MIX_ENT(SOUND_MIXER_IGAIN, 0, 0, 0, 4, 1, 0, 0, 4),
204MIX_ENT(SOUND_MIXER_OGAIN, 0, 0, 0, 0, 0, 0, 0, 0),
205MIX_ENT(SOUND_MIXER_LINE1, 2, 1, 0, 5, 3, 1, 0, 5),
206MIX_ENT(SOUND_MIXER_LINE2, 4, 1, 0, 5, 5, 1, 0, 5),
207MIX_ENT(SOUND_MIXER_LINE3, 18, 1, 0, 5, 19, 1, 0, 5)
208};
209
210mixer_ent opti931_devices[32][2] = { /* for the opti931 */
211MIX_ENT(SOUND_MIXER_VOLUME, 22, 1, 1, 5, 23, 1, 1, 5),
212MIX_ENT(SOUND_MIXER_BASS, 0, 0, 0, 0, 0, 0, 0, 0),
213MIX_ENT(SOUND_MIXER_TREBLE, 0, 0, 0, 0, 0, 0, 0, 0),
214MIX_ENT(SOUND_MIXER_SYNTH, 4, 1, 1, 4, 5, 1, 1, 4),
215MIX_ENT(SOUND_MIXER_PCM, 6, 1, 0, 5, 7, 1, 0, 5),
216MIX_ENT(SOUND_MIXER_SPEAKER, 0, 0, 0, 0, 0, 0, 0, 0),
217MIX_ENT(SOUND_MIXER_LINE, 18, 1, 1, 4, 19, 1, 1, 4),
218MIX_ENT(SOUND_MIXER_MIC, 0, 0, 5, 1, 1, 0, 5, 1),
219MIX_ENT(SOUND_MIXER_CD, 2, 1, 1, 4, 3, 1, 1, 4),
220MIX_ENT(SOUND_MIXER_IMIX, 0, 0, 0, 0, 0, 0, 0, 0),
221MIX_ENT(SOUND_MIXER_ALTPCM, 0, 0, 0, 0, 0, 0, 0, 0),
222MIX_ENT(SOUND_MIXER_RECLEV, 0, 0, 0, 0, 0, 0, 0, 0),
223MIX_ENT(SOUND_MIXER_IGAIN, 0, 0, 0, 4, 1, 0, 0, 4),
224MIX_ENT(SOUND_MIXER_OGAIN, 0, 0, 0, 0, 0, 0, 0, 0),
225MIX_ENT(SOUND_MIXER_LINE1, 2, 1, 0, 5, 3, 1, 0, 5),
226MIX_ENT(SOUND_MIXER_LINE2, 4, 1, 0, 5, 5, 1, 0, 5),
227MIX_ENT(SOUND_MIXER_LINE3, 18, 1, 0, 5, 19, 1, 0, 5)
228};
229
230static u_short default_mixer_levels[SOUND_MIXER_NRDEVICES] = {
231 0x5a5a, /* Master Volume */
232 0x3232, /* Bass */
233 0x3232, /* Treble */
234 0x4b4b, /* FM */
235 0x4040, /* PCM */
236 0x4b4b, /* PC Speaker */
237 0x2020, /* Ext Line */
238 0x4040, /* Mic */
239 0x4b4b, /* CD */
240 0x0000, /* Recording monitor */
241 0x4b4b, /* SB PCM */
242 0x4b4b, /* Recording level */
243 0x2525, /* Input gain */
244 0x0000, /* Output gain */
245 /* 0x4040, Line1 */
246 0x0000, /* Line1 */
247 0x0000, /* Line2 */
248 0x1515 /* Line3 (usually line in)*/
249};
250
2 * file: mss.h
3 *
4 * (C) 1997 Luigi Rizzo (luigi@iet.unipi.it)
5 *
6 * This file contains information and macro definitions for
7 * AD1848-compatible devices, used in the MSS/WSS compatible boards.
8 *
9 */
10
11/*
12 *
13
14The codec part of the board is seen as a set of 4 registers mapped
15at the base address for the board (default 0x534). Note that some
16(early) boards implemented 4 additional registers 4 location before
17(usually 0x530) to store configuration information. This is a source
18of confusion in that one never knows what address to specify. The
19(current) convention is to use the old address (0x530) in the kernel
20configuration file and consider MSS registers start four location
21ahead.
22
23 *
24 */
25
26/*
27 * The four visible registers of the MSS :
28 *
29 */
30
31#define io_Index_Addr(d) ((d)->io_base + 4)
32#define IA_BUSY 0x80 /* readonly, set when busy */
33#define IA_MCE 0x40 /* the MCE bit. */
34 /*
35 * the MCE bit must be set whenever the current mode of the
36 * codec is changed; this in particular is true for the
37 * Data Format (I8, I28) and Interface Config(I9) registers.
38 * Only exception are CEN and PEN which can be changed on the fly.
39 * The DAC output is muted when MCE is set.
40 */
41#define IA_TRD 0x20 /* Transfer request disable */
42 /*
43 * When TRD is set, DMA transfers cease when the INT bit in
44 * the MSS status reg is set. Must be cleared for automode
45 * DMA, set otherwise.
46 */
47#define IA_AMASK 0x1f /* mask for indirect address */
48
49#define io_Indexed_Data(d) ((d)->io_base+1+4)
50 /*
51 * data to be transferred to the indirect register addressed
52 * by index addr. During init and sw. powerdown, cannot be
53 * written to, and is always read as 0x80 (consistent with the
54 * busy flag).
55 */
56
57#define io_Status(d) ((d)->io_base+2+4)
58
59#define IS_CUL 0x80 /* capture upper/lower */
60#define IS_CLR 0x40 /* capture left/right */
61#define IS_CRDY 0x20 /* capture ready for programmed i/o */
62#define IS_SER 0x10 /* sample error (overrun/underrun) */
63#define IS_PUL 0x08 /* playback upper/lower */
64#define IS_PLR 0x04 /* playback left/right */
65#define IS_PRDY 0x02 /* playback ready for programmed i/o */
66#define IS_INT 0x01 /* int status (1 = active) */
67 /*
68 * IS_INT is clreared by any write to the status register.
69 */
70
71#define io_Polled_IO(d) ((d)->io_base+3+4)
72 /*
73 * this register is used in case of polled i/o
74 */
75
76/*
77 * The MSS has a set of 16 (or 32 depending on the model) indirect
78 * registers accessible through the data port by specifying the
79 * appropriate address in the address register.
80 *
81 * The 16 low registers are uniformly handled in AD1848/CS4248 compatible
82 * mode (often called MODE1). For the upper 16 registers there are
83 * some differences among different products, mainly Crystal uses them
84 * differently from OPTi.
85 *
86 */
87
88/*
89 * volume registers
90 */
91
92#define I6_MUTE 0x80
93
94/*
95 * register I9 -- interface configuration.
96 */
97
98#define I9_PEN 0x01 /* playback enable */
99#define I9_CEN 0x02 /* capture enable */
100
101/*
102 * values used in bd_flags
103 */
104#define BD_F_MCE_BIT 0x0001
105#define BD_F_IRQ_OK 0x0002
106#define BD_F_TMR_RUN 0x0004
107
108
109/*
110 * sound/ad1848_mixer.h
111 *
112 * Definitions for the mixer of AD1848 and compatible codecs.
113 *
114 * Copyright by Hannu Savolainen 1994
115 *
116 * Redistribution and use in source and binary forms, with or without
117 * modification, are permitted provided that the following conditions are
118 * met: 1. Redistributions of source code must retain the above copyright
119 * notice, this list of conditions and the following disclaimer. 2.
120 * Redistributions in binary form must reproduce the above copyright notice,
121 * this list of conditions and the following disclaimer in the documentation
122 * and/or other materials provided with the distribution.
123 *
124 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND ANY
125 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
126 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
127 * DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR
128 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
129 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
130 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
131 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
132 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
133 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
134 * SUCH DAMAGE.
135 */
136/*
137 * The AD1848 codec has generic input lines called Line, Aux1 and Aux2.
138 * Soundcard manufacturers have connected actual inputs (CD, synth, line,
139 * etc) to these inputs in different order. Therefore it's difficult
140 * to assign mixer channels to to these inputs correctly. The following
141 * contains two alternative mappings. The first one is for GUS MAX and
142 * the second is just a generic one (line1, line2 and line3).
143 * (Actually this is not a mapping but rather some kind of interleaving
144 * solution).
145 */
146#define GUSMAX_MIXER
147#ifdef GUSMAX_MIXER
148#define MODE1_REC_DEVICES \
149 (SOUND_MASK_LINE | SOUND_MASK_MIC | SOUND_MASK_CD|SOUND_MASK_IMIX)
150
151#define MODE1_MIXER_DEVICES \
152 (SOUND_MASK_SYNTH | SOUND_MASK_MIC | SOUND_MASK_CD | \
153 SOUND_MASK_IGAIN | SOUND_MASK_PCM|SOUND_MASK_IMIX)
154
155#define MODE2_MIXER_DEVICES \
156 (SOUND_MASK_SYNTH | SOUND_MASK_LINE | SOUND_MASK_MIC | \
157 SOUND_MASK_CD | SOUND_MASK_SPEAKER | SOUND_MASK_IGAIN | \
158 SOUND_MASK_PCM | SOUND_MASK_IMIX)
159
160#else /* Generic mapping */
161
162#define MODE1_REC_DEVICES \
163 (SOUND_MASK_LINE3 | SOUND_MASK_MIC | SOUND_MASK_LINE1|SOUND_MASK_IMIX)
164
165#define MODE1_MIXER_DEVICES \
166 (SOUND_MASK_LINE1 | SOUND_MASK_MIC | SOUND_MASK_LINE2 | \
167 SOUND_MASK_IGAIN | SOUND_MASK_PCM | SOUND_MASK_IMIX)
168
169#define MODE2_MIXER_DEVICES \
170 (SOUND_MASK_LINE1 | SOUND_MASK_MIC | SOUND_MASK_LINE2 | \
171 SOUND_MASK_LINE3 | SOUND_MASK_SPEAKER | \
172 SOUND_MASK_IGAIN | SOUND_MASK_PCM | SOUND_MASK_IMIX)
173#endif
174
175#define OPTI931_MIXER_DEVICES \
176 (SOUND_MASK_VOLUME | SOUND_MASK_SYNTH | SOUND_MASK_PCM | \
177 SOUND_MASK_LINE | SOUND_MASK_MIC | SOUND_MASK_CD | SOUND_MASK_IGAIN )
178
179/*
180 * Most of the mixer entries work in backwards. Setting the polarity field
181 * makes them to work correctly.
182 *
183 * The channel numbering used by individual soundcards is not fixed.
184 * Some cards have assigned different meanings for the AUX1, AUX2
185 * and LINE inputs. Some have different features...
186 * The current version doesn't try to compensate this.
187 *
188 */
189
190mixer_ent mix_devices[32][2] = { /* As used in GUS MAX */
191MIX_ENT(SOUND_MIXER_VOLUME, 0, 0, 0, 0, 0, 0, 0, 0),
192MIX_ENT(SOUND_MIXER_BASS, 0, 0, 0, 0, 0, 0, 0, 0),
193MIX_ENT(SOUND_MIXER_TREBLE, 0, 0, 0, 0, 0, 0, 0, 0),
194MIX_ENT(SOUND_MIXER_SYNTH, 4, 1, 0, 5, 5, 1, 0, 5),
195MIX_ENT(SOUND_MIXER_PCM, 6, 1, 0, 6, 7, 1, 0, 6),
196MIX_ENT(SOUND_MIXER_SPEAKER, 26, 1, 0, 4, 0, 0, 0, 0),
197MIX_ENT(SOUND_MIXER_LINE, 18, 1, 0, 5, 19, 1, 0, 5),
198MIX_ENT(SOUND_MIXER_MIC, 0, 0, 5, 1, 1, 0, 5, 1),
199MIX_ENT(SOUND_MIXER_CD, 2, 1, 0, 5, 3, 1, 0, 5),
200MIX_ENT(SOUND_MIXER_IMIX, 13, 1, 2, 6, 0, 0, 0, 0),
201MIX_ENT(SOUND_MIXER_ALTPCM, 0, 0, 0, 0, 0, 0, 0, 0),
202MIX_ENT(SOUND_MIXER_RECLEV, 0, 0, 0, 0, 0, 0, 0, 0),
203MIX_ENT(SOUND_MIXER_IGAIN, 0, 0, 0, 4, 1, 0, 0, 4),
204MIX_ENT(SOUND_MIXER_OGAIN, 0, 0, 0, 0, 0, 0, 0, 0),
205MIX_ENT(SOUND_MIXER_LINE1, 2, 1, 0, 5, 3, 1, 0, 5),
206MIX_ENT(SOUND_MIXER_LINE2, 4, 1, 0, 5, 5, 1, 0, 5),
207MIX_ENT(SOUND_MIXER_LINE3, 18, 1, 0, 5, 19, 1, 0, 5)
208};
209
210mixer_ent opti931_devices[32][2] = { /* for the opti931 */
211MIX_ENT(SOUND_MIXER_VOLUME, 22, 1, 1, 5, 23, 1, 1, 5),
212MIX_ENT(SOUND_MIXER_BASS, 0, 0, 0, 0, 0, 0, 0, 0),
213MIX_ENT(SOUND_MIXER_TREBLE, 0, 0, 0, 0, 0, 0, 0, 0),
214MIX_ENT(SOUND_MIXER_SYNTH, 4, 1, 1, 4, 5, 1, 1, 4),
215MIX_ENT(SOUND_MIXER_PCM, 6, 1, 0, 5, 7, 1, 0, 5),
216MIX_ENT(SOUND_MIXER_SPEAKER, 0, 0, 0, 0, 0, 0, 0, 0),
217MIX_ENT(SOUND_MIXER_LINE, 18, 1, 1, 4, 19, 1, 1, 4),
218MIX_ENT(SOUND_MIXER_MIC, 0, 0, 5, 1, 1, 0, 5, 1),
219MIX_ENT(SOUND_MIXER_CD, 2, 1, 1, 4, 3, 1, 1, 4),
220MIX_ENT(SOUND_MIXER_IMIX, 0, 0, 0, 0, 0, 0, 0, 0),
221MIX_ENT(SOUND_MIXER_ALTPCM, 0, 0, 0, 0, 0, 0, 0, 0),
222MIX_ENT(SOUND_MIXER_RECLEV, 0, 0, 0, 0, 0, 0, 0, 0),
223MIX_ENT(SOUND_MIXER_IGAIN, 0, 0, 0, 4, 1, 0, 0, 4),
224MIX_ENT(SOUND_MIXER_OGAIN, 0, 0, 0, 0, 0, 0, 0, 0),
225MIX_ENT(SOUND_MIXER_LINE1, 2, 1, 0, 5, 3, 1, 0, 5),
226MIX_ENT(SOUND_MIXER_LINE2, 4, 1, 0, 5, 5, 1, 0, 5),
227MIX_ENT(SOUND_MIXER_LINE3, 18, 1, 0, 5, 19, 1, 0, 5)
228};
229
230static u_short default_mixer_levels[SOUND_MIXER_NRDEVICES] = {
231 0x5a5a, /* Master Volume */
232 0x3232, /* Bass */
233 0x3232, /* Treble */
234 0x4b4b, /* FM */
235 0x4040, /* PCM */
236 0x4b4b, /* PC Speaker */
237 0x2020, /* Ext Line */
238 0x4040, /* Mic */
239 0x4b4b, /* CD */
240 0x0000, /* Recording monitor */
241 0x4b4b, /* SB PCM */
242 0x4b4b, /* Recording level */
243 0x2525, /* Input gain */
244 0x0000, /* Output gain */
245 /* 0x4040, Line1 */
246 0x0000, /* Line1 */
247 0x0000, /* Line2 */
248 0x1515 /* Line3 (usually line in)*/
249};
250