34/*
35 * This is a driver for SMC's 9000 series of Ethernet adapters.
36 *
37 * This FreeBSD driver is derived from the smc9194 Linux driver by
38 * Erik Stahlman and is Copyright (C) 1996 by Erik Stahlman.
39 * This driver also shamelessly borrows from the FreeBSD ep driver
40 * which is Copyright (C) 1994 Herb Peyerl <hpeyerl@novatel.ca>
41 * All rights reserved.
42 *
43 * It is set up for my SMC91C92 equipped Ampro LittleBoard embedded
44 * PC. It is adapted from Erik Stahlman's Linux driver which worked
45 * with his EFA Info*Express SVC VLB adaptor. According to SMC's databook,
46 * it will work for the entire SMC 9xxx series. (Ha Ha)
47 *
48 * "Features" of the SMC chip:
49 * 4608 byte packet memory. (for the 91C92. Others have more)
50 * EEPROM for configuration
51 * AUI/TP selection
52 *
53 * Authors:
54 * Erik Stahlman erik@vt.edu
55 * Herb Peyerl hpeyerl@novatel.ca
56 * Andres Vega Garcia avega@sophia.inria.fr
57 * Serge Babkin babkin@hq.icb.chel.su
58 * Gardner Buchanan gbuchanan@shl.com
59 *
60 * Sources:
61 * o SMC databook
62 * o "smc9194.c:v0.10(FIXED) 02/15/96 by Erik Stahlman (erik@vt.edu)"
63 * o "if_ep.c,v 1.19 1995/01/24 20:53:45 davidg Exp"
64 *
65 * Known Bugs:
66 * o The hardware multicast filter isn't used yet.
67 * o Setting of the hardware address isn't supported.
68 * o Hardware padding isn't used.
69 */
70
71/*
72 * Modifications for Megahertz X-Jack Ethernet Card (XJ-10BT)
73 *
74 * Copyright (c) 1996 by Tatsumi Hosokawa <hosokawa@jp.FreeBSD.org>
75 * BSD-nomads, Tokyo, Japan.
76 */
77/*
78 * Multicast support by Kei TANAKA <kei@pal.xerox.com>
79 * Special thanks to itojun@itojun.org
80 */
81
82#include <sys/param.h>
83#include <sys/systm.h>
84#include <sys/errno.h>
85#include <sys/sockio.h>
86#include <sys/mbuf.h>
87#include <sys/socket.h>
88#include <sys/syslog.h>
89
90#include <sys/module.h>
91#include <sys/bus.h>
92
93#include <machine/bus.h>
94#include <machine/resource.h>
95#include <sys/rman.h>
96
97#include <net/ethernet.h>
98#include <net/if.h>
99#include <net/if_arp.h>
100#include <net/if_dl.h>
101#include <net/if_types.h>
102#include <net/if_mib.h>
103
104#ifdef INET
105#include <netinet/in.h>
106#include <netinet/in_systm.h>
107#include <netinet/in_var.h>
108#include <netinet/ip.h>
109#endif
110
111#include <net/bpf.h>
112#include <net/bpfdesc.h>
113
114
115#include <dev/sn/if_snreg.h>
116#include <dev/sn/if_snvar.h>
117
118/* Exported variables */
119devclass_t sn_devclass;
120
121static int snioctl(struct ifnet * ifp, u_long, caddr_t);
122
123static void snresume(struct ifnet *);
124
125void sninit(void *);
126void snread(struct ifnet *);
127void snreset(struct sn_softc *);
128void snstart(struct ifnet *);
129void snstop(struct sn_softc *);
130void snwatchdog(struct ifnet *);
131
132static void sn_setmcast(struct sn_softc *);
133static int sn_getmcf(struct arpcom *ac, u_char *mcf);
134static u_int smc_crc(u_char *);
135
136/* I (GB) have been unlucky getting the hardware padding
137 * to work properly.
138 */
139#define SW_PAD
140
141static const char *chip_ids[15] = {
142 NULL, NULL, NULL,
143 /* 3 */ "SMC91C90/91C92",
144 /* 4 */ "SMC91C94",
145 /* 5 */ "SMC91C95",
146 NULL,
147 /* 7 */ "SMC91C100",
148 /* 8 */ "SMC91C100FD",
149 NULL, NULL, NULL,
150 NULL, NULL, NULL
151};
152
153int
154sn_attach(device_t dev)
155{
156 struct sn_softc *sc = device_get_softc(dev);
157 struct ifnet *ifp = &sc->arpcom.ac_if;
158 u_short i;
159 u_char *p;
160 struct ifaddr *ifa;
161 struct sockaddr_dl *sdl;
162 int rev;
163 u_short address;
164 int j;
165
166 sn_activate(dev);
167
168 snstop(sc);
169
170 sc->dev = dev;
171 sc->pages_wanted = -1;
172
173 device_printf(dev, " ");
174
175 SMC_SELECT_BANK(3);
176 rev = inw(BASE + REVISION_REG_W);
177 if (chip_ids[(rev >> 4) & 0xF])
178 printf("%s ", chip_ids[(rev >> 4) & 0xF]);
179
180 SMC_SELECT_BANK(1);
181 i = inw(BASE + CONFIG_REG_W);
182 printf(i & CR_AUI_SELECT ? "AUI" : "UTP");
183
184 if (sc->pccard_enaddr)
185 for (j = 0; j < 3; j++) {
186 u_short w;
187
188 w = (u_short)sc->arpcom.ac_enaddr[j * 2] |
189 (((u_short)sc->arpcom.ac_enaddr[j * 2 + 1]) << 8);
190 outw(BASE + IAR_ADDR0_REG_W + j * 2, w);
191 }
192
193 /*
194 * Read the station address from the chip. The MAC address is bank 1,
195 * regs 4 - 9
196 */
197 SMC_SELECT_BANK(1);
198 p = (u_char *) & sc->arpcom.ac_enaddr;
199 for (i = 0; i < 6; i += 2) {
200 address = inw(BASE + IAR_ADDR0_REG_W + i);
201 p[i + 1] = address >> 8;
202 p[i] = address & 0xFF;
203 }
204 printf(" MAC address %6D\n", sc->arpcom.ac_enaddr, ":");
205 ifp->if_softc = sc;
206 ifp->if_unit = device_get_unit(dev);
207 ifp->if_name = "sn";
208 ifp->if_mtu = ETHERMTU;
209 ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST;
210 ifp->if_output = ether_output;
211 ifp->if_start = snstart;
212 ifp->if_ioctl = snioctl;
213 ifp->if_watchdog = snwatchdog;
214 ifp->if_init = sninit;
215 ifp->if_snd.ifq_maxlen = IFQ_MAXLEN;
216 ifp->if_timer = 0;
217
218 ether_ifattach(ifp, sc->arpcom.ac_enaddr);
219
220 /*
221 * Fill the hardware address into ifa_addr if we find an AF_LINK
222 * entry. We need to do this so bpf's can get the hardware addr of
223 * this card. netstat likes this too!
224 */
225 ifa = TAILQ_FIRST(&ifp->if_addrhead);
226 while ((ifa != 0) && (ifa->ifa_addr != 0) &&
227 (ifa->ifa_addr->sa_family != AF_LINK))
228 ifa = TAILQ_NEXT(ifa, ifa_link);
229
230 if ((ifa != 0) && (ifa->ifa_addr != 0)) {
231 sdl = (struct sockaddr_dl *) ifa->ifa_addr;
232 sdl->sdl_type = IFT_ETHER;
233 sdl->sdl_alen = ETHER_ADDR_LEN;
234 sdl->sdl_slen = 0;
235 bcopy(sc->arpcom.ac_enaddr, LLADDR(sdl), ETHER_ADDR_LEN);
236 }
237
238 return 0;
239}
240
241
242int
243sn_detach(device_t dev)
244{
245 struct sn_softc *sc = device_get_softc(dev);
246
247 sc->arpcom.ac_if.if_flags &= ~IFF_RUNNING;
248 ether_ifdetach(&sc->arpcom.ac_if);
249 sn_deactivate(dev);
250 return 0;
251}
252
253/*
254 * Reset and initialize the chip
255 */
256void
257sninit(void *xsc)
258{
259 register struct sn_softc *sc = xsc;
260 register struct ifnet *ifp = &sc->arpcom.ac_if;
261 int s;
262 int flags;
263 int mask;
264
265 s = splimp();
266
267 /*
268 * This resets the registers mostly to defaults, but doesn't affect
269 * EEPROM. After the reset cycle, we pause briefly for the chip to
270 * be happy.
271 */
272 SMC_SELECT_BANK(0);
273 outw(BASE + RECV_CONTROL_REG_W, RCR_SOFTRESET);
274 SMC_DELAY();
275 outw(BASE + RECV_CONTROL_REG_W, 0x0000);
276 SMC_DELAY();
277 SMC_DELAY();
278
279 outw(BASE + TXMIT_CONTROL_REG_W, 0x0000);
280
281 /*
282 * Set the control register to automatically release succesfully
283 * transmitted packets (making the best use out of our limited
284 * memory) and to enable the EPH interrupt on certain TX errors.
285 */
286 SMC_SELECT_BANK(1);
287 outw(BASE + CONTROL_REG_W, (CTR_AUTO_RELEASE | CTR_TE_ENABLE |
288 CTR_CR_ENABLE | CTR_LE_ENABLE));
289
290 /* Set squelch level to 240mV (default 480mV) */
291 flags = inw(BASE + CONFIG_REG_W);
292 flags |= CR_SET_SQLCH;
293 outw(BASE + CONFIG_REG_W, flags);
294
295 /*
296 * Reset the MMU and wait for it to be un-busy.
297 */
298 SMC_SELECT_BANK(2);
299 outw(BASE + MMU_CMD_REG_W, MMUCR_RESET);
300 while (inw(BASE + MMU_CMD_REG_W) & MMUCR_BUSY) /* NOTHING */
301 ;
302
303 /*
304 * Disable all interrupts
305 */
306 outb(BASE + INTR_MASK_REG_B, 0x00);
307
308 sn_setmcast(sc);
309
310 /*
311 * Set the transmitter control. We want it enabled.
312 */
313 flags = TCR_ENABLE;
314
315#ifndef SW_PAD
316 /*
317 * I (GB) have been unlucky getting this to work.
318 */
319 flags |= TCR_PAD_ENABLE;
320#endif /* SW_PAD */
321
322 outw(BASE + TXMIT_CONTROL_REG_W, flags);
323
324
325 /*
326 * Now, enable interrupts
327 */
328 SMC_SELECT_BANK(2);
329
330 mask = IM_EPH_INT |
331 IM_RX_OVRN_INT |
332 IM_RCV_INT |
333 IM_TX_INT;
334
335 outb(BASE + INTR_MASK_REG_B, mask);
336 sc->intr_mask = mask;
337 sc->pages_wanted = -1;
338
339
340 /*
341 * Mark the interface running but not active.
342 */
343 ifp->if_flags |= IFF_RUNNING;
344 ifp->if_flags &= ~IFF_OACTIVE;
345
346 /*
347 * Attempt to push out any waiting packets.
348 */
349 snstart(ifp);
350
351 splx(s);
352}
353
354
355void
356snstart(struct ifnet *ifp)
357{
358 register struct sn_softc *sc = ifp->if_softc;
359 register u_int len;
360 register struct mbuf *m;
361 struct mbuf *top;
362 int s, pad;
363 int mask;
364 u_short length;
365 u_short numPages;
366 u_char packet_no;
367 int time_out;
368 int junk = 0;
369
370 s = splimp();
371
372 if (sc->arpcom.ac_if.if_flags & IFF_OACTIVE) {
373 splx(s);
374 return;
375 }
376 if (sc->pages_wanted != -1) {
377 splx(s);
378 if_printf(ifp, "snstart() while memory allocation pending\n");
379 return;
380 }
381startagain:
382
383 /*
384 * Sneak a peek at the next packet
385 */
386 m = sc->arpcom.ac_if.if_snd.ifq_head;
387 if (m == 0) {
388 splx(s);
389 return;
390 }
391 /*
392 * Compute the frame length and set pad to give an overall even
393 * number of bytes. Below we assume that the packet length is even.
394 */
395 for (len = 0, top = m; m; m = m->m_next)
396 len += m->m_len;
397
398 pad = (len & 1);
399
400 /*
401 * We drop packets that are too large. Perhaps we should truncate
402 * them instead?
403 */
404 if (len + pad > ETHER_MAX_LEN - ETHER_CRC_LEN) {
405 if_printf(ifp, "large packet discarded (A)\n");
406 ++sc->arpcom.ac_if.if_oerrors;
407 IF_DEQUEUE(&sc->arpcom.ac_if.if_snd, m);
408 m_freem(m);
409 goto readcheck;
410 }
411#ifdef SW_PAD
412
413 /*
414 * If HW padding is not turned on, then pad to ETHER_MIN_LEN.
415 */
416 if (len < ETHER_MIN_LEN - ETHER_CRC_LEN)
417 pad = ETHER_MIN_LEN - ETHER_CRC_LEN - len;
418
419#endif /* SW_PAD */
420
421 length = pad + len;
422
423 /*
424 * The MMU wants the number of pages to be the number of 256 byte
425 * 'pages', minus 1 (A packet can't ever have 0 pages. We also
426 * include space for the status word, byte count and control bytes in
427 * the allocation request.
428 */
429 numPages = (length + 6) >> 8;
430
431
432 /*
433 * Now, try to allocate the memory
434 */
435 SMC_SELECT_BANK(2);
436 outw(BASE + MMU_CMD_REG_W, MMUCR_ALLOC | numPages);
437
438 /*
439 * Wait a short amount of time to see if the allocation request
440 * completes. Otherwise, I enable the interrupt and wait for
441 * completion asyncronously.
442 */
443
444 time_out = MEMORY_WAIT_TIME;
445 do {
446 if (inb(BASE + INTR_STAT_REG_B) & IM_ALLOC_INT)
447 break;
448 } while (--time_out);
449
450 if (!time_out || junk > 10) {
451
452 /*
453 * No memory now. Oh well, wait until the chip finds memory
454 * later. Remember how many pages we were asking for and
455 * enable the allocation completion interrupt. Also set a
456 * watchdog in case we miss the interrupt. We mark the
457 * interface active since there is no point in attempting an
458 * snstart() until after the memory is available.
459 */
460 mask = inb(BASE + INTR_MASK_REG_B) | IM_ALLOC_INT;
461 outb(BASE + INTR_MASK_REG_B, mask);
462 sc->intr_mask = mask;
463
464 sc->arpcom.ac_if.if_timer = 1;
465 sc->arpcom.ac_if.if_flags |= IFF_OACTIVE;
466 sc->pages_wanted = numPages;
467
468 splx(s);
469 return;
470 }
471 /*
472 * The memory allocation completed. Check the results.
473 */
474 packet_no = inb(BASE + ALLOC_RESULT_REG_B);
475 if (packet_no & ARR_FAILED) {
476 if (junk++ > 10)
477 if_printf(ifp, "Memory allocation failed\n");
478 goto startagain;
479 }
480 /*
481 * We have a packet number, so tell the card to use it.
482 */
483 outb(BASE + PACKET_NUM_REG_B, packet_no);
484
485 /*
486 * Point to the beginning of the packet
487 */
488 outw(BASE + POINTER_REG_W, PTR_AUTOINC | 0x0000);
489
490 /*
491 * Send the packet length (+6 for status, length and control byte)
492 * and the status word (set to zeros)
493 */
494 outw(BASE + DATA_REG_W, 0);
495 outb(BASE + DATA_REG_B, (length + 6) & 0xFF);
496 outb(BASE + DATA_REG_B, (length + 6) >> 8);
497
498 /*
499 * Get the packet from the kernel. This will include the Ethernet
500 * frame header, MAC Addresses etc.
501 */
502 IF_DEQUEUE(&sc->arpcom.ac_if.if_snd, m);
503
504 /*
505 * Push out the data to the card.
506 */
507 for (top = m; m != 0; m = m->m_next) {
508
509 /*
510 * Push out words.
511 */
512 outsw(BASE + DATA_REG_W, mtod(m, caddr_t), m->m_len / 2);
513
514 /*
515 * Push out remaining byte.
516 */
517 if (m->m_len & 1)
518 outb(BASE + DATA_REG_B, *(mtod(m, caddr_t) + m->m_len - 1));
519 }
520
521 /*
522 * Push out padding.
523 */
524 while (pad > 1) {
525 outw(BASE + DATA_REG_W, 0);
526 pad -= 2;
527 }
528 if (pad)
529 outb(BASE + DATA_REG_B, 0);
530
531 /*
532 * Push out control byte and unused packet byte The control byte is 0
533 * meaning the packet is even lengthed and no special CRC handling is
534 * desired.
535 */
536 outw(BASE + DATA_REG_W, 0);
537
538 /*
539 * Enable the interrupts and let the chipset deal with it Also set a
540 * watchdog in case we miss the interrupt.
541 */
542 mask = inb(BASE + INTR_MASK_REG_B) | (IM_TX_INT | IM_TX_EMPTY_INT);
543 outb(BASE + INTR_MASK_REG_B, mask);
544 sc->intr_mask = mask;
545
546 outw(BASE + MMU_CMD_REG_W, MMUCR_ENQUEUE);
547
548 sc->arpcom.ac_if.if_flags |= IFF_OACTIVE;
549 sc->arpcom.ac_if.if_timer = 1;
550
551 BPF_MTAP(ifp, top);
552
553 sc->arpcom.ac_if.if_opackets++;
554 m_freem(top);
555
556
557readcheck:
558
559 /*
560 * Is another packet coming in? We don't want to overflow the tiny
561 * RX FIFO. If nothing has arrived then attempt to queue another
562 * transmit packet.
563 */
564 if (inw(BASE + FIFO_PORTS_REG_W) & FIFO_REMPTY)
565 goto startagain;
566
567 splx(s);
568 return;
569}
570
571
572
573/* Resume a packet transmit operation after a memory allocation
574 * has completed.
575 *
576 * This is basically a hacked up copy of snstart() which handles
577 * a completed memory allocation the same way snstart() does.
578 * It then passes control to snstart to handle any other queued
579 * packets.
580 */
581static void
582snresume(struct ifnet *ifp)
583{
584 register struct sn_softc *sc = ifp->if_softc;
585 register u_int len;
586 register struct mbuf *m;
587 struct mbuf *top;
588 int pad;
589 int mask;
590 u_short length;
591 u_short numPages;
592 u_short pages_wanted;
593 u_char packet_no;
594
595 if (sc->pages_wanted < 0)
596 return;
597
598 pages_wanted = sc->pages_wanted;
599 sc->pages_wanted = -1;
600
601 /*
602 * Sneak a peek at the next packet
603 */
604 m = sc->arpcom.ac_if.if_snd.ifq_head;
605 if (m == 0) {
606 if_printf(ifp, "snresume() with nothing to send\n");
607 return;
608 }
609 /*
610 * Compute the frame length and set pad to give an overall even
611 * number of bytes. Below we assume that the packet length is even.
612 */
613 for (len = 0, top = m; m; m = m->m_next)
614 len += m->m_len;
615
616 pad = (len & 1);
617
618 /*
619 * We drop packets that are too large. Perhaps we should truncate
620 * them instead?
621 */
622 if (len + pad > ETHER_MAX_LEN - ETHER_CRC_LEN) {
623 if_printf(ifp, "large packet discarded (B)\n");
624 ++sc->arpcom.ac_if.if_oerrors;
625 IF_DEQUEUE(&sc->arpcom.ac_if.if_snd, m);
626 m_freem(m);
627 return;
628 }
629#ifdef SW_PAD
630
631 /*
632 * If HW padding is not turned on, then pad to ETHER_MIN_LEN.
633 */
634 if (len < ETHER_MIN_LEN - ETHER_CRC_LEN)
635 pad = ETHER_MIN_LEN - ETHER_CRC_LEN - len;
636
637#endif /* SW_PAD */
638
639 length = pad + len;
640
641
642 /*
643 * The MMU wants the number of pages to be the number of 256 byte
644 * 'pages', minus 1 (A packet can't ever have 0 pages. We also
645 * include space for the status word, byte count and control bytes in
646 * the allocation request.
647 */
648 numPages = (length + 6) >> 8;
649
650
651 SMC_SELECT_BANK(2);
652
653 /*
654 * The memory allocation completed. Check the results. If it failed,
655 * we simply set a watchdog timer and hope for the best.
656 */
657 packet_no = inb(BASE + ALLOC_RESULT_REG_B);
658 if (packet_no & ARR_FAILED) {
659 if_printf(ifp, "Memory allocation failed. Weird.\n");
660 sc->arpcom.ac_if.if_timer = 1;
661 goto try_start;
662 }
663 /*
664 * We have a packet number, so tell the card to use it.
665 */
666 outb(BASE + PACKET_NUM_REG_B, packet_no);
667
668 /*
669 * Now, numPages should match the pages_wanted recorded when the
670 * memory allocation was initiated.
671 */
672 if (pages_wanted != numPages) {
673 if_printf(ifp, "memory allocation wrong size. Weird.\n");
674 /*
675 * If the allocation was the wrong size we simply release the
676 * memory once it is granted. Wait for the MMU to be un-busy.
677 */
678 while (inw(BASE + MMU_CMD_REG_W) & MMUCR_BUSY) /* NOTHING */
679 ;
680 outw(BASE + MMU_CMD_REG_W, MMUCR_FREEPKT);
681
682 return;
683 }
684 /*
685 * Point to the beginning of the packet
686 */
687 outw(BASE + POINTER_REG_W, PTR_AUTOINC | 0x0000);
688
689 /*
690 * Send the packet length (+6 for status, length and control byte)
691 * and the status word (set to zeros)
692 */
693 outw(BASE + DATA_REG_W, 0);
694 outb(BASE + DATA_REG_B, (length + 6) & 0xFF);
695 outb(BASE + DATA_REG_B, (length + 6) >> 8);
696
697 /*
698 * Get the packet from the kernel. This will include the Ethernet
699 * frame header, MAC Addresses etc.
700 */
701 IF_DEQUEUE(&sc->arpcom.ac_if.if_snd, m);
702
703 /*
704 * Push out the data to the card.
705 */
706 for (top = m; m != 0; m = m->m_next) {
707
708 /*
709 * Push out words.
710 */
711 outsw(BASE + DATA_REG_W, mtod(m, caddr_t), m->m_len / 2);
712
713 /*
714 * Push out remaining byte.
715 */
716 if (m->m_len & 1)
717 outb(BASE + DATA_REG_B, *(mtod(m, caddr_t) + m->m_len - 1));
718 }
719
720 /*
721 * Push out padding.
722 */
723 while (pad > 1) {
724 outw(BASE + DATA_REG_W, 0);
725 pad -= 2;
726 }
727 if (pad)
728 outb(BASE + DATA_REG_B, 0);
729
730 /*
731 * Push out control byte and unused packet byte The control byte is 0
732 * meaning the packet is even lengthed and no special CRC handling is
733 * desired.
734 */
735 outw(BASE + DATA_REG_W, 0);
736
737 /*
738 * Enable the interrupts and let the chipset deal with it Also set a
739 * watchdog in case we miss the interrupt.
740 */
741 mask = inb(BASE + INTR_MASK_REG_B) | (IM_TX_INT | IM_TX_EMPTY_INT);
742 outb(BASE + INTR_MASK_REG_B, mask);
743 sc->intr_mask = mask;
744 outw(BASE + MMU_CMD_REG_W, MMUCR_ENQUEUE);
745
746 BPF_MTAP(ifp, top);
747
748 sc->arpcom.ac_if.if_opackets++;
749 m_freem(top);
750
751try_start:
752
753 /*
754 * Now pass control to snstart() to queue any additional packets
755 */
756 sc->arpcom.ac_if.if_flags &= ~IFF_OACTIVE;
757 snstart(ifp);
758
759 /*
760 * We've sent something, so we're active. Set a watchdog in case the
761 * TX_EMPTY interrupt is lost.
762 */
763 sc->arpcom.ac_if.if_flags |= IFF_OACTIVE;
764 sc->arpcom.ac_if.if_timer = 1;
765
766 return;
767}
768
769
770void
771sn_intr(void *arg)
772{
773 int status, interrupts;
774 register struct sn_softc *sc = (struct sn_softc *) arg;
775 struct ifnet *ifp = &sc->arpcom.ac_if;
776 int x;
777
778 /*
779 * Chip state registers
780 */
781 u_char mask;
782 u_char packet_no;
783 u_short tx_status;
784 u_short card_stats;
785
786 /*
787 * if_ep.c did this, so I do too. Yet if_ed.c doesn't. I wonder...
788 */
789 x = splbio();
790
791 /*
792 * Clear the watchdog.
793 */
794 ifp->if_timer = 0;
795
796 SMC_SELECT_BANK(2);
797
798 /*
799 * Obtain the current interrupt mask and clear the hardware mask
800 * while servicing interrupts.
801 */
802 mask = inb(BASE + INTR_MASK_REG_B);
803 outb(BASE + INTR_MASK_REG_B, 0x00);
804
805 /*
806 * Get the set of interrupts which occurred and eliminate any which
807 * are masked.
808 */
809 interrupts = inb(BASE + INTR_STAT_REG_B);
810 status = interrupts & mask;
811
812 /*
813 * Now, process each of the interrupt types.
814 */
815
816 /*
817 * Receive Overrun.
818 */
819 if (status & IM_RX_OVRN_INT) {
820 /*
821 * Acknowlege Interrupt
822 */
823 SMC_SELECT_BANK(2);
824 outb(BASE + INTR_ACK_REG_B, IM_RX_OVRN_INT);
825
826 ++sc->arpcom.ac_if.if_ierrors;
827 }
828 /*
829 * Got a packet.
830 */
831 if (status & IM_RCV_INT) {
832 int packet_number;
833
834 SMC_SELECT_BANK(2);
835 packet_number = inw(BASE + FIFO_PORTS_REG_W);
836
837 if (packet_number & FIFO_REMPTY) {
838 /*
839 * we got called , but nothing was on the FIFO
840 */
841 printf("sn: Receive interrupt with nothing on FIFO\n");
842 goto out;
843 }
844 snread(ifp);
845 }
846 /*
847 * An on-card memory allocation came through.
848 */
849 if (status & IM_ALLOC_INT) {
850 /*
851 * Disable this interrupt.
852 */
853 mask &= ~IM_ALLOC_INT;
854 sc->arpcom.ac_if.if_flags &= ~IFF_OACTIVE;
855 snresume(&sc->arpcom.ac_if);
856 }
857 /*
858 * TX Completion. Handle a transmit error message. This will only be
859 * called when there is an error, because of the AUTO_RELEASE mode.
860 */
861 if (status & IM_TX_INT) {
862 /*
863 * Acknowlege Interrupt
864 */
865 SMC_SELECT_BANK(2);
866 outb(BASE + INTR_ACK_REG_B, IM_TX_INT);
867
868 packet_no = inw(BASE + FIFO_PORTS_REG_W);
869 packet_no &= FIFO_TX_MASK;
870
871 /*
872 * select this as the packet to read from
873 */
874 outb(BASE + PACKET_NUM_REG_B, packet_no);
875
876 /*
877 * Position the pointer to the first word from this packet
878 */
879 outw(BASE + POINTER_REG_W, PTR_AUTOINC | PTR_READ | 0x0000);
880
881 /*
882 * Fetch the TX status word. The value found here will be a
883 * copy of the EPH_STATUS_REG_W at the time the transmit
884 * failed.
885 */
886 tx_status = inw(BASE + DATA_REG_W);
887
888 if (tx_status & EPHSR_TX_SUC) {
889 device_printf(sc->dev,
890 "Successful packet caused interrupt\n");
891 } else {
892 ++sc->arpcom.ac_if.if_oerrors;
893 }
894
895 if (tx_status & EPHSR_LATCOL)
896 ++sc->arpcom.ac_if.if_collisions;
897
898 /*
899 * Some of these errors will have disabled transmit.
900 * Re-enable transmit now.
901 */
902 SMC_SELECT_BANK(0);
903
904#ifdef SW_PAD
905 outw(BASE + TXMIT_CONTROL_REG_W, TCR_ENABLE);
906#else
907 outw(BASE + TXMIT_CONTROL_REG_W, TCR_ENABLE | TCR_PAD_ENABLE);
908#endif /* SW_PAD */
909
910 /*
911 * kill the failed packet. Wait for the MMU to be un-busy.
912 */
913 SMC_SELECT_BANK(2);
914 while (inw(BASE + MMU_CMD_REG_W) & MMUCR_BUSY) /* NOTHING */
915 ;
916 outw(BASE + MMU_CMD_REG_W, MMUCR_FREEPKT);
917
918 /*
919 * Attempt to queue more transmits.
920 */
921 sc->arpcom.ac_if.if_flags &= ~IFF_OACTIVE;
922 snstart(&sc->arpcom.ac_if);
923 }
924 /*
925 * Transmit underrun. We use this opportunity to update transmit
926 * statistics from the card.
927 */
928 if (status & IM_TX_EMPTY_INT) {
929
930 /*
931 * Acknowlege Interrupt
932 */
933 SMC_SELECT_BANK(2);
934 outb(BASE + INTR_ACK_REG_B, IM_TX_EMPTY_INT);
935
936 /*
937 * Disable this interrupt.
938 */
939 mask &= ~IM_TX_EMPTY_INT;
940
941 SMC_SELECT_BANK(0);
942 card_stats = inw(BASE + COUNTER_REG_W);
943
944 /*
945 * Single collisions
946 */
947 sc->arpcom.ac_if.if_collisions += card_stats & ECR_COLN_MASK;
948
949 /*
950 * Multiple collisions
951 */
952 sc->arpcom.ac_if.if_collisions += (card_stats & ECR_MCOLN_MASK) >> 4;
953
954 SMC_SELECT_BANK(2);
955
956 /*
957 * Attempt to enqueue some more stuff.
958 */
959 sc->arpcom.ac_if.if_flags &= ~IFF_OACTIVE;
960 snstart(&sc->arpcom.ac_if);
961 }
962 /*
963 * Some other error. Try to fix it by resetting the adapter.
964 */
965 if (status & IM_EPH_INT) {
966 snstop(sc);
967 sninit(sc);
968 }
969
970out:
971 /*
972 * Handled all interrupt sources.
973 */
974
975 SMC_SELECT_BANK(2);
976
977 /*
978 * Reestablish interrupts from mask which have not been deselected
979 * during this interrupt. Note that the hardware mask, which was set
980 * to 0x00 at the start of this service routine, may have been
981 * updated by one or more of the interrupt handers and we must let
982 * those new interrupts stay enabled here.
983 */
984 mask |= inb(BASE + INTR_MASK_REG_B);
985 outb(BASE + INTR_MASK_REG_B, mask);
986 sc->intr_mask = mask;
987
988 splx(x);
989}
990
991void
992snread(register struct ifnet *ifp)
993{
994 struct sn_softc *sc = ifp->if_softc;
995 struct ether_header *eh;
996 struct mbuf *m;
997 short status;
998 int packet_number;
999 u_short packet_length;
1000 u_char *data;
1001
1002 SMC_SELECT_BANK(2);
1003#if 0
1004 packet_number = inw(BASE + FIFO_PORTS_REG_W);
1005
1006 if (packet_number & FIFO_REMPTY) {
1007
1008 /*
1009 * we got called , but nothing was on the FIFO
1010 */
1011 printf("sn: Receive interrupt with nothing on FIFO\n");
1012 return;
1013 }
1014#endif
1015read_another:
1016
1017 /*
1018 * Start reading from the start of the packet. Since PTR_RCV is set,
1019 * packet number is found in FIFO_PORTS_REG_W, FIFO_RX_MASK.
1020 */
1021 outw(BASE + POINTER_REG_W, PTR_READ | PTR_RCV | PTR_AUTOINC | 0x0000);
1022
1023 /*
1024 * First two words are status and packet_length
1025 */
1026 status = inw(BASE + DATA_REG_W);
1027 packet_length = inw(BASE + DATA_REG_W) & RLEN_MASK;
1028
1029 /*
1030 * The packet length contains 3 extra words: status, length, and a
1031 * extra word with the control byte.
1032 */
1033 packet_length -= 6;
1034
1035 /*
1036 * Account for receive errors and discard.
1037 */
1038 if (status & RS_ERRORS) {
1039 ++sc->arpcom.ac_if.if_ierrors;
1040 goto out;
1041 }
1042 /*
1043 * A packet is received.
1044 */
1045
1046 /*
1047 * Adjust for odd-length packet.
1048 */
1049 if (status & RS_ODDFRAME)
1050 packet_length++;
1051
1052 /*
1053 * Allocate a header mbuf from the kernel.
1054 */
1055 MGETHDR(m, M_DONTWAIT, MT_DATA);
1056 if (m == NULL)
1057 goto out;
1058
1059 m->m_pkthdr.rcvif = &sc->arpcom.ac_if;
1060 m->m_pkthdr.len = m->m_len = packet_length;
1061
1062 /*
1063 * Attach an mbuf cluster
1064 */
1065 MCLGET(m, M_DONTWAIT);
1066
1067 /*
1068 * Insist on getting a cluster
1069 */
1070 if ((m->m_flags & M_EXT) == 0) {
1071 m_freem(m);
1072 ++sc->arpcom.ac_if.if_ierrors;
1073 printf("sn: snread() kernel memory allocation problem\n");
1074 goto out;
1075 }
1076 eh = mtod(m, struct ether_header *);
1077
1078 /*
1079 * Get packet, including link layer address, from interface.
1080 */
1081
1082 data = (u_char *) eh;
1083 insw(BASE + DATA_REG_W, data, packet_length >> 1);
1084 if (packet_length & 1) {
1085 data += packet_length & ~1;
1086 *data = inb(BASE + DATA_REG_B);
1087 }
1088 ++sc->arpcom.ac_if.if_ipackets;
1089
1090 /*
1091 * Remove link layer addresses and whatnot.
1092 */
1093 m->m_pkthdr.len = m->m_len = packet_length;
1094
1095 (*ifp->if_input)(ifp, m);
1096
1097out:
1098
1099 /*
1100 * Error or good, tell the card to get rid of this packet Wait for
1101 * the MMU to be un-busy.
1102 */
1103 SMC_SELECT_BANK(2);
1104 while (inw(BASE + MMU_CMD_REG_W) & MMUCR_BUSY) /* NOTHING */
1105 ;
1106 outw(BASE + MMU_CMD_REG_W, MMUCR_RELEASE);
1107
1108 /*
1109 * Check whether another packet is ready
1110 */
1111 packet_number = inw(BASE + FIFO_PORTS_REG_W);
1112 if (packet_number & FIFO_REMPTY) {
1113 return;
1114 }
1115 goto read_another;
1116}
1117
1118
1119/*
1120 * Handle IOCTLS. This function is completely stolen from if_ep.c
1121 * As with its progenitor, it does not handle hardware address
1122 * changes.
1123 */
1124static int
1125snioctl(register struct ifnet *ifp, u_long cmd, caddr_t data)
1126{
1127 struct sn_softc *sc = ifp->if_softc;
1128 int s, error = 0;
1129
1130 s = splimp();
1131
1132 switch (cmd) {
1133 case SIOCSIFFLAGS:
1134 if ((ifp->if_flags & IFF_UP) == 0 && ifp->if_flags & IFF_RUNNING) {
1135 ifp->if_flags &= ~IFF_RUNNING;
1136 snstop(sc);
1137 break;
1138 } else {
1139 /* reinitialize card on any parameter change */
1140 sninit(sc);
1141 break;
1142 }
1143 break;
1144
1145#ifdef notdef
1146 case SIOCGHWADDR:
1147 bcopy((caddr_t) sc->sc_addr, (caddr_t) & ifr->ifr_data,
1148 sizeof(sc->sc_addr));
1149 break;
1150#endif
1151
1152 case SIOCADDMULTI:
1153 /* update multicast filter list. */
1154 sn_setmcast(sc);
1155 error = 0;
1156 break;
1157 case SIOCDELMULTI:
1158 /* update multicast filter list. */
1159 sn_setmcast(sc);
1160 error = 0;
1161 break;
1162 default:
1163 error = EINVAL;
1164 error = ether_ioctl(ifp, cmd, data);
1165 break;
1166 }
1167
1168 splx(s);
1169
1170 return (error);
1171}
1172
1173void
1174snreset(struct sn_softc *sc)
1175{
1176 int s;
1177
1178 s = splimp();
1179 snstop(sc);
1180 sninit(sc);
1181
1182 splx(s);
1183}
1184
1185void
1186snwatchdog(struct ifnet *ifp)
1187{
1188 int s;
1189 s = splimp();
1190 sn_intr(ifp->if_softc);
1191 splx(s);
1192}
1193
1194
1195/* 1. zero the interrupt mask
1196 * 2. clear the enable receive flag
1197 * 3. clear the enable xmit flags
1198 */
1199void
1200snstop(struct sn_softc *sc)
1201{
1202
1203 struct ifnet *ifp = &sc->arpcom.ac_if;
1204
1205 /*
1206 * Clear interrupt mask; disable all interrupts.
1207 */
1208 SMC_SELECT_BANK(2);
1209 outb(BASE + INTR_MASK_REG_B, 0x00);
1210
1211 /*
1212 * Disable transmitter and Receiver
1213 */
1214 SMC_SELECT_BANK(0);
1215 outw(BASE + RECV_CONTROL_REG_W, 0x0000);
1216 outw(BASE + TXMIT_CONTROL_REG_W, 0x0000);
1217
1218 /*
1219 * Cancel watchdog.
1220 */
1221 ifp->if_timer = 0;
1222}
1223
1224
1225int
1226sn_activate(device_t dev)
1227{
1228 struct sn_softc *sc = device_get_softc(dev);
1229 int err;
1230
1231 sc->port_rid = 0;
1232 sc->port_res = bus_alloc_resource(dev, SYS_RES_IOPORT, &sc->port_rid,
1233 0, ~0, SMC_IO_EXTENT, RF_ACTIVE);
1234 if (!sc->port_res) {
1235 if (bootverbose)
1236 device_printf(dev, "Cannot allocate ioport\n");
1237 return ENOMEM;
1238 }
1239
1240 sc->irq_rid = 0;
1241 sc->irq_res = bus_alloc_resource(dev, SYS_RES_IRQ, &sc->irq_rid,
1242 0, ~0, 1, RF_ACTIVE);
1243 if (!sc->irq_res) {
1244 if (bootverbose)
1245 device_printf(dev, "Cannot allocate irq\n");
1246 sn_deactivate(dev);
1247 return ENOMEM;
1248 }
1249 if ((err = bus_setup_intr(dev, sc->irq_res, INTR_TYPE_NET, sn_intr, sc,
1250 &sc->intrhand)) != 0) {
1251 sn_deactivate(dev);
1252 return err;
1253 }
1254
1255 sc->sn_io_addr = rman_get_start(sc->port_res);
1256 return (0);
1257}
1258
1259void
1260sn_deactivate(device_t dev)
1261{
1262 struct sn_softc *sc = device_get_softc(dev);
1263
1264 if (sc->intrhand)
1265 bus_teardown_intr(dev, sc->irq_res, sc->intrhand);
1266 sc->intrhand = 0;
1267 if (sc->port_res)
1268 bus_release_resource(dev, SYS_RES_IOPORT, sc->port_rid,
1269 sc->port_res);
1270 sc->port_res = 0;
1271 if (sc->irq_res)
1272 bus_release_resource(dev, SYS_RES_IRQ, sc->irq_rid,
1273 sc->irq_res);
1274 sc->irq_res = 0;
1275 return;
1276}
1277
1278/*
1279 * Function: sn_probe( device_t dev, int pccard )
1280 *
1281 * Purpose:
1282 * Tests to see if a given ioaddr points to an SMC9xxx chip.
1283 * Tries to cause as little damage as possible if it's not a SMC chip.
1284 * Returns a 0 on success
1285 *
1286 * Algorithm:
1287 * (1) see if the high byte of BANK_SELECT is 0x33
1288 * (2) compare the ioaddr with the base register's address
1289 * (3) see if I recognize the chip ID in the appropriate register
1290 *
1291 *
1292 */
1293int
1294sn_probe(device_t dev, int pccard)
1295{
1296 struct sn_softc *sc = device_get_softc(dev);
1297 u_int bank;
1298 u_short revision_register;
1299 u_short base_address_register;
1300 u_short ioaddr;
1301 int err;
1302
1303 if ((err = sn_activate(dev)) != 0)
1304 return err;
1305
1306 ioaddr = sc->sn_io_addr;
1307#ifdef SN_DEBUG
1308 device_printf(dev, "ioaddr is 0x%x\n", ioaddr);
1309#endif
1310 /*
1311 * First, see if the high byte is 0x33
1312 */
1313 bank = inw(ioaddr + BANK_SELECT_REG_W);
1314 if ((bank & BSR_DETECT_MASK) != BSR_DETECT_VALUE) {
1315#ifdef SN_DEBUG
1316 device_printf(dev, "test1 failed\n");
1317#endif
1318 goto error;
1319 }
1320 /*
1321 * The above MIGHT indicate a device, but I need to write to further
1322 * test this. Go to bank 0, then test that the register still
1323 * reports the high byte is 0x33.
1324 */
1325 outw(ioaddr + BANK_SELECT_REG_W, 0x0000);
1326 bank = inw(ioaddr + BANK_SELECT_REG_W);
1327 if ((bank & BSR_DETECT_MASK) != BSR_DETECT_VALUE) {
1328#ifdef SN_DEBUG
1329 device_printf(dev, "test2 failed\n");
1330#endif
1331 goto error;
1332 }
1333 /*
1334 * well, we've already written once, so hopefully another time won't
1335 * hurt. This time, I need to switch the bank register to bank 1, so
1336 * I can access the base address register. The contents of the
1337 * BASE_ADDR_REG_W register, after some jiggery pokery, is expected
1338 * to match the I/O port address where the adapter is being probed.
1339 */
1340 outw(ioaddr + BANK_SELECT_REG_W, 0x0001);
1341 base_address_register = inw(ioaddr + BASE_ADDR_REG_W);
1342
1343 /*
1344 * This test is nonsence on PC-card architecture, so if
1345 * pccard == 1, skip this test. (hosokawa)
1346 */
1347 if (!pccard && (ioaddr != (base_address_register >> 3 & 0x3E0))) {
1348
1349 /*
1350 * Well, the base address register didn't match. Must not
1351 * have been a SMC chip after all.
1352 */
1353#ifdef SN_DEBUG
1354 device_printf(dev, "test3 failed ioaddr = 0x%x, "
1355 "base_address_register = 0x%x\n", ioaddr,
1356 base_address_register >> 3 & 0x3E0);
1357#endif
1358 goto error;
1359 }
1360
1361 /*
1362 * Check if the revision register is something that I recognize.
1363 * These might need to be added to later, as future revisions could
1364 * be added.
1365 */
1366 outw(ioaddr + BANK_SELECT_REG_W, 0x3);
1367 revision_register = inw(ioaddr + REVISION_REG_W);
1368 if (!chip_ids[(revision_register >> 4) & 0xF]) {
1369
1370 /*
1371 * I don't regonize this chip, so...
1372 */
1373#ifdef SN_DEBUG
1374 device_printf(dev, "test4 failed\n");
1375#endif
1376 goto error;
1377 }
1378
1379 /*
1380 * at this point I'll assume that the chip is an SMC9xxx. It might be
1381 * prudent to check a listing of MAC addresses against the hardware
1382 * address, or do some other tests.
1383 */
1384 sn_deactivate(dev);
1385 return 0;
1386 error:
1387 sn_deactivate(dev);
1388 return ENXIO;
1389}
1390
1391#define MCFSZ 8
1392
1393static void
1394sn_setmcast(struct sn_softc *sc)
1395{
1396 struct ifnet *ifp = (struct ifnet *)sc;
1397 int flags;
1398
1399 /*
1400 * Set the receiver filter. We want receive enabled and auto strip
1401 * of CRC from received packet. If we are promiscuous then set that
1402 * bit too.
1403 */
1404 flags = RCR_ENABLE | RCR_STRIP_CRC;
1405
1406 if (ifp->if_flags & IFF_PROMISC) {
1407 flags |= RCR_PROMISC | RCR_ALMUL;
1408 } else if (ifp->if_flags & IFF_ALLMULTI) {
1409 flags |= RCR_ALMUL;
1410 } else {
1411 u_char mcf[MCFSZ];
1412 if (sn_getmcf(&sc->arpcom, mcf)) {
1413 /* set filter */
1414 SMC_SELECT_BANK(3);
1415 outw(BASE + MULTICAST1_REG_W,
1416 ((u_short)mcf[1] << 8) | mcf[0]);
1417 outw(BASE + MULTICAST2_REG_W,
1418 ((u_short)mcf[3] << 8) | mcf[2]);
1419 outw(BASE + MULTICAST3_REG_W,
1420 ((u_short)mcf[5] << 8) | mcf[4]);
1421 outw(BASE + MULTICAST4_REG_W,
1422 ((u_short)mcf[7] << 8) | mcf[6]);
1423 } else {
1424 flags |= RCR_ALMUL;
1425 }
1426 }
1427 SMC_SELECT_BANK(0);
1428 outw(BASE + RECV_CONTROL_REG_W, flags);
1429}
1430
1431static int
1432sn_getmcf(struct arpcom *ac, u_char *mcf)
1433{
1434 int i;
1435 register u_int index, index2;
1436 register u_char *af = (u_char *) mcf;
1437 struct ifmultiaddr *ifma;
1438
1439 bzero(mcf, MCFSZ);
1440
1441 TAILQ_FOREACH(ifma, &ac->ac_if.if_multiaddrs, ifma_link) {
1442 if (ifma->ifma_addr->sa_family != AF_LINK)
1443 return 0;
1444 index = smc_crc(LLADDR((struct sockaddr_dl *)ifma->ifma_addr)) & 0x3f;
1445 index2 = 0;
1446 for (i = 0; i < 6; i++) {
1447 index2 <<= 1;
1448 index2 |= (index & 0x01);
1449 index >>= 1;
1450 }
1451 af[index2 >> 3] |= 1 << (index2 & 7);
1452 }
1453 return 1; /* use multicast filter */
1454}
1455
1456static u_int
1457smc_crc(u_char *s)
1458{
1459 int perByte;
1460 int perBit;
1461 const u_int poly = 0xedb88320;
1462 u_int v = 0xffffffff;
1463 u_char c;
1464
1465 for (perByte = 0; perByte < ETHER_ADDR_LEN; perByte++) {
1466 c = s[perByte];
1467 for (perBit = 0; perBit < 8; perBit++) {
1468 v = (v >> 1)^(((v ^ c) & 0x01) ? poly : 0);
1469 c >>= 1;
1470 }
1471 }
1472 return v;
1473}
| 36/*
37 * This is a driver for SMC's 9000 series of Ethernet adapters.
38 *
39 * This FreeBSD driver is derived from the smc9194 Linux driver by
40 * Erik Stahlman and is Copyright (C) 1996 by Erik Stahlman.
41 * This driver also shamelessly borrows from the FreeBSD ep driver
42 * which is Copyright (C) 1994 Herb Peyerl <hpeyerl@novatel.ca>
43 * All rights reserved.
44 *
45 * It is set up for my SMC91C92 equipped Ampro LittleBoard embedded
46 * PC. It is adapted from Erik Stahlman's Linux driver which worked
47 * with his EFA Info*Express SVC VLB adaptor. According to SMC's databook,
48 * it will work for the entire SMC 9xxx series. (Ha Ha)
49 *
50 * "Features" of the SMC chip:
51 * 4608 byte packet memory. (for the 91C92. Others have more)
52 * EEPROM for configuration
53 * AUI/TP selection
54 *
55 * Authors:
56 * Erik Stahlman erik@vt.edu
57 * Herb Peyerl hpeyerl@novatel.ca
58 * Andres Vega Garcia avega@sophia.inria.fr
59 * Serge Babkin babkin@hq.icb.chel.su
60 * Gardner Buchanan gbuchanan@shl.com
61 *
62 * Sources:
63 * o SMC databook
64 * o "smc9194.c:v0.10(FIXED) 02/15/96 by Erik Stahlman (erik@vt.edu)"
65 * o "if_ep.c,v 1.19 1995/01/24 20:53:45 davidg Exp"
66 *
67 * Known Bugs:
68 * o The hardware multicast filter isn't used yet.
69 * o Setting of the hardware address isn't supported.
70 * o Hardware padding isn't used.
71 */
72
73/*
74 * Modifications for Megahertz X-Jack Ethernet Card (XJ-10BT)
75 *
76 * Copyright (c) 1996 by Tatsumi Hosokawa <hosokawa@jp.FreeBSD.org>
77 * BSD-nomads, Tokyo, Japan.
78 */
79/*
80 * Multicast support by Kei TANAKA <kei@pal.xerox.com>
81 * Special thanks to itojun@itojun.org
82 */
83
84#include <sys/param.h>
85#include <sys/systm.h>
86#include <sys/errno.h>
87#include <sys/sockio.h>
88#include <sys/mbuf.h>
89#include <sys/socket.h>
90#include <sys/syslog.h>
91
92#include <sys/module.h>
93#include <sys/bus.h>
94
95#include <machine/bus.h>
96#include <machine/resource.h>
97#include <sys/rman.h>
98
99#include <net/ethernet.h>
100#include <net/if.h>
101#include <net/if_arp.h>
102#include <net/if_dl.h>
103#include <net/if_types.h>
104#include <net/if_mib.h>
105
106#ifdef INET
107#include <netinet/in.h>
108#include <netinet/in_systm.h>
109#include <netinet/in_var.h>
110#include <netinet/ip.h>
111#endif
112
113#include <net/bpf.h>
114#include <net/bpfdesc.h>
115
116
117#include <dev/sn/if_snreg.h>
118#include <dev/sn/if_snvar.h>
119
120/* Exported variables */
121devclass_t sn_devclass;
122
123static int snioctl(struct ifnet * ifp, u_long, caddr_t);
124
125static void snresume(struct ifnet *);
126
127void sninit(void *);
128void snread(struct ifnet *);
129void snreset(struct sn_softc *);
130void snstart(struct ifnet *);
131void snstop(struct sn_softc *);
132void snwatchdog(struct ifnet *);
133
134static void sn_setmcast(struct sn_softc *);
135static int sn_getmcf(struct arpcom *ac, u_char *mcf);
136static u_int smc_crc(u_char *);
137
138/* I (GB) have been unlucky getting the hardware padding
139 * to work properly.
140 */
141#define SW_PAD
142
143static const char *chip_ids[15] = {
144 NULL, NULL, NULL,
145 /* 3 */ "SMC91C90/91C92",
146 /* 4 */ "SMC91C94",
147 /* 5 */ "SMC91C95",
148 NULL,
149 /* 7 */ "SMC91C100",
150 /* 8 */ "SMC91C100FD",
151 NULL, NULL, NULL,
152 NULL, NULL, NULL
153};
154
155int
156sn_attach(device_t dev)
157{
158 struct sn_softc *sc = device_get_softc(dev);
159 struct ifnet *ifp = &sc->arpcom.ac_if;
160 u_short i;
161 u_char *p;
162 struct ifaddr *ifa;
163 struct sockaddr_dl *sdl;
164 int rev;
165 u_short address;
166 int j;
167
168 sn_activate(dev);
169
170 snstop(sc);
171
172 sc->dev = dev;
173 sc->pages_wanted = -1;
174
175 device_printf(dev, " ");
176
177 SMC_SELECT_BANK(3);
178 rev = inw(BASE + REVISION_REG_W);
179 if (chip_ids[(rev >> 4) & 0xF])
180 printf("%s ", chip_ids[(rev >> 4) & 0xF]);
181
182 SMC_SELECT_BANK(1);
183 i = inw(BASE + CONFIG_REG_W);
184 printf(i & CR_AUI_SELECT ? "AUI" : "UTP");
185
186 if (sc->pccard_enaddr)
187 for (j = 0; j < 3; j++) {
188 u_short w;
189
190 w = (u_short)sc->arpcom.ac_enaddr[j * 2] |
191 (((u_short)sc->arpcom.ac_enaddr[j * 2 + 1]) << 8);
192 outw(BASE + IAR_ADDR0_REG_W + j * 2, w);
193 }
194
195 /*
196 * Read the station address from the chip. The MAC address is bank 1,
197 * regs 4 - 9
198 */
199 SMC_SELECT_BANK(1);
200 p = (u_char *) & sc->arpcom.ac_enaddr;
201 for (i = 0; i < 6; i += 2) {
202 address = inw(BASE + IAR_ADDR0_REG_W + i);
203 p[i + 1] = address >> 8;
204 p[i] = address & 0xFF;
205 }
206 printf(" MAC address %6D\n", sc->arpcom.ac_enaddr, ":");
207 ifp->if_softc = sc;
208 ifp->if_unit = device_get_unit(dev);
209 ifp->if_name = "sn";
210 ifp->if_mtu = ETHERMTU;
211 ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST;
212 ifp->if_output = ether_output;
213 ifp->if_start = snstart;
214 ifp->if_ioctl = snioctl;
215 ifp->if_watchdog = snwatchdog;
216 ifp->if_init = sninit;
217 ifp->if_snd.ifq_maxlen = IFQ_MAXLEN;
218 ifp->if_timer = 0;
219
220 ether_ifattach(ifp, sc->arpcom.ac_enaddr);
221
222 /*
223 * Fill the hardware address into ifa_addr if we find an AF_LINK
224 * entry. We need to do this so bpf's can get the hardware addr of
225 * this card. netstat likes this too!
226 */
227 ifa = TAILQ_FIRST(&ifp->if_addrhead);
228 while ((ifa != 0) && (ifa->ifa_addr != 0) &&
229 (ifa->ifa_addr->sa_family != AF_LINK))
230 ifa = TAILQ_NEXT(ifa, ifa_link);
231
232 if ((ifa != 0) && (ifa->ifa_addr != 0)) {
233 sdl = (struct sockaddr_dl *) ifa->ifa_addr;
234 sdl->sdl_type = IFT_ETHER;
235 sdl->sdl_alen = ETHER_ADDR_LEN;
236 sdl->sdl_slen = 0;
237 bcopy(sc->arpcom.ac_enaddr, LLADDR(sdl), ETHER_ADDR_LEN);
238 }
239
240 return 0;
241}
242
243
244int
245sn_detach(device_t dev)
246{
247 struct sn_softc *sc = device_get_softc(dev);
248
249 sc->arpcom.ac_if.if_flags &= ~IFF_RUNNING;
250 ether_ifdetach(&sc->arpcom.ac_if);
251 sn_deactivate(dev);
252 return 0;
253}
254
255/*
256 * Reset and initialize the chip
257 */
258void
259sninit(void *xsc)
260{
261 register struct sn_softc *sc = xsc;
262 register struct ifnet *ifp = &sc->arpcom.ac_if;
263 int s;
264 int flags;
265 int mask;
266
267 s = splimp();
268
269 /*
270 * This resets the registers mostly to defaults, but doesn't affect
271 * EEPROM. After the reset cycle, we pause briefly for the chip to
272 * be happy.
273 */
274 SMC_SELECT_BANK(0);
275 outw(BASE + RECV_CONTROL_REG_W, RCR_SOFTRESET);
276 SMC_DELAY();
277 outw(BASE + RECV_CONTROL_REG_W, 0x0000);
278 SMC_DELAY();
279 SMC_DELAY();
280
281 outw(BASE + TXMIT_CONTROL_REG_W, 0x0000);
282
283 /*
284 * Set the control register to automatically release succesfully
285 * transmitted packets (making the best use out of our limited
286 * memory) and to enable the EPH interrupt on certain TX errors.
287 */
288 SMC_SELECT_BANK(1);
289 outw(BASE + CONTROL_REG_W, (CTR_AUTO_RELEASE | CTR_TE_ENABLE |
290 CTR_CR_ENABLE | CTR_LE_ENABLE));
291
292 /* Set squelch level to 240mV (default 480mV) */
293 flags = inw(BASE + CONFIG_REG_W);
294 flags |= CR_SET_SQLCH;
295 outw(BASE + CONFIG_REG_W, flags);
296
297 /*
298 * Reset the MMU and wait for it to be un-busy.
299 */
300 SMC_SELECT_BANK(2);
301 outw(BASE + MMU_CMD_REG_W, MMUCR_RESET);
302 while (inw(BASE + MMU_CMD_REG_W) & MMUCR_BUSY) /* NOTHING */
303 ;
304
305 /*
306 * Disable all interrupts
307 */
308 outb(BASE + INTR_MASK_REG_B, 0x00);
309
310 sn_setmcast(sc);
311
312 /*
313 * Set the transmitter control. We want it enabled.
314 */
315 flags = TCR_ENABLE;
316
317#ifndef SW_PAD
318 /*
319 * I (GB) have been unlucky getting this to work.
320 */
321 flags |= TCR_PAD_ENABLE;
322#endif /* SW_PAD */
323
324 outw(BASE + TXMIT_CONTROL_REG_W, flags);
325
326
327 /*
328 * Now, enable interrupts
329 */
330 SMC_SELECT_BANK(2);
331
332 mask = IM_EPH_INT |
333 IM_RX_OVRN_INT |
334 IM_RCV_INT |
335 IM_TX_INT;
336
337 outb(BASE + INTR_MASK_REG_B, mask);
338 sc->intr_mask = mask;
339 sc->pages_wanted = -1;
340
341
342 /*
343 * Mark the interface running but not active.
344 */
345 ifp->if_flags |= IFF_RUNNING;
346 ifp->if_flags &= ~IFF_OACTIVE;
347
348 /*
349 * Attempt to push out any waiting packets.
350 */
351 snstart(ifp);
352
353 splx(s);
354}
355
356
357void
358snstart(struct ifnet *ifp)
359{
360 register struct sn_softc *sc = ifp->if_softc;
361 register u_int len;
362 register struct mbuf *m;
363 struct mbuf *top;
364 int s, pad;
365 int mask;
366 u_short length;
367 u_short numPages;
368 u_char packet_no;
369 int time_out;
370 int junk = 0;
371
372 s = splimp();
373
374 if (sc->arpcom.ac_if.if_flags & IFF_OACTIVE) {
375 splx(s);
376 return;
377 }
378 if (sc->pages_wanted != -1) {
379 splx(s);
380 if_printf(ifp, "snstart() while memory allocation pending\n");
381 return;
382 }
383startagain:
384
385 /*
386 * Sneak a peek at the next packet
387 */
388 m = sc->arpcom.ac_if.if_snd.ifq_head;
389 if (m == 0) {
390 splx(s);
391 return;
392 }
393 /*
394 * Compute the frame length and set pad to give an overall even
395 * number of bytes. Below we assume that the packet length is even.
396 */
397 for (len = 0, top = m; m; m = m->m_next)
398 len += m->m_len;
399
400 pad = (len & 1);
401
402 /*
403 * We drop packets that are too large. Perhaps we should truncate
404 * them instead?
405 */
406 if (len + pad > ETHER_MAX_LEN - ETHER_CRC_LEN) {
407 if_printf(ifp, "large packet discarded (A)\n");
408 ++sc->arpcom.ac_if.if_oerrors;
409 IF_DEQUEUE(&sc->arpcom.ac_if.if_snd, m);
410 m_freem(m);
411 goto readcheck;
412 }
413#ifdef SW_PAD
414
415 /*
416 * If HW padding is not turned on, then pad to ETHER_MIN_LEN.
417 */
418 if (len < ETHER_MIN_LEN - ETHER_CRC_LEN)
419 pad = ETHER_MIN_LEN - ETHER_CRC_LEN - len;
420
421#endif /* SW_PAD */
422
423 length = pad + len;
424
425 /*
426 * The MMU wants the number of pages to be the number of 256 byte
427 * 'pages', minus 1 (A packet can't ever have 0 pages. We also
428 * include space for the status word, byte count and control bytes in
429 * the allocation request.
430 */
431 numPages = (length + 6) >> 8;
432
433
434 /*
435 * Now, try to allocate the memory
436 */
437 SMC_SELECT_BANK(2);
438 outw(BASE + MMU_CMD_REG_W, MMUCR_ALLOC | numPages);
439
440 /*
441 * Wait a short amount of time to see if the allocation request
442 * completes. Otherwise, I enable the interrupt and wait for
443 * completion asyncronously.
444 */
445
446 time_out = MEMORY_WAIT_TIME;
447 do {
448 if (inb(BASE + INTR_STAT_REG_B) & IM_ALLOC_INT)
449 break;
450 } while (--time_out);
451
452 if (!time_out || junk > 10) {
453
454 /*
455 * No memory now. Oh well, wait until the chip finds memory
456 * later. Remember how many pages we were asking for and
457 * enable the allocation completion interrupt. Also set a
458 * watchdog in case we miss the interrupt. We mark the
459 * interface active since there is no point in attempting an
460 * snstart() until after the memory is available.
461 */
462 mask = inb(BASE + INTR_MASK_REG_B) | IM_ALLOC_INT;
463 outb(BASE + INTR_MASK_REG_B, mask);
464 sc->intr_mask = mask;
465
466 sc->arpcom.ac_if.if_timer = 1;
467 sc->arpcom.ac_if.if_flags |= IFF_OACTIVE;
468 sc->pages_wanted = numPages;
469
470 splx(s);
471 return;
472 }
473 /*
474 * The memory allocation completed. Check the results.
475 */
476 packet_no = inb(BASE + ALLOC_RESULT_REG_B);
477 if (packet_no & ARR_FAILED) {
478 if (junk++ > 10)
479 if_printf(ifp, "Memory allocation failed\n");
480 goto startagain;
481 }
482 /*
483 * We have a packet number, so tell the card to use it.
484 */
485 outb(BASE + PACKET_NUM_REG_B, packet_no);
486
487 /*
488 * Point to the beginning of the packet
489 */
490 outw(BASE + POINTER_REG_W, PTR_AUTOINC | 0x0000);
491
492 /*
493 * Send the packet length (+6 for status, length and control byte)
494 * and the status word (set to zeros)
495 */
496 outw(BASE + DATA_REG_W, 0);
497 outb(BASE + DATA_REG_B, (length + 6) & 0xFF);
498 outb(BASE + DATA_REG_B, (length + 6) >> 8);
499
500 /*
501 * Get the packet from the kernel. This will include the Ethernet
502 * frame header, MAC Addresses etc.
503 */
504 IF_DEQUEUE(&sc->arpcom.ac_if.if_snd, m);
505
506 /*
507 * Push out the data to the card.
508 */
509 for (top = m; m != 0; m = m->m_next) {
510
511 /*
512 * Push out words.
513 */
514 outsw(BASE + DATA_REG_W, mtod(m, caddr_t), m->m_len / 2);
515
516 /*
517 * Push out remaining byte.
518 */
519 if (m->m_len & 1)
520 outb(BASE + DATA_REG_B, *(mtod(m, caddr_t) + m->m_len - 1));
521 }
522
523 /*
524 * Push out padding.
525 */
526 while (pad > 1) {
527 outw(BASE + DATA_REG_W, 0);
528 pad -= 2;
529 }
530 if (pad)
531 outb(BASE + DATA_REG_B, 0);
532
533 /*
534 * Push out control byte and unused packet byte The control byte is 0
535 * meaning the packet is even lengthed and no special CRC handling is
536 * desired.
537 */
538 outw(BASE + DATA_REG_W, 0);
539
540 /*
541 * Enable the interrupts and let the chipset deal with it Also set a
542 * watchdog in case we miss the interrupt.
543 */
544 mask = inb(BASE + INTR_MASK_REG_B) | (IM_TX_INT | IM_TX_EMPTY_INT);
545 outb(BASE + INTR_MASK_REG_B, mask);
546 sc->intr_mask = mask;
547
548 outw(BASE + MMU_CMD_REG_W, MMUCR_ENQUEUE);
549
550 sc->arpcom.ac_if.if_flags |= IFF_OACTIVE;
551 sc->arpcom.ac_if.if_timer = 1;
552
553 BPF_MTAP(ifp, top);
554
555 sc->arpcom.ac_if.if_opackets++;
556 m_freem(top);
557
558
559readcheck:
560
561 /*
562 * Is another packet coming in? We don't want to overflow the tiny
563 * RX FIFO. If nothing has arrived then attempt to queue another
564 * transmit packet.
565 */
566 if (inw(BASE + FIFO_PORTS_REG_W) & FIFO_REMPTY)
567 goto startagain;
568
569 splx(s);
570 return;
571}
572
573
574
575/* Resume a packet transmit operation after a memory allocation
576 * has completed.
577 *
578 * This is basically a hacked up copy of snstart() which handles
579 * a completed memory allocation the same way snstart() does.
580 * It then passes control to snstart to handle any other queued
581 * packets.
582 */
583static void
584snresume(struct ifnet *ifp)
585{
586 register struct sn_softc *sc = ifp->if_softc;
587 register u_int len;
588 register struct mbuf *m;
589 struct mbuf *top;
590 int pad;
591 int mask;
592 u_short length;
593 u_short numPages;
594 u_short pages_wanted;
595 u_char packet_no;
596
597 if (sc->pages_wanted < 0)
598 return;
599
600 pages_wanted = sc->pages_wanted;
601 sc->pages_wanted = -1;
602
603 /*
604 * Sneak a peek at the next packet
605 */
606 m = sc->arpcom.ac_if.if_snd.ifq_head;
607 if (m == 0) {
608 if_printf(ifp, "snresume() with nothing to send\n");
609 return;
610 }
611 /*
612 * Compute the frame length and set pad to give an overall even
613 * number of bytes. Below we assume that the packet length is even.
614 */
615 for (len = 0, top = m; m; m = m->m_next)
616 len += m->m_len;
617
618 pad = (len & 1);
619
620 /*
621 * We drop packets that are too large. Perhaps we should truncate
622 * them instead?
623 */
624 if (len + pad > ETHER_MAX_LEN - ETHER_CRC_LEN) {
625 if_printf(ifp, "large packet discarded (B)\n");
626 ++sc->arpcom.ac_if.if_oerrors;
627 IF_DEQUEUE(&sc->arpcom.ac_if.if_snd, m);
628 m_freem(m);
629 return;
630 }
631#ifdef SW_PAD
632
633 /*
634 * If HW padding is not turned on, then pad to ETHER_MIN_LEN.
635 */
636 if (len < ETHER_MIN_LEN - ETHER_CRC_LEN)
637 pad = ETHER_MIN_LEN - ETHER_CRC_LEN - len;
638
639#endif /* SW_PAD */
640
641 length = pad + len;
642
643
644 /*
645 * The MMU wants the number of pages to be the number of 256 byte
646 * 'pages', minus 1 (A packet can't ever have 0 pages. We also
647 * include space for the status word, byte count and control bytes in
648 * the allocation request.
649 */
650 numPages = (length + 6) >> 8;
651
652
653 SMC_SELECT_BANK(2);
654
655 /*
656 * The memory allocation completed. Check the results. If it failed,
657 * we simply set a watchdog timer and hope for the best.
658 */
659 packet_no = inb(BASE + ALLOC_RESULT_REG_B);
660 if (packet_no & ARR_FAILED) {
661 if_printf(ifp, "Memory allocation failed. Weird.\n");
662 sc->arpcom.ac_if.if_timer = 1;
663 goto try_start;
664 }
665 /*
666 * We have a packet number, so tell the card to use it.
667 */
668 outb(BASE + PACKET_NUM_REG_B, packet_no);
669
670 /*
671 * Now, numPages should match the pages_wanted recorded when the
672 * memory allocation was initiated.
673 */
674 if (pages_wanted != numPages) {
675 if_printf(ifp, "memory allocation wrong size. Weird.\n");
676 /*
677 * If the allocation was the wrong size we simply release the
678 * memory once it is granted. Wait for the MMU to be un-busy.
679 */
680 while (inw(BASE + MMU_CMD_REG_W) & MMUCR_BUSY) /* NOTHING */
681 ;
682 outw(BASE + MMU_CMD_REG_W, MMUCR_FREEPKT);
683
684 return;
685 }
686 /*
687 * Point to the beginning of the packet
688 */
689 outw(BASE + POINTER_REG_W, PTR_AUTOINC | 0x0000);
690
691 /*
692 * Send the packet length (+6 for status, length and control byte)
693 * and the status word (set to zeros)
694 */
695 outw(BASE + DATA_REG_W, 0);
696 outb(BASE + DATA_REG_B, (length + 6) & 0xFF);
697 outb(BASE + DATA_REG_B, (length + 6) >> 8);
698
699 /*
700 * Get the packet from the kernel. This will include the Ethernet
701 * frame header, MAC Addresses etc.
702 */
703 IF_DEQUEUE(&sc->arpcom.ac_if.if_snd, m);
704
705 /*
706 * Push out the data to the card.
707 */
708 for (top = m; m != 0; m = m->m_next) {
709
710 /*
711 * Push out words.
712 */
713 outsw(BASE + DATA_REG_W, mtod(m, caddr_t), m->m_len / 2);
714
715 /*
716 * Push out remaining byte.
717 */
718 if (m->m_len & 1)
719 outb(BASE + DATA_REG_B, *(mtod(m, caddr_t) + m->m_len - 1));
720 }
721
722 /*
723 * Push out padding.
724 */
725 while (pad > 1) {
726 outw(BASE + DATA_REG_W, 0);
727 pad -= 2;
728 }
729 if (pad)
730 outb(BASE + DATA_REG_B, 0);
731
732 /*
733 * Push out control byte and unused packet byte The control byte is 0
734 * meaning the packet is even lengthed and no special CRC handling is
735 * desired.
736 */
737 outw(BASE + DATA_REG_W, 0);
738
739 /*
740 * Enable the interrupts and let the chipset deal with it Also set a
741 * watchdog in case we miss the interrupt.
742 */
743 mask = inb(BASE + INTR_MASK_REG_B) | (IM_TX_INT | IM_TX_EMPTY_INT);
744 outb(BASE + INTR_MASK_REG_B, mask);
745 sc->intr_mask = mask;
746 outw(BASE + MMU_CMD_REG_W, MMUCR_ENQUEUE);
747
748 BPF_MTAP(ifp, top);
749
750 sc->arpcom.ac_if.if_opackets++;
751 m_freem(top);
752
753try_start:
754
755 /*
756 * Now pass control to snstart() to queue any additional packets
757 */
758 sc->arpcom.ac_if.if_flags &= ~IFF_OACTIVE;
759 snstart(ifp);
760
761 /*
762 * We've sent something, so we're active. Set a watchdog in case the
763 * TX_EMPTY interrupt is lost.
764 */
765 sc->arpcom.ac_if.if_flags |= IFF_OACTIVE;
766 sc->arpcom.ac_if.if_timer = 1;
767
768 return;
769}
770
771
772void
773sn_intr(void *arg)
774{
775 int status, interrupts;
776 register struct sn_softc *sc = (struct sn_softc *) arg;
777 struct ifnet *ifp = &sc->arpcom.ac_if;
778 int x;
779
780 /*
781 * Chip state registers
782 */
783 u_char mask;
784 u_char packet_no;
785 u_short tx_status;
786 u_short card_stats;
787
788 /*
789 * if_ep.c did this, so I do too. Yet if_ed.c doesn't. I wonder...
790 */
791 x = splbio();
792
793 /*
794 * Clear the watchdog.
795 */
796 ifp->if_timer = 0;
797
798 SMC_SELECT_BANK(2);
799
800 /*
801 * Obtain the current interrupt mask and clear the hardware mask
802 * while servicing interrupts.
803 */
804 mask = inb(BASE + INTR_MASK_REG_B);
805 outb(BASE + INTR_MASK_REG_B, 0x00);
806
807 /*
808 * Get the set of interrupts which occurred and eliminate any which
809 * are masked.
810 */
811 interrupts = inb(BASE + INTR_STAT_REG_B);
812 status = interrupts & mask;
813
814 /*
815 * Now, process each of the interrupt types.
816 */
817
818 /*
819 * Receive Overrun.
820 */
821 if (status & IM_RX_OVRN_INT) {
822 /*
823 * Acknowlege Interrupt
824 */
825 SMC_SELECT_BANK(2);
826 outb(BASE + INTR_ACK_REG_B, IM_RX_OVRN_INT);
827
828 ++sc->arpcom.ac_if.if_ierrors;
829 }
830 /*
831 * Got a packet.
832 */
833 if (status & IM_RCV_INT) {
834 int packet_number;
835
836 SMC_SELECT_BANK(2);
837 packet_number = inw(BASE + FIFO_PORTS_REG_W);
838
839 if (packet_number & FIFO_REMPTY) {
840 /*
841 * we got called , but nothing was on the FIFO
842 */
843 printf("sn: Receive interrupt with nothing on FIFO\n");
844 goto out;
845 }
846 snread(ifp);
847 }
848 /*
849 * An on-card memory allocation came through.
850 */
851 if (status & IM_ALLOC_INT) {
852 /*
853 * Disable this interrupt.
854 */
855 mask &= ~IM_ALLOC_INT;
856 sc->arpcom.ac_if.if_flags &= ~IFF_OACTIVE;
857 snresume(&sc->arpcom.ac_if);
858 }
859 /*
860 * TX Completion. Handle a transmit error message. This will only be
861 * called when there is an error, because of the AUTO_RELEASE mode.
862 */
863 if (status & IM_TX_INT) {
864 /*
865 * Acknowlege Interrupt
866 */
867 SMC_SELECT_BANK(2);
868 outb(BASE + INTR_ACK_REG_B, IM_TX_INT);
869
870 packet_no = inw(BASE + FIFO_PORTS_REG_W);
871 packet_no &= FIFO_TX_MASK;
872
873 /*
874 * select this as the packet to read from
875 */
876 outb(BASE + PACKET_NUM_REG_B, packet_no);
877
878 /*
879 * Position the pointer to the first word from this packet
880 */
881 outw(BASE + POINTER_REG_W, PTR_AUTOINC | PTR_READ | 0x0000);
882
883 /*
884 * Fetch the TX status word. The value found here will be a
885 * copy of the EPH_STATUS_REG_W at the time the transmit
886 * failed.
887 */
888 tx_status = inw(BASE + DATA_REG_W);
889
890 if (tx_status & EPHSR_TX_SUC) {
891 device_printf(sc->dev,
892 "Successful packet caused interrupt\n");
893 } else {
894 ++sc->arpcom.ac_if.if_oerrors;
895 }
896
897 if (tx_status & EPHSR_LATCOL)
898 ++sc->arpcom.ac_if.if_collisions;
899
900 /*
901 * Some of these errors will have disabled transmit.
902 * Re-enable transmit now.
903 */
904 SMC_SELECT_BANK(0);
905
906#ifdef SW_PAD
907 outw(BASE + TXMIT_CONTROL_REG_W, TCR_ENABLE);
908#else
909 outw(BASE + TXMIT_CONTROL_REG_W, TCR_ENABLE | TCR_PAD_ENABLE);
910#endif /* SW_PAD */
911
912 /*
913 * kill the failed packet. Wait for the MMU to be un-busy.
914 */
915 SMC_SELECT_BANK(2);
916 while (inw(BASE + MMU_CMD_REG_W) & MMUCR_BUSY) /* NOTHING */
917 ;
918 outw(BASE + MMU_CMD_REG_W, MMUCR_FREEPKT);
919
920 /*
921 * Attempt to queue more transmits.
922 */
923 sc->arpcom.ac_if.if_flags &= ~IFF_OACTIVE;
924 snstart(&sc->arpcom.ac_if);
925 }
926 /*
927 * Transmit underrun. We use this opportunity to update transmit
928 * statistics from the card.
929 */
930 if (status & IM_TX_EMPTY_INT) {
931
932 /*
933 * Acknowlege Interrupt
934 */
935 SMC_SELECT_BANK(2);
936 outb(BASE + INTR_ACK_REG_B, IM_TX_EMPTY_INT);
937
938 /*
939 * Disable this interrupt.
940 */
941 mask &= ~IM_TX_EMPTY_INT;
942
943 SMC_SELECT_BANK(0);
944 card_stats = inw(BASE + COUNTER_REG_W);
945
946 /*
947 * Single collisions
948 */
949 sc->arpcom.ac_if.if_collisions += card_stats & ECR_COLN_MASK;
950
951 /*
952 * Multiple collisions
953 */
954 sc->arpcom.ac_if.if_collisions += (card_stats & ECR_MCOLN_MASK) >> 4;
955
956 SMC_SELECT_BANK(2);
957
958 /*
959 * Attempt to enqueue some more stuff.
960 */
961 sc->arpcom.ac_if.if_flags &= ~IFF_OACTIVE;
962 snstart(&sc->arpcom.ac_if);
963 }
964 /*
965 * Some other error. Try to fix it by resetting the adapter.
966 */
967 if (status & IM_EPH_INT) {
968 snstop(sc);
969 sninit(sc);
970 }
971
972out:
973 /*
974 * Handled all interrupt sources.
975 */
976
977 SMC_SELECT_BANK(2);
978
979 /*
980 * Reestablish interrupts from mask which have not been deselected
981 * during this interrupt. Note that the hardware mask, which was set
982 * to 0x00 at the start of this service routine, may have been
983 * updated by one or more of the interrupt handers and we must let
984 * those new interrupts stay enabled here.
985 */
986 mask |= inb(BASE + INTR_MASK_REG_B);
987 outb(BASE + INTR_MASK_REG_B, mask);
988 sc->intr_mask = mask;
989
990 splx(x);
991}
992
993void
994snread(register struct ifnet *ifp)
995{
996 struct sn_softc *sc = ifp->if_softc;
997 struct ether_header *eh;
998 struct mbuf *m;
999 short status;
1000 int packet_number;
1001 u_short packet_length;
1002 u_char *data;
1003
1004 SMC_SELECT_BANK(2);
1005#if 0
1006 packet_number = inw(BASE + FIFO_PORTS_REG_W);
1007
1008 if (packet_number & FIFO_REMPTY) {
1009
1010 /*
1011 * we got called , but nothing was on the FIFO
1012 */
1013 printf("sn: Receive interrupt with nothing on FIFO\n");
1014 return;
1015 }
1016#endif
1017read_another:
1018
1019 /*
1020 * Start reading from the start of the packet. Since PTR_RCV is set,
1021 * packet number is found in FIFO_PORTS_REG_W, FIFO_RX_MASK.
1022 */
1023 outw(BASE + POINTER_REG_W, PTR_READ | PTR_RCV | PTR_AUTOINC | 0x0000);
1024
1025 /*
1026 * First two words are status and packet_length
1027 */
1028 status = inw(BASE + DATA_REG_W);
1029 packet_length = inw(BASE + DATA_REG_W) & RLEN_MASK;
1030
1031 /*
1032 * The packet length contains 3 extra words: status, length, and a
1033 * extra word with the control byte.
1034 */
1035 packet_length -= 6;
1036
1037 /*
1038 * Account for receive errors and discard.
1039 */
1040 if (status & RS_ERRORS) {
1041 ++sc->arpcom.ac_if.if_ierrors;
1042 goto out;
1043 }
1044 /*
1045 * A packet is received.
1046 */
1047
1048 /*
1049 * Adjust for odd-length packet.
1050 */
1051 if (status & RS_ODDFRAME)
1052 packet_length++;
1053
1054 /*
1055 * Allocate a header mbuf from the kernel.
1056 */
1057 MGETHDR(m, M_DONTWAIT, MT_DATA);
1058 if (m == NULL)
1059 goto out;
1060
1061 m->m_pkthdr.rcvif = &sc->arpcom.ac_if;
1062 m->m_pkthdr.len = m->m_len = packet_length;
1063
1064 /*
1065 * Attach an mbuf cluster
1066 */
1067 MCLGET(m, M_DONTWAIT);
1068
1069 /*
1070 * Insist on getting a cluster
1071 */
1072 if ((m->m_flags & M_EXT) == 0) {
1073 m_freem(m);
1074 ++sc->arpcom.ac_if.if_ierrors;
1075 printf("sn: snread() kernel memory allocation problem\n");
1076 goto out;
1077 }
1078 eh = mtod(m, struct ether_header *);
1079
1080 /*
1081 * Get packet, including link layer address, from interface.
1082 */
1083
1084 data = (u_char *) eh;
1085 insw(BASE + DATA_REG_W, data, packet_length >> 1);
1086 if (packet_length & 1) {
1087 data += packet_length & ~1;
1088 *data = inb(BASE + DATA_REG_B);
1089 }
1090 ++sc->arpcom.ac_if.if_ipackets;
1091
1092 /*
1093 * Remove link layer addresses and whatnot.
1094 */
1095 m->m_pkthdr.len = m->m_len = packet_length;
1096
1097 (*ifp->if_input)(ifp, m);
1098
1099out:
1100
1101 /*
1102 * Error or good, tell the card to get rid of this packet Wait for
1103 * the MMU to be un-busy.
1104 */
1105 SMC_SELECT_BANK(2);
1106 while (inw(BASE + MMU_CMD_REG_W) & MMUCR_BUSY) /* NOTHING */
1107 ;
1108 outw(BASE + MMU_CMD_REG_W, MMUCR_RELEASE);
1109
1110 /*
1111 * Check whether another packet is ready
1112 */
1113 packet_number = inw(BASE + FIFO_PORTS_REG_W);
1114 if (packet_number & FIFO_REMPTY) {
1115 return;
1116 }
1117 goto read_another;
1118}
1119
1120
1121/*
1122 * Handle IOCTLS. This function is completely stolen from if_ep.c
1123 * As with its progenitor, it does not handle hardware address
1124 * changes.
1125 */
1126static int
1127snioctl(register struct ifnet *ifp, u_long cmd, caddr_t data)
1128{
1129 struct sn_softc *sc = ifp->if_softc;
1130 int s, error = 0;
1131
1132 s = splimp();
1133
1134 switch (cmd) {
1135 case SIOCSIFFLAGS:
1136 if ((ifp->if_flags & IFF_UP) == 0 && ifp->if_flags & IFF_RUNNING) {
1137 ifp->if_flags &= ~IFF_RUNNING;
1138 snstop(sc);
1139 break;
1140 } else {
1141 /* reinitialize card on any parameter change */
1142 sninit(sc);
1143 break;
1144 }
1145 break;
1146
1147#ifdef notdef
1148 case SIOCGHWADDR:
1149 bcopy((caddr_t) sc->sc_addr, (caddr_t) & ifr->ifr_data,
1150 sizeof(sc->sc_addr));
1151 break;
1152#endif
1153
1154 case SIOCADDMULTI:
1155 /* update multicast filter list. */
1156 sn_setmcast(sc);
1157 error = 0;
1158 break;
1159 case SIOCDELMULTI:
1160 /* update multicast filter list. */
1161 sn_setmcast(sc);
1162 error = 0;
1163 break;
1164 default:
1165 error = EINVAL;
1166 error = ether_ioctl(ifp, cmd, data);
1167 break;
1168 }
1169
1170 splx(s);
1171
1172 return (error);
1173}
1174
1175void
1176snreset(struct sn_softc *sc)
1177{
1178 int s;
1179
1180 s = splimp();
1181 snstop(sc);
1182 sninit(sc);
1183
1184 splx(s);
1185}
1186
1187void
1188snwatchdog(struct ifnet *ifp)
1189{
1190 int s;
1191 s = splimp();
1192 sn_intr(ifp->if_softc);
1193 splx(s);
1194}
1195
1196
1197/* 1. zero the interrupt mask
1198 * 2. clear the enable receive flag
1199 * 3. clear the enable xmit flags
1200 */
1201void
1202snstop(struct sn_softc *sc)
1203{
1204
1205 struct ifnet *ifp = &sc->arpcom.ac_if;
1206
1207 /*
1208 * Clear interrupt mask; disable all interrupts.
1209 */
1210 SMC_SELECT_BANK(2);
1211 outb(BASE + INTR_MASK_REG_B, 0x00);
1212
1213 /*
1214 * Disable transmitter and Receiver
1215 */
1216 SMC_SELECT_BANK(0);
1217 outw(BASE + RECV_CONTROL_REG_W, 0x0000);
1218 outw(BASE + TXMIT_CONTROL_REG_W, 0x0000);
1219
1220 /*
1221 * Cancel watchdog.
1222 */
1223 ifp->if_timer = 0;
1224}
1225
1226
1227int
1228sn_activate(device_t dev)
1229{
1230 struct sn_softc *sc = device_get_softc(dev);
1231 int err;
1232
1233 sc->port_rid = 0;
1234 sc->port_res = bus_alloc_resource(dev, SYS_RES_IOPORT, &sc->port_rid,
1235 0, ~0, SMC_IO_EXTENT, RF_ACTIVE);
1236 if (!sc->port_res) {
1237 if (bootverbose)
1238 device_printf(dev, "Cannot allocate ioport\n");
1239 return ENOMEM;
1240 }
1241
1242 sc->irq_rid = 0;
1243 sc->irq_res = bus_alloc_resource(dev, SYS_RES_IRQ, &sc->irq_rid,
1244 0, ~0, 1, RF_ACTIVE);
1245 if (!sc->irq_res) {
1246 if (bootverbose)
1247 device_printf(dev, "Cannot allocate irq\n");
1248 sn_deactivate(dev);
1249 return ENOMEM;
1250 }
1251 if ((err = bus_setup_intr(dev, sc->irq_res, INTR_TYPE_NET, sn_intr, sc,
1252 &sc->intrhand)) != 0) {
1253 sn_deactivate(dev);
1254 return err;
1255 }
1256
1257 sc->sn_io_addr = rman_get_start(sc->port_res);
1258 return (0);
1259}
1260
1261void
1262sn_deactivate(device_t dev)
1263{
1264 struct sn_softc *sc = device_get_softc(dev);
1265
1266 if (sc->intrhand)
1267 bus_teardown_intr(dev, sc->irq_res, sc->intrhand);
1268 sc->intrhand = 0;
1269 if (sc->port_res)
1270 bus_release_resource(dev, SYS_RES_IOPORT, sc->port_rid,
1271 sc->port_res);
1272 sc->port_res = 0;
1273 if (sc->irq_res)
1274 bus_release_resource(dev, SYS_RES_IRQ, sc->irq_rid,
1275 sc->irq_res);
1276 sc->irq_res = 0;
1277 return;
1278}
1279
1280/*
1281 * Function: sn_probe( device_t dev, int pccard )
1282 *
1283 * Purpose:
1284 * Tests to see if a given ioaddr points to an SMC9xxx chip.
1285 * Tries to cause as little damage as possible if it's not a SMC chip.
1286 * Returns a 0 on success
1287 *
1288 * Algorithm:
1289 * (1) see if the high byte of BANK_SELECT is 0x33
1290 * (2) compare the ioaddr with the base register's address
1291 * (3) see if I recognize the chip ID in the appropriate register
1292 *
1293 *
1294 */
1295int
1296sn_probe(device_t dev, int pccard)
1297{
1298 struct sn_softc *sc = device_get_softc(dev);
1299 u_int bank;
1300 u_short revision_register;
1301 u_short base_address_register;
1302 u_short ioaddr;
1303 int err;
1304
1305 if ((err = sn_activate(dev)) != 0)
1306 return err;
1307
1308 ioaddr = sc->sn_io_addr;
1309#ifdef SN_DEBUG
1310 device_printf(dev, "ioaddr is 0x%x\n", ioaddr);
1311#endif
1312 /*
1313 * First, see if the high byte is 0x33
1314 */
1315 bank = inw(ioaddr + BANK_SELECT_REG_W);
1316 if ((bank & BSR_DETECT_MASK) != BSR_DETECT_VALUE) {
1317#ifdef SN_DEBUG
1318 device_printf(dev, "test1 failed\n");
1319#endif
1320 goto error;
1321 }
1322 /*
1323 * The above MIGHT indicate a device, but I need to write to further
1324 * test this. Go to bank 0, then test that the register still
1325 * reports the high byte is 0x33.
1326 */
1327 outw(ioaddr + BANK_SELECT_REG_W, 0x0000);
1328 bank = inw(ioaddr + BANK_SELECT_REG_W);
1329 if ((bank & BSR_DETECT_MASK) != BSR_DETECT_VALUE) {
1330#ifdef SN_DEBUG
1331 device_printf(dev, "test2 failed\n");
1332#endif
1333 goto error;
1334 }
1335 /*
1336 * well, we've already written once, so hopefully another time won't
1337 * hurt. This time, I need to switch the bank register to bank 1, so
1338 * I can access the base address register. The contents of the
1339 * BASE_ADDR_REG_W register, after some jiggery pokery, is expected
1340 * to match the I/O port address where the adapter is being probed.
1341 */
1342 outw(ioaddr + BANK_SELECT_REG_W, 0x0001);
1343 base_address_register = inw(ioaddr + BASE_ADDR_REG_W);
1344
1345 /*
1346 * This test is nonsence on PC-card architecture, so if
1347 * pccard == 1, skip this test. (hosokawa)
1348 */
1349 if (!pccard && (ioaddr != (base_address_register >> 3 & 0x3E0))) {
1350
1351 /*
1352 * Well, the base address register didn't match. Must not
1353 * have been a SMC chip after all.
1354 */
1355#ifdef SN_DEBUG
1356 device_printf(dev, "test3 failed ioaddr = 0x%x, "
1357 "base_address_register = 0x%x\n", ioaddr,
1358 base_address_register >> 3 & 0x3E0);
1359#endif
1360 goto error;
1361 }
1362
1363 /*
1364 * Check if the revision register is something that I recognize.
1365 * These might need to be added to later, as future revisions could
1366 * be added.
1367 */
1368 outw(ioaddr + BANK_SELECT_REG_W, 0x3);
1369 revision_register = inw(ioaddr + REVISION_REG_W);
1370 if (!chip_ids[(revision_register >> 4) & 0xF]) {
1371
1372 /*
1373 * I don't regonize this chip, so...
1374 */
1375#ifdef SN_DEBUG
1376 device_printf(dev, "test4 failed\n");
1377#endif
1378 goto error;
1379 }
1380
1381 /*
1382 * at this point I'll assume that the chip is an SMC9xxx. It might be
1383 * prudent to check a listing of MAC addresses against the hardware
1384 * address, or do some other tests.
1385 */
1386 sn_deactivate(dev);
1387 return 0;
1388 error:
1389 sn_deactivate(dev);
1390 return ENXIO;
1391}
1392
1393#define MCFSZ 8
1394
1395static void
1396sn_setmcast(struct sn_softc *sc)
1397{
1398 struct ifnet *ifp = (struct ifnet *)sc;
1399 int flags;
1400
1401 /*
1402 * Set the receiver filter. We want receive enabled and auto strip
1403 * of CRC from received packet. If we are promiscuous then set that
1404 * bit too.
1405 */
1406 flags = RCR_ENABLE | RCR_STRIP_CRC;
1407
1408 if (ifp->if_flags & IFF_PROMISC) {
1409 flags |= RCR_PROMISC | RCR_ALMUL;
1410 } else if (ifp->if_flags & IFF_ALLMULTI) {
1411 flags |= RCR_ALMUL;
1412 } else {
1413 u_char mcf[MCFSZ];
1414 if (sn_getmcf(&sc->arpcom, mcf)) {
1415 /* set filter */
1416 SMC_SELECT_BANK(3);
1417 outw(BASE + MULTICAST1_REG_W,
1418 ((u_short)mcf[1] << 8) | mcf[0]);
1419 outw(BASE + MULTICAST2_REG_W,
1420 ((u_short)mcf[3] << 8) | mcf[2]);
1421 outw(BASE + MULTICAST3_REG_W,
1422 ((u_short)mcf[5] << 8) | mcf[4]);
1423 outw(BASE + MULTICAST4_REG_W,
1424 ((u_short)mcf[7] << 8) | mcf[6]);
1425 } else {
1426 flags |= RCR_ALMUL;
1427 }
1428 }
1429 SMC_SELECT_BANK(0);
1430 outw(BASE + RECV_CONTROL_REG_W, flags);
1431}
1432
1433static int
1434sn_getmcf(struct arpcom *ac, u_char *mcf)
1435{
1436 int i;
1437 register u_int index, index2;
1438 register u_char *af = (u_char *) mcf;
1439 struct ifmultiaddr *ifma;
1440
1441 bzero(mcf, MCFSZ);
1442
1443 TAILQ_FOREACH(ifma, &ac->ac_if.if_multiaddrs, ifma_link) {
1444 if (ifma->ifma_addr->sa_family != AF_LINK)
1445 return 0;
1446 index = smc_crc(LLADDR((struct sockaddr_dl *)ifma->ifma_addr)) & 0x3f;
1447 index2 = 0;
1448 for (i = 0; i < 6; i++) {
1449 index2 <<= 1;
1450 index2 |= (index & 0x01);
1451 index >>= 1;
1452 }
1453 af[index2 >> 3] |= 1 << (index2 & 7);
1454 }
1455 return 1; /* use multicast filter */
1456}
1457
1458static u_int
1459smc_crc(u_char *s)
1460{
1461 int perByte;
1462 int perBit;
1463 const u_int poly = 0xedb88320;
1464 u_int v = 0xffffffff;
1465 u_char c;
1466
1467 for (perByte = 0; perByte < ETHER_ADDR_LEN; perByte++) {
1468 c = s[perByte];
1469 for (perBit = 0; perBit < 8; perBit++) {
1470 v = (v >> 1)^(((v ^ c) & 0x01) ? poly : 0);
1471 c >>= 1;
1472 }
1473 }
1474 return v;
1475}
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