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siena_impl.h (291436) siena_impl.h (291588)
1/*-
2 * Copyright (c) 2009-2015 Solarflare Communications Inc.
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are met:
7 *
8 * 1. Redistributions of source code must retain the above copyright notice,
9 * this list of conditions and the following disclaimer.
10 * 2. Redistributions in binary form must reproduce the above copyright notice,
11 * this list of conditions and the following disclaimer in the documentation
12 * and/or other materials provided with the distribution.
13 *
14 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
15 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
16 * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
17 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
18 * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
19 * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
20 * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
21 * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
22 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
23 * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
24 * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
25 *
26 * The views and conclusions contained in the software and documentation are
27 * those of the authors and should not be interpreted as representing official
28 * policies, either expressed or implied, of the FreeBSD Project.
29 *
1/*-
2 * Copyright (c) 2009-2015 Solarflare Communications Inc.
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are met:
7 *
8 * 1. Redistributions of source code must retain the above copyright notice,
9 * this list of conditions and the following disclaimer.
10 * 2. Redistributions in binary form must reproduce the above copyright notice,
11 * this list of conditions and the following disclaimer in the documentation
12 * and/or other materials provided with the distribution.
13 *
14 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
15 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
16 * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
17 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
18 * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
19 * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
20 * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
21 * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
22 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
23 * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
24 * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
25 *
26 * The views and conclusions contained in the software and documentation are
27 * those of the authors and should not be interpreted as representing official
28 * policies, either expressed or implied, of the FreeBSD Project.
29 *
30 * $FreeBSD: head/sys/dev/sfxge/common/siena_impl.h 291436 2015-11-29 05:42:49Z arybchik $
30 * $FreeBSD: head/sys/dev/sfxge/common/siena_impl.h 291588 2015-12-01 15:38:39Z arybchik $
31 */
32
33#ifndef _SYS_SIENA_IMPL_H
34#define _SYS_SIENA_IMPL_H
35
36#include "efx.h"
37#include "efx_regs.h"
38#include "efx_mcdi.h"
39#include "siena_flash.h"
40
41#ifdef __cplusplus
42extern "C" {
43#endif
44
45#if EFSYS_OPT_PHY_PROPS
46
47/* START MKCONFIG GENERATED SienaPhyHeaderPropsBlock a8db1f8eb5106efd */
48typedef enum siena_phy_prop_e {
49 SIENA_PHY_NPROPS
50} siena_phy_prop_t;
51
52/* END MKCONFIG GENERATED SienaPhyHeaderPropsBlock */
53
54#endif /* EFSYS_OPT_PHY_PROPS */
55
56#define SIENA_NVRAM_CHUNK 0x80
57
58extern __checkReturn efx_rc_t
59siena_nic_probe(
60 __in efx_nic_t *enp);
61
62#if EFSYS_OPT_PCIE_TUNE
63
64extern __checkReturn efx_rc_t
65siena_nic_pcie_extended_sync(
66 __in efx_nic_t *enp);
67
68#endif
69
70extern __checkReturn efx_rc_t
71siena_nic_reset(
72 __in efx_nic_t *enp);
73
74extern __checkReturn efx_rc_t
75siena_nic_init(
76 __in efx_nic_t *enp);
77
78#if EFSYS_OPT_DIAG
79
80extern __checkReturn efx_rc_t
81siena_nic_register_test(
82 __in efx_nic_t *enp);
83
84#endif /* EFSYS_OPT_DIAG */
85
86extern void
87siena_nic_fini(
88 __in efx_nic_t *enp);
89
90extern void
91siena_nic_unprobe(
92 __in efx_nic_t *enp);
93
94#define SIENA_SRAM_ROWS 0x12000
95
96extern void
97siena_sram_init(
98 __in efx_nic_t *enp);
99
100#if EFSYS_OPT_DIAG
101
102extern __checkReturn efx_rc_t
103siena_sram_test(
104 __in efx_nic_t *enp,
105 __in efx_sram_pattern_fn_t func);
106
107#endif /* EFSYS_OPT_DIAG */
108
109#if EFSYS_OPT_MCDI
110
111extern __checkReturn efx_rc_t
112siena_mcdi_init(
113 __in efx_nic_t *enp,
114 __in const efx_mcdi_transport_t *mtp);
115
116extern void
117siena_mcdi_request_copyin(
118 __in efx_nic_t *enp,
119 __in efx_mcdi_req_t *emrp,
120 __in unsigned int seq,
121 __in boolean_t ev_cpl,
122 __in boolean_t new_epoch);
123
124extern __checkReturn boolean_t
125siena_mcdi_request_poll(
126 __in efx_nic_t *enp);
127
128extern void
129siena_mcdi_request_copyout(
130 __in efx_nic_t *enp,
131 __in efx_mcdi_req_t *emrp);
132
133extern efx_rc_t
134siena_mcdi_poll_reboot(
135 __in efx_nic_t *enp);
136
137extern void
138siena_mcdi_fini(
139 __in efx_nic_t *enp);
140
141extern __checkReturn efx_rc_t
142siena_mcdi_fw_update_supported(
143 __in efx_nic_t *enp,
144 __out boolean_t *supportedp);
145
146extern __checkReturn efx_rc_t
147siena_mcdi_macaddr_change_supported(
148 __in efx_nic_t *enp,
149 __out boolean_t *supportedp);
150
31 */
32
33#ifndef _SYS_SIENA_IMPL_H
34#define _SYS_SIENA_IMPL_H
35
36#include "efx.h"
37#include "efx_regs.h"
38#include "efx_mcdi.h"
39#include "siena_flash.h"
40
41#ifdef __cplusplus
42extern "C" {
43#endif
44
45#if EFSYS_OPT_PHY_PROPS
46
47/* START MKCONFIG GENERATED SienaPhyHeaderPropsBlock a8db1f8eb5106efd */
48typedef enum siena_phy_prop_e {
49 SIENA_PHY_NPROPS
50} siena_phy_prop_t;
51
52/* END MKCONFIG GENERATED SienaPhyHeaderPropsBlock */
53
54#endif /* EFSYS_OPT_PHY_PROPS */
55
56#define SIENA_NVRAM_CHUNK 0x80
57
58extern __checkReturn efx_rc_t
59siena_nic_probe(
60 __in efx_nic_t *enp);
61
62#if EFSYS_OPT_PCIE_TUNE
63
64extern __checkReturn efx_rc_t
65siena_nic_pcie_extended_sync(
66 __in efx_nic_t *enp);
67
68#endif
69
70extern __checkReturn efx_rc_t
71siena_nic_reset(
72 __in efx_nic_t *enp);
73
74extern __checkReturn efx_rc_t
75siena_nic_init(
76 __in efx_nic_t *enp);
77
78#if EFSYS_OPT_DIAG
79
80extern __checkReturn efx_rc_t
81siena_nic_register_test(
82 __in efx_nic_t *enp);
83
84#endif /* EFSYS_OPT_DIAG */
85
86extern void
87siena_nic_fini(
88 __in efx_nic_t *enp);
89
90extern void
91siena_nic_unprobe(
92 __in efx_nic_t *enp);
93
94#define SIENA_SRAM_ROWS 0x12000
95
96extern void
97siena_sram_init(
98 __in efx_nic_t *enp);
99
100#if EFSYS_OPT_DIAG
101
102extern __checkReturn efx_rc_t
103siena_sram_test(
104 __in efx_nic_t *enp,
105 __in efx_sram_pattern_fn_t func);
106
107#endif /* EFSYS_OPT_DIAG */
108
109#if EFSYS_OPT_MCDI
110
111extern __checkReturn efx_rc_t
112siena_mcdi_init(
113 __in efx_nic_t *enp,
114 __in const efx_mcdi_transport_t *mtp);
115
116extern void
117siena_mcdi_request_copyin(
118 __in efx_nic_t *enp,
119 __in efx_mcdi_req_t *emrp,
120 __in unsigned int seq,
121 __in boolean_t ev_cpl,
122 __in boolean_t new_epoch);
123
124extern __checkReturn boolean_t
125siena_mcdi_request_poll(
126 __in efx_nic_t *enp);
127
128extern void
129siena_mcdi_request_copyout(
130 __in efx_nic_t *enp,
131 __in efx_mcdi_req_t *emrp);
132
133extern efx_rc_t
134siena_mcdi_poll_reboot(
135 __in efx_nic_t *enp);
136
137extern void
138siena_mcdi_fini(
139 __in efx_nic_t *enp);
140
141extern __checkReturn efx_rc_t
142siena_mcdi_fw_update_supported(
143 __in efx_nic_t *enp,
144 __out boolean_t *supportedp);
145
146extern __checkReturn efx_rc_t
147siena_mcdi_macaddr_change_supported(
148 __in efx_nic_t *enp,
149 __out boolean_t *supportedp);
150
151extern __checkReturn efx_rc_t
152siena_mcdi_link_control_supported(
153 __in efx_nic_t *enp,
154 __out boolean_t *supportedp);
155
151#endif /* EFSYS_OPT_MCDI */
152
153#if EFSYS_OPT_NVRAM || EFSYS_OPT_VPD
154
155extern __checkReturn efx_rc_t
156siena_nvram_partn_size(
157 __in efx_nic_t *enp,
158 __in unsigned int partn,
159 __out size_t *sizep);
160
161extern __checkReturn efx_rc_t
162siena_nvram_partn_lock(
163 __in efx_nic_t *enp,
164 __in unsigned int partn);
165
166extern __checkReturn efx_rc_t
167siena_nvram_partn_read(
168 __in efx_nic_t *enp,
169 __in unsigned int partn,
170 __in unsigned int offset,
171 __out_bcount(size) caddr_t data,
172 __in size_t size);
173
174extern __checkReturn efx_rc_t
175siena_nvram_partn_erase(
176 __in efx_nic_t *enp,
177 __in unsigned int partn,
178 __in unsigned int offset,
179 __in size_t size);
180
181extern __checkReturn efx_rc_t
182siena_nvram_partn_write(
183 __in efx_nic_t *enp,
184 __in unsigned int partn,
185 __in unsigned int offset,
186 __out_bcount(size) caddr_t data,
187 __in size_t size);
188
189extern void
190siena_nvram_partn_unlock(
191 __in efx_nic_t *enp,
192 __in unsigned int partn);
193
194extern __checkReturn efx_rc_t
195siena_nvram_get_dynamic_cfg(
196 __in efx_nic_t *enp,
197 __in unsigned int index,
198 __in boolean_t vpd,
199 __out siena_mc_dynamic_config_hdr_t **dcfgp,
200 __out size_t *sizep);
201
202#endif /* EFSYS_OPT_VPD || EFSYS_OPT_NVRAM */
203
204#if EFSYS_OPT_NVRAM
205
206#if EFSYS_OPT_DIAG
207
208extern __checkReturn efx_rc_t
209siena_nvram_test(
210 __in efx_nic_t *enp);
211
212#endif /* EFSYS_OPT_DIAG */
213
214extern __checkReturn efx_rc_t
215siena_nvram_size(
216 __in efx_nic_t *enp,
217 __in efx_nvram_type_t type,
218 __out size_t *sizep);
219
220extern __checkReturn efx_rc_t
221siena_nvram_get_subtype(
222 __in efx_nic_t *enp,
223 __in unsigned int partn,
224 __out uint32_t *subtypep);
225
226extern __checkReturn efx_rc_t
227siena_nvram_get_version(
228 __in efx_nic_t *enp,
229 __in efx_nvram_type_t type,
230 __out uint32_t *subtypep,
231 __out_ecount(4) uint16_t version[4]);
232
233extern __checkReturn efx_rc_t
234siena_nvram_rw_start(
235 __in efx_nic_t *enp,
236 __in efx_nvram_type_t type,
237 __out size_t *pref_chunkp);
238
239extern __checkReturn efx_rc_t
240siena_nvram_read_chunk(
241 __in efx_nic_t *enp,
242 __in efx_nvram_type_t type,
243 __in unsigned int offset,
244 __out_bcount(size) caddr_t data,
245 __in size_t size);
246
247extern __checkReturn efx_rc_t
248siena_nvram_erase(
249 __in efx_nic_t *enp,
250 __in efx_nvram_type_t type);
251
252extern __checkReturn efx_rc_t
253siena_nvram_write_chunk(
254 __in efx_nic_t *enp,
255 __in efx_nvram_type_t type,
256 __in unsigned int offset,
257 __in_bcount(size) caddr_t data,
258 __in size_t size);
259
260extern void
261siena_nvram_rw_finish(
262 __in efx_nic_t *enp,
263 __in efx_nvram_type_t type);
264
265extern __checkReturn efx_rc_t
266siena_nvram_set_version(
267 __in efx_nic_t *enp,
268 __in efx_nvram_type_t type,
269 __in_ecount(4) uint16_t version[4]);
270
271#endif /* EFSYS_OPT_NVRAM */
272
273#if EFSYS_OPT_VPD
274
275extern __checkReturn efx_rc_t
276siena_vpd_init(
277 __in efx_nic_t *enp);
278
279extern __checkReturn efx_rc_t
280siena_vpd_size(
281 __in efx_nic_t *enp,
282 __out size_t *sizep);
283
284extern __checkReturn efx_rc_t
285siena_vpd_read(
286 __in efx_nic_t *enp,
287 __out_bcount(size) caddr_t data,
288 __in size_t size);
289
290extern __checkReturn efx_rc_t
291siena_vpd_verify(
292 __in efx_nic_t *enp,
293 __in_bcount(size) caddr_t data,
294 __in size_t size);
295
296extern __checkReturn efx_rc_t
297siena_vpd_reinit(
298 __in efx_nic_t *enp,
299 __in_bcount(size) caddr_t data,
300 __in size_t size);
301
302extern __checkReturn efx_rc_t
303siena_vpd_get(
304 __in efx_nic_t *enp,
305 __in_bcount(size) caddr_t data,
306 __in size_t size,
307 __inout efx_vpd_value_t *evvp);
308
309extern __checkReturn efx_rc_t
310siena_vpd_set(
311 __in efx_nic_t *enp,
312 __in_bcount(size) caddr_t data,
313 __in size_t size,
314 __in efx_vpd_value_t *evvp);
315
316extern __checkReturn efx_rc_t
317siena_vpd_next(
318 __in efx_nic_t *enp,
319 __in_bcount(size) caddr_t data,
320 __in size_t size,
321 __out efx_vpd_value_t *evvp,
322 __inout unsigned int *contp);
323
324extern __checkReturn efx_rc_t
325siena_vpd_write(
326 __in efx_nic_t *enp,
327 __in_bcount(size) caddr_t data,
328 __in size_t size);
329
330extern void
331siena_vpd_fini(
332 __in efx_nic_t *enp);
333
334#endif /* EFSYS_OPT_VPD */
335
336typedef struct siena_link_state_s {
337 uint32_t sls_adv_cap_mask;
338 uint32_t sls_lp_cap_mask;
339 unsigned int sls_fcntl;
340 efx_link_mode_t sls_link_mode;
341#if EFSYS_OPT_LOOPBACK
342 efx_loopback_type_t sls_loopback;
343#endif
344 boolean_t sls_mac_up;
345} siena_link_state_t;
346
347extern void
348siena_phy_link_ev(
349 __in efx_nic_t *enp,
350 __in efx_qword_t *eqp,
351 __out efx_link_mode_t *link_modep);
352
353extern __checkReturn efx_rc_t
354siena_phy_get_link(
355 __in efx_nic_t *enp,
356 __out siena_link_state_t *slsp);
357
358extern __checkReturn efx_rc_t
359siena_phy_power(
360 __in efx_nic_t *enp,
361 __in boolean_t on);
362
363extern __checkReturn efx_rc_t
364siena_phy_reconfigure(
365 __in efx_nic_t *enp);
366
367extern __checkReturn efx_rc_t
368siena_phy_verify(
369 __in efx_nic_t *enp);
370
371extern __checkReturn efx_rc_t
372siena_phy_oui_get(
373 __in efx_nic_t *enp,
374 __out uint32_t *ouip);
375
376#if EFSYS_OPT_PHY_STATS
377
378extern void
379siena_phy_decode_stats(
380 __in efx_nic_t *enp,
381 __in uint32_t vmask,
382 __in_opt efsys_mem_t *esmp,
383 __out_opt uint64_t *smaskp,
384 __inout_ecount_opt(EFX_PHY_NSTATS) uint32_t *stat);
385
386extern __checkReturn efx_rc_t
387siena_phy_stats_update(
388 __in efx_nic_t *enp,
389 __in efsys_mem_t *esmp,
390 __inout_ecount(EFX_PHY_NSTATS) uint32_t *stat);
391
392#endif /* EFSYS_OPT_PHY_STATS */
393
394#if EFSYS_OPT_PHY_PROPS
395
396#if EFSYS_OPT_NAMES
397
398extern const char *
399siena_phy_prop_name(
400 __in efx_nic_t *enp,
401 __in unsigned int id);
402
403#endif /* EFSYS_OPT_NAMES */
404
405extern __checkReturn efx_rc_t
406siena_phy_prop_get(
407 __in efx_nic_t *enp,
408 __in unsigned int id,
409 __in uint32_t flags,
410 __out uint32_t *valp);
411
412extern __checkReturn efx_rc_t
413siena_phy_prop_set(
414 __in efx_nic_t *enp,
415 __in unsigned int id,
416 __in uint32_t val);
417
418#endif /* EFSYS_OPT_PHY_PROPS */
419
420#if EFSYS_OPT_BIST
421
422extern __checkReturn efx_rc_t
423siena_phy_bist_start(
424 __in efx_nic_t *enp,
425 __in efx_bist_type_t type);
426
427extern __checkReturn efx_rc_t
428siena_phy_bist_poll(
429 __in efx_nic_t *enp,
430 __in efx_bist_type_t type,
431 __out efx_bist_result_t *resultp,
432 __out_opt __drv_when(count > 0, __notnull)
433 uint32_t *value_maskp,
434 __out_ecount_opt(count) __drv_when(count > 0, __notnull)
435 unsigned long *valuesp,
436 __in size_t count);
437
438extern void
439siena_phy_bist_stop(
440 __in efx_nic_t *enp,
441 __in efx_bist_type_t type);
442
443#endif /* EFSYS_OPT_BIST */
444
445extern __checkReturn efx_rc_t
446siena_mac_poll(
447 __in efx_nic_t *enp,
448 __out efx_link_mode_t *link_modep);
449
450extern __checkReturn efx_rc_t
451siena_mac_up(
452 __in efx_nic_t *enp,
453 __out boolean_t *mac_upp);
454
455extern __checkReturn efx_rc_t
456siena_mac_reconfigure(
457 __in efx_nic_t *enp);
458
459#if EFSYS_OPT_LOOPBACK
460
461extern __checkReturn efx_rc_t
462siena_mac_loopback_set(
463 __in efx_nic_t *enp,
464 __in efx_link_mode_t link_mode,
465 __in efx_loopback_type_t loopback_type);
466
467#endif /* EFSYS_OPT_LOOPBACK */
468
469#if EFSYS_OPT_MAC_STATS
470
471extern __checkReturn efx_rc_t
472siena_mac_stats_update(
473 __in efx_nic_t *enp,
474 __in efsys_mem_t *esmp,
475 __inout_ecount(EFX_MAC_NSTATS) efsys_stat_t *stat,
476 __inout_opt uint32_t *generationp);
477
478#endif /* EFSYS_OPT_MAC_STATS */
479
480#ifdef __cplusplus
481}
482#endif
483
484#endif /* _SYS_SIENA_IMPL_H */
156#endif /* EFSYS_OPT_MCDI */
157
158#if EFSYS_OPT_NVRAM || EFSYS_OPT_VPD
159
160extern __checkReturn efx_rc_t
161siena_nvram_partn_size(
162 __in efx_nic_t *enp,
163 __in unsigned int partn,
164 __out size_t *sizep);
165
166extern __checkReturn efx_rc_t
167siena_nvram_partn_lock(
168 __in efx_nic_t *enp,
169 __in unsigned int partn);
170
171extern __checkReturn efx_rc_t
172siena_nvram_partn_read(
173 __in efx_nic_t *enp,
174 __in unsigned int partn,
175 __in unsigned int offset,
176 __out_bcount(size) caddr_t data,
177 __in size_t size);
178
179extern __checkReturn efx_rc_t
180siena_nvram_partn_erase(
181 __in efx_nic_t *enp,
182 __in unsigned int partn,
183 __in unsigned int offset,
184 __in size_t size);
185
186extern __checkReturn efx_rc_t
187siena_nvram_partn_write(
188 __in efx_nic_t *enp,
189 __in unsigned int partn,
190 __in unsigned int offset,
191 __out_bcount(size) caddr_t data,
192 __in size_t size);
193
194extern void
195siena_nvram_partn_unlock(
196 __in efx_nic_t *enp,
197 __in unsigned int partn);
198
199extern __checkReturn efx_rc_t
200siena_nvram_get_dynamic_cfg(
201 __in efx_nic_t *enp,
202 __in unsigned int index,
203 __in boolean_t vpd,
204 __out siena_mc_dynamic_config_hdr_t **dcfgp,
205 __out size_t *sizep);
206
207#endif /* EFSYS_OPT_VPD || EFSYS_OPT_NVRAM */
208
209#if EFSYS_OPT_NVRAM
210
211#if EFSYS_OPT_DIAG
212
213extern __checkReturn efx_rc_t
214siena_nvram_test(
215 __in efx_nic_t *enp);
216
217#endif /* EFSYS_OPT_DIAG */
218
219extern __checkReturn efx_rc_t
220siena_nvram_size(
221 __in efx_nic_t *enp,
222 __in efx_nvram_type_t type,
223 __out size_t *sizep);
224
225extern __checkReturn efx_rc_t
226siena_nvram_get_subtype(
227 __in efx_nic_t *enp,
228 __in unsigned int partn,
229 __out uint32_t *subtypep);
230
231extern __checkReturn efx_rc_t
232siena_nvram_get_version(
233 __in efx_nic_t *enp,
234 __in efx_nvram_type_t type,
235 __out uint32_t *subtypep,
236 __out_ecount(4) uint16_t version[4]);
237
238extern __checkReturn efx_rc_t
239siena_nvram_rw_start(
240 __in efx_nic_t *enp,
241 __in efx_nvram_type_t type,
242 __out size_t *pref_chunkp);
243
244extern __checkReturn efx_rc_t
245siena_nvram_read_chunk(
246 __in efx_nic_t *enp,
247 __in efx_nvram_type_t type,
248 __in unsigned int offset,
249 __out_bcount(size) caddr_t data,
250 __in size_t size);
251
252extern __checkReturn efx_rc_t
253siena_nvram_erase(
254 __in efx_nic_t *enp,
255 __in efx_nvram_type_t type);
256
257extern __checkReturn efx_rc_t
258siena_nvram_write_chunk(
259 __in efx_nic_t *enp,
260 __in efx_nvram_type_t type,
261 __in unsigned int offset,
262 __in_bcount(size) caddr_t data,
263 __in size_t size);
264
265extern void
266siena_nvram_rw_finish(
267 __in efx_nic_t *enp,
268 __in efx_nvram_type_t type);
269
270extern __checkReturn efx_rc_t
271siena_nvram_set_version(
272 __in efx_nic_t *enp,
273 __in efx_nvram_type_t type,
274 __in_ecount(4) uint16_t version[4]);
275
276#endif /* EFSYS_OPT_NVRAM */
277
278#if EFSYS_OPT_VPD
279
280extern __checkReturn efx_rc_t
281siena_vpd_init(
282 __in efx_nic_t *enp);
283
284extern __checkReturn efx_rc_t
285siena_vpd_size(
286 __in efx_nic_t *enp,
287 __out size_t *sizep);
288
289extern __checkReturn efx_rc_t
290siena_vpd_read(
291 __in efx_nic_t *enp,
292 __out_bcount(size) caddr_t data,
293 __in size_t size);
294
295extern __checkReturn efx_rc_t
296siena_vpd_verify(
297 __in efx_nic_t *enp,
298 __in_bcount(size) caddr_t data,
299 __in size_t size);
300
301extern __checkReturn efx_rc_t
302siena_vpd_reinit(
303 __in efx_nic_t *enp,
304 __in_bcount(size) caddr_t data,
305 __in size_t size);
306
307extern __checkReturn efx_rc_t
308siena_vpd_get(
309 __in efx_nic_t *enp,
310 __in_bcount(size) caddr_t data,
311 __in size_t size,
312 __inout efx_vpd_value_t *evvp);
313
314extern __checkReturn efx_rc_t
315siena_vpd_set(
316 __in efx_nic_t *enp,
317 __in_bcount(size) caddr_t data,
318 __in size_t size,
319 __in efx_vpd_value_t *evvp);
320
321extern __checkReturn efx_rc_t
322siena_vpd_next(
323 __in efx_nic_t *enp,
324 __in_bcount(size) caddr_t data,
325 __in size_t size,
326 __out efx_vpd_value_t *evvp,
327 __inout unsigned int *contp);
328
329extern __checkReturn efx_rc_t
330siena_vpd_write(
331 __in efx_nic_t *enp,
332 __in_bcount(size) caddr_t data,
333 __in size_t size);
334
335extern void
336siena_vpd_fini(
337 __in efx_nic_t *enp);
338
339#endif /* EFSYS_OPT_VPD */
340
341typedef struct siena_link_state_s {
342 uint32_t sls_adv_cap_mask;
343 uint32_t sls_lp_cap_mask;
344 unsigned int sls_fcntl;
345 efx_link_mode_t sls_link_mode;
346#if EFSYS_OPT_LOOPBACK
347 efx_loopback_type_t sls_loopback;
348#endif
349 boolean_t sls_mac_up;
350} siena_link_state_t;
351
352extern void
353siena_phy_link_ev(
354 __in efx_nic_t *enp,
355 __in efx_qword_t *eqp,
356 __out efx_link_mode_t *link_modep);
357
358extern __checkReturn efx_rc_t
359siena_phy_get_link(
360 __in efx_nic_t *enp,
361 __out siena_link_state_t *slsp);
362
363extern __checkReturn efx_rc_t
364siena_phy_power(
365 __in efx_nic_t *enp,
366 __in boolean_t on);
367
368extern __checkReturn efx_rc_t
369siena_phy_reconfigure(
370 __in efx_nic_t *enp);
371
372extern __checkReturn efx_rc_t
373siena_phy_verify(
374 __in efx_nic_t *enp);
375
376extern __checkReturn efx_rc_t
377siena_phy_oui_get(
378 __in efx_nic_t *enp,
379 __out uint32_t *ouip);
380
381#if EFSYS_OPT_PHY_STATS
382
383extern void
384siena_phy_decode_stats(
385 __in efx_nic_t *enp,
386 __in uint32_t vmask,
387 __in_opt efsys_mem_t *esmp,
388 __out_opt uint64_t *smaskp,
389 __inout_ecount_opt(EFX_PHY_NSTATS) uint32_t *stat);
390
391extern __checkReturn efx_rc_t
392siena_phy_stats_update(
393 __in efx_nic_t *enp,
394 __in efsys_mem_t *esmp,
395 __inout_ecount(EFX_PHY_NSTATS) uint32_t *stat);
396
397#endif /* EFSYS_OPT_PHY_STATS */
398
399#if EFSYS_OPT_PHY_PROPS
400
401#if EFSYS_OPT_NAMES
402
403extern const char *
404siena_phy_prop_name(
405 __in efx_nic_t *enp,
406 __in unsigned int id);
407
408#endif /* EFSYS_OPT_NAMES */
409
410extern __checkReturn efx_rc_t
411siena_phy_prop_get(
412 __in efx_nic_t *enp,
413 __in unsigned int id,
414 __in uint32_t flags,
415 __out uint32_t *valp);
416
417extern __checkReturn efx_rc_t
418siena_phy_prop_set(
419 __in efx_nic_t *enp,
420 __in unsigned int id,
421 __in uint32_t val);
422
423#endif /* EFSYS_OPT_PHY_PROPS */
424
425#if EFSYS_OPT_BIST
426
427extern __checkReturn efx_rc_t
428siena_phy_bist_start(
429 __in efx_nic_t *enp,
430 __in efx_bist_type_t type);
431
432extern __checkReturn efx_rc_t
433siena_phy_bist_poll(
434 __in efx_nic_t *enp,
435 __in efx_bist_type_t type,
436 __out efx_bist_result_t *resultp,
437 __out_opt __drv_when(count > 0, __notnull)
438 uint32_t *value_maskp,
439 __out_ecount_opt(count) __drv_when(count > 0, __notnull)
440 unsigned long *valuesp,
441 __in size_t count);
442
443extern void
444siena_phy_bist_stop(
445 __in efx_nic_t *enp,
446 __in efx_bist_type_t type);
447
448#endif /* EFSYS_OPT_BIST */
449
450extern __checkReturn efx_rc_t
451siena_mac_poll(
452 __in efx_nic_t *enp,
453 __out efx_link_mode_t *link_modep);
454
455extern __checkReturn efx_rc_t
456siena_mac_up(
457 __in efx_nic_t *enp,
458 __out boolean_t *mac_upp);
459
460extern __checkReturn efx_rc_t
461siena_mac_reconfigure(
462 __in efx_nic_t *enp);
463
464#if EFSYS_OPT_LOOPBACK
465
466extern __checkReturn efx_rc_t
467siena_mac_loopback_set(
468 __in efx_nic_t *enp,
469 __in efx_link_mode_t link_mode,
470 __in efx_loopback_type_t loopback_type);
471
472#endif /* EFSYS_OPT_LOOPBACK */
473
474#if EFSYS_OPT_MAC_STATS
475
476extern __checkReturn efx_rc_t
477siena_mac_stats_update(
478 __in efx_nic_t *enp,
479 __in efsys_mem_t *esmp,
480 __inout_ecount(EFX_MAC_NSTATS) efsys_stat_t *stat,
481 __inout_opt uint32_t *generationp);
482
483#endif /* EFSYS_OPT_MAC_STATS */
484
485#ifdef __cplusplus
486}
487#endif
488
489#endif /* _SYS_SIENA_IMPL_H */