| rc.c (83366) | rc.c (88900) |
|---|---|
| 1/* 2 * Copyright (C) 1995 by Pavel Antonov, Moscow, Russia. 3 * Copyright (C) 1995 by Andrey A. Chernov, Moscow, Russia. 4 * All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: --- 10 unchanged lines hidden (view full) --- 19 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 20 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 21 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 23 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 25 * SUCH DAMAGE. 26 * | 1/* 2 * Copyright (C) 1995 by Pavel Antonov, Moscow, Russia. 3 * Copyright (C) 1995 by Andrey A. Chernov, Moscow, Russia. 4 * All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: --- 10 unchanged lines hidden (view full) --- 19 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 20 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 21 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 23 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 25 * SUCH DAMAGE. 26 * |
| 27 * $FreeBSD: head/sys/dev/rc/rc.c 83366 2001-09-12 08:38:13Z julian $ | 27 * $FreeBSD: head/sys/dev/rc/rc.c 88900 2002-01-05 08:47:13Z jhb $ |
| 28 * 29 */ 30 31/* 32 * SDL Communications Riscom/8 (based on Cirrus Logic CL-CD180) driver 33 * 34 */ 35 --- 321 unchanged lines hidden (view full) --- 357 if (good_data) { 358 while (ucnt-- > 0) { 359 val = rcin(CD180_RDR); 360 optr[0] = val; 361 optr[INPUT_FLAGS_SHIFT] = 0; 362 optr++; 363 rc_scheduled_event++; 364 if (val != 0 && val == rc->rc_hotchar) | 28 * 29 */ 30 31/* 32 * SDL Communications Riscom/8 (based on Cirrus Logic CL-CD180) driver 33 * 34 */ 35 --- 321 unchanged lines hidden (view full) --- 357 if (good_data) { 358 while (ucnt-- > 0) { 359 val = rcin(CD180_RDR); 360 optr[0] = val; 361 optr[INPUT_FLAGS_SHIFT] = 0; 362 optr++; 363 rc_scheduled_event++; 364 if (val != 0 && val == rc->rc_hotchar) |
| 365 swi_sched(rc_ih, SWI_NOSWITCH); | 365 swi_sched(rc_ih, 0); |
| 366 } 367 } else { 368 /* Store also status data */ 369 while (ucnt-- > 0) { 370 iack = rcin(CD180_RCSR); 371 if (iack & RCSR_Timeout) 372 break; 373 if ( (iack & RCSR_OE) --- 14 unchanged lines hidden (view full) --- 388 || !(rc->rc_tp->t_iflag & IGNBRK)))) { 389 if ( (iack & (RCSR_PE|RCSR_FE)) 390 && (t_state & TS_CAN_BYPASS_L_RINT) 391 && ((iack & RCSR_FE) 392 || ((iack & RCSR_PE) 393 && (rc->rc_tp->t_iflag & INPCK)))) 394 val = 0; 395 else if (val != 0 && val == rc->rc_hotchar) | 366 } 367 } else { 368 /* Store also status data */ 369 while (ucnt-- > 0) { 370 iack = rcin(CD180_RCSR); 371 if (iack & RCSR_Timeout) 372 break; 373 if ( (iack & RCSR_OE) --- 14 unchanged lines hidden (view full) --- 388 || !(rc->rc_tp->t_iflag & IGNBRK)))) { 389 if ( (iack & (RCSR_PE|RCSR_FE)) 390 && (t_state & TS_CAN_BYPASS_L_RINT) 391 && ((iack & RCSR_FE) 392 || ((iack & RCSR_PE) 393 && (rc->rc_tp->t_iflag & INPCK)))) 394 val = 0; 395 else if (val != 0 && val == rc->rc_hotchar) |
| 396 swi_sched(rc_ih, SWI_NOSWITCH); | 396 swi_sched(rc_ih, 0); |
| 397 optr[0] = val; 398 optr[INPUT_FLAGS_SHIFT] = iack; 399 optr++; 400 rc_scheduled_event++; 401 } 402 } 403 } 404 rc->rc_iptr = optr; --- 30 unchanged lines hidden (view full) --- 435 rc->rc_flags |= RC_SEND_RDY; 436 else 437 rc->rc_flags &= ~RC_SEND_RDY; 438 } else 439 rc->rc_flags |= RC_SEND_RDY; 440 if ((iack & MCR_CDchg) && !(rc->rc_flags & RC_MODCHG)) { 441 rc_scheduled_event += LOTS_OF_EVENTS; 442 rc->rc_flags |= RC_MODCHG; | 397 optr[0] = val; 398 optr[INPUT_FLAGS_SHIFT] = iack; 399 optr++; 400 rc_scheduled_event++; 401 } 402 } 403 } 404 rc->rc_iptr = optr; --- 30 unchanged lines hidden (view full) --- 435 rc->rc_flags |= RC_SEND_RDY; 436 else 437 rc->rc_flags &= ~RC_SEND_RDY; 438 } else 439 rc->rc_flags |= RC_SEND_RDY; 440 if ((iack & MCR_CDchg) && !(rc->rc_flags & RC_MODCHG)) { 441 rc_scheduled_event += LOTS_OF_EVENTS; 442 rc->rc_flags |= RC_MODCHG; |
| 443 swi_sched(rc_ih, SWI_NOSWITCH); | 443 swi_sched(rc_ih, 0); |
| 444 } 445 goto more_intrs; 446 } 447 if (bsr & RC_BSR_TXINT) { 448 iack = rcin(RC_PILR_TX); 449 if (iack != (GIVR_IT_TDI | RC_FAKEID)) { 450 printf("rc%d: fake txint: %02x\n", unit, iack); 451 goto more_intrs; --- 24 unchanged lines hidden (view full) --- 476 if (optr >= rc->rc_obufend) { 477 rcout(CD180_IER, rc->rc_ier &= ~IER_TxRdy); 478#ifdef RCDEBUG 479 printf("rc%d/%d: output completed\n", unit, rc->rc_chan); 480#endif 481 if (!(rc->rc_flags & RC_DOXXFER)) { 482 rc_scheduled_event += LOTS_OF_EVENTS; 483 rc->rc_flags |= RC_DOXXFER; | 444 } 445 goto more_intrs; 446 } 447 if (bsr & RC_BSR_TXINT) { 448 iack = rcin(RC_PILR_TX); 449 if (iack != (GIVR_IT_TDI | RC_FAKEID)) { 450 printf("rc%d: fake txint: %02x\n", unit, iack); 451 goto more_intrs; --- 24 unchanged lines hidden (view full) --- 476 if (optr >= rc->rc_obufend) { 477 rcout(CD180_IER, rc->rc_ier &= ~IER_TxRdy); 478#ifdef RCDEBUG 479 printf("rc%d/%d: output completed\n", unit, rc->rc_chan); 480#endif 481 if (!(rc->rc_flags & RC_DOXXFER)) { 482 rc_scheduled_event += LOTS_OF_EVENTS; 483 rc->rc_flags |= RC_DOXXFER; |
| 484 swi_sched(rc_ih, SWI_NOSWITCH); | 484 swi_sched(rc_ih, 0); |
| 485 } 486 } 487 } 488 more_intrs: 489 rcout(CD180_EOIR, 0); /* end of interrupt */ 490 rcout(RC_CTOUT, 0); 491 bsr = ~(rcin(RC_BSR)); 492 } --- 966 unchanged lines hidden --- | 485 } 486 } 487 } 488 more_intrs: 489 rcout(CD180_EOIR, 0); /* end of interrupt */ 490 rcout(RC_CTOUT, 0); 491 bsr = ~(rcin(RC_BSR)); 492 } --- 966 unchanged lines hidden --- |